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KR920022580A - 박막 트랜지스터 및 그 제조 방법 - Google Patents

박막 트랜지스터 및 그 제조 방법 Download PDF

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Publication number
KR920022580A
KR920022580A KR1019920007527A KR920007527A KR920022580A KR 920022580 A KR920022580 A KR 920022580A KR 1019920007527 A KR1019920007527 A KR 1019920007527A KR 920007527 A KR920007527 A KR 920007527A KR 920022580 A KR920022580 A KR 920022580A
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South Korea
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gate electrode
thin film
film transistor
insulator
semiconductor layer
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KR1019920007527A
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English (en)
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KR100260668B1 (ko
Inventor
다까시 나까자와
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아이자와 스스무
세이꼬 엡슨 가부시끼가이샤
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Publication of KR920022580A publication Critical patent/KR920022580A/ko
Priority to KR1019970003728A priority Critical patent/KR100260666B1/ko
Priority to KR1019970003729A priority patent/KR100260667B1/ko
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Publication of KR100260668B1 publication Critical patent/KR100260668B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/90—MOSFET type gate sidewall insulating spacer

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

내용 없음.

Description

박막 트랜지스터 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 박막 트랜지스터로서, 채널 길이 방향으로 취해진 단면도.
제4도는 탄탈 산화물의 막두께가 양극 산화 전압의 변화에 대하여 어떻게 변화하는가를 도시하는 그래프.
제6A 내지 6C도는 본 발명에 따른 박막 트랜지스터가 적용될 수 있는 액티브 매트릭스 방식의 액정 디스플레이 기판을 예시하며, 여기서,
제6A도는 평면도 이고,
제6B도는 라인 A-A'에 따라 취해진 단면도이며,
제6C도는 라인 B-B'에 따라 취해진 단면도.
제7A도는 액티브 매트릭스 방식의 액정 디스플레이의 등가 회로 도시도.
제7B도는 구동 신호 파형도.
제8A 내지 8C도는 본 발명에 따른 또다른 박막 트랜지스터의 단면도.
제9도는 양극 산화 전압의 변화에 대하여 탄탈 산화물의 막 두께가 어떻게 변화하는가를 도시하는 그래프.

Claims (5)

  1. 적어도 반도체 층, 게이트 절연막 및 게이트 전극을 포함하는 박막 트랜지스터에 있어서, 상기 게이트 전극 의 표면이 절연물로 덮혀진 것과 도너 또는 액셉터로서 불순물이 첨가된 반도체 층이 절연물의 두께보다 얇거나 같은 간격으로 게이트 전극과 간격된 것을 특징으로 하는 박막 트랜지스터.
  2. 박막 트랜지스터를 제조하는 방법에 있어서, 반도체 층, 게이트 절연막 및 게이트 전극을 차례로 형성하는 단계와 상기 게이트 전극을 마스크로서 사용하여 자기 중심 맞추기 식으로 도너 또는 액셉터로서 불순물을 상기 반도체 층에 첨가함으로써 소소스 영역 및 드레인 영역을 형성하는 단계와, 상기 게이트 전극의 표면을 산화함으로써 절연물을 형성하는 단계를 포함하는 것을 특징으로 하는 박막 트랜지스터 제조 방법.
  3. 박막 트랜지스터를 제조하는 방법에 있어서, 반도체 층, 게이트 절연막 및 게이트 전극을 차례로 형성하는 단계와, 상기 게이트 전극의 표면을 산화함으로써 절연물을 형성하는 단계와, 상기 산화된 게이트 전극의 표면을 마스크로서 사용하여 자기 중심 맞추기 식으로 도너 또는 액셉터로서 불순물을 상기 반도체 층에 첨가함으로써 소오스 영역 및 드레인 영역을 형성하는 단계를 포함하는 것을 특징으로 하는 박막 트랜지스터 제조 방법.
  4. 제1항에 있어서, 상기 게이트 전극은 탄날로 형성되고, 상기 절연물은 상기 게이트 전극의 표면을 양극 산화 시킴으로써 형성된 탄탈산화물로 형성되는 것을 특징으로 하는 박막 트랜지스터.
  5. 제1항에 있어서, 반도체 층, 게이트 전극막, 탄탈 산화물로 된 제1절연물과 절연물로 덮혀진 표면을 지닌 게이트 전극이 서로 상부상에 형성되는 것을 특징으로 하는 박막 트랜지스터.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019920007527A 1991-05-08 1992-05-02 액티브 매트릭스 패널 KR100260668B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019970003728A KR100260666B1 (en) 1991-05-08 1997-02-06 A method of manufacturing an active matrix panel
KR1019970003729A KR100260667B1 (en) 1991-05-08 1997-02-06 A method of manufacturing an active matrix panel

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP91-102668 1991-05-08
JP10266891 1991-05-08
JP91-269675 1991-10-17
JP26967591 1991-10-17

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KR920022580A true KR920022580A (ko) 1992-12-19
KR100260668B1 KR100260668B1 (ko) 2000-07-01

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KR1019920007527A KR100260668B1 (ko) 1991-05-08 1992-05-02 액티브 매트릭스 패널
KR1019970003728A KR100260666B1 (en) 1991-05-08 1997-02-06 A method of manufacturing an active matrix panel
KR1019970003729A KR100260667B1 (en) 1991-05-08 1997-02-06 A method of manufacturing an active matrix panel

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KR1019970003729A KR100260667B1 (en) 1991-05-08 1997-02-06 A method of manufacturing an active matrix panel

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US (4) US5583366A (ko)
EP (1) EP0513590B1 (ko)
JP (4) JP3277548B2 (ko)
KR (3) KR100260668B1 (ko)
DE (1) DE69212383T2 (ko)
SG (1) SG72617A1 (ko)

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US6136625A (en) 2000-10-24
US5814539A (en) 1998-09-29
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US5561075A (en) 1996-10-01
KR100260667B1 (en) 2000-07-01
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KR100260666B1 (en) 2000-07-01
EP0513590A2 (en) 1992-11-19
JPH1197711A (ja) 1999-04-09
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DE69212383T2 (de) 1997-01-16

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