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KR850005162A - 전계효과형 트랜지스터 - Google Patents

전계효과형 트랜지스터 Download PDF

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Publication number
KR850005162A
KR850005162A KR1019840008250A KR840008250A KR850005162A KR 850005162 A KR850005162 A KR 850005162A KR 1019840008250 A KR1019840008250 A KR 1019840008250A KR 840008250 A KR840008250 A KR 840008250A KR 850005162 A KR850005162 A KR 850005162A
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KR
South Korea
Prior art keywords
field effect
effect transistor
polycrystalline silicon
thin film
silicon thin
Prior art date
Application number
KR1019840008250A
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English (en)
Other versions
KR920005537B1 (ko
Inventor
히사오 하야시
Original Assignee
오오가 노리오
쏘니 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 오오가 노리오, 쏘니 가부시기가이샤 filed Critical 오오가 노리오
Publication of KR850005162A publication Critical patent/KR850005162A/ko
Application granted granted Critical
Publication of KR920005537B1 publication Critical patent/KR920005537B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6731—Top-gate only TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6745—Polycrystalline or microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Thin Film Transistor (AREA)

Abstract

내용 없음

Description

전계효과형 트랜지스터
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 활성층을 다결정 실리콘 박막에 의해서 구성한 종래의 MOS TFT의 구조를 나타낸 단면도.
제2도는 본원 발명에 관한 전계효과형 트랜지스터의 일실시예로서의 MOS TET의 구조를 나타낸 단면도.
제3도는 제2도에 나타낸 MOS에 있어서 활성층을 구성하는 다결정 실리콘 박막의 막두께와 신효 이동도 μeff의 관계를 나타낸 그래프.
※ 도면의 주요한 부분에 대한 부호의 설명
(1):석영기판, (2):다결정 실리콘 박막, (2c):활성층, (3):소오스영역, (4):드레인영역, (5):게이트절연층, (6):게이트전극, (8),(9):인출전극

Claims (1)

  1. 채널이 형성되는 활성층을 다결정 실리콘 박막에 의해서 구성한 전계효과형 트랜지스터에 있어서, 상기 다결정 실리콘 박막의 막두께를 100∼750Å로 구성한 것을 특징으로 하는 전계효과형 트랜지스터.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019840008250A 1983-12-23 1984-12-22 전계효과형 트랜지스터 KR920005537B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP??83-251813 1983-12-23
JP58-251813 1983-12-23
JP58251813A JPH0669094B2 (ja) 1983-12-23 1983-12-23 電界効果型トランジスタ

Publications (2)

Publication Number Publication Date
KR850005162A true KR850005162A (ko) 1985-08-21
KR920005537B1 KR920005537B1 (ko) 1992-07-06

Family

ID=17228297

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019840008250A KR920005537B1 (ko) 1983-12-23 1984-12-22 전계효과형 트랜지스터

Country Status (2)

Country Link
JP (1) JPH0669094B2 (ko)
KR (1) KR920005537B1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63262875A (ja) * 1987-04-20 1988-10-31 Nec Corp 薄膜トランジスタの製造方法
JP2510710B2 (ja) * 1988-12-13 1996-06-26 三菱電機株式会社 絶縁体基板上の半導体層に形成されたｍｏｓ型電界効果トランジスタ
JP2629995B2 (ja) * 1989-12-29 1997-07-16 日本電気株式会社 薄膜トランジスタ
JP3173854B2 (ja) 1992-03-25 2001-06-04 株式会社半導体エネルギー研究所 薄膜状絶縁ゲイト型半導体装置の作製方法及び作成された半導体装置
JP3173926B2 (ja) 1993-08-12 2001-06-04 株式会社半導体エネルギー研究所 薄膜状絶縁ゲイト型半導体装置の作製方法及びその半導体装置
US6331717B1 (en) 1993-08-12 2001-12-18 Semiconductor Energy Laboratory Co. Ltd. Insulated gate semiconductor device and process for fabricating the same
JP3292657B2 (ja) * 1995-04-10 2002-06-17 キヤノン株式会社 薄膜トランジスタ及びそれを用いた液晶表示装置の製造法
WO2009123127A1 (ja) 2008-04-02 2009-10-08 Ｎｅｃ液晶テクノロジー株式会社 半導体装置及びその製造方法、並びに液晶表示装置及び電子機器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182272A (ja) * 1982-04-19 1983-10-25 Seiko Epson Corp 薄膜トランジスタ

Also Published As

Publication number Publication date
JPH0669094B2 (ja) 1994-08-31
JPS60136262A (ja) 1985-07-19
KR920005537B1 (ko) 1992-07-06

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