CN113267118B - A kind of semiconductor conductive film thickness on-line test structure and test method - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及半导体导电薄膜在线测量领域,特别是涉及一种半导体导电薄膜厚度在线测试结构及其测试方法。The invention relates to the field of on-line measurement of semiconductor conductive films, in particular to a structure for on-line testing of the thickness of semiconductor conductive films and a testing method thereof.
背景技术Background technique
微机电薄膜器件的薄膜厚度是影响器件性能的重要参数。通过在线测量薄膜的厚度,可以获得器件的尺寸,控制器件的精度。半导体是表面微加工过程中所用到的重要材料,加工的基本过程是:先在硅片上淀积一层材料,称为牺牲层。然后光刻定义图形层,接下来在牺牲层上面用化学气相淀积等方法制作结构层薄膜。最后刻蚀去除牺牲层,使微型部件的可动部分与牺牲层分离,形成半导体薄膜结构。牺牲层的材料通常为介质材料,结构层为半导体材料。微机电产品的制造厂商希望能够在线监测半导体导电薄膜的厚度,实时反映制造过程中的工艺误差。因此,不离开加工环境并采用便捷设备对微机电产品进行的在线测试成为控制工艺的必要手段。在线测试结构通常采用电学激励和电学测量的方法,通过电学量数值以及针对性的计算方法得到材料的几何参数。The film thickness of MEMS thin-film devices is an important parameter that affects device performance. By measuring the thickness of the thin film online, the size of the device can be obtained and the precision of the device can be controlled. Semiconductor is an important material used in the surface micromachining process. The basic process of processing is: first deposit a layer of material on the silicon wafer, which is called a sacrificial layer. Then, the pattern layer is defined by photolithography, and then the structure layer film is formed on the sacrificial layer by chemical vapor deposition and other methods. Finally, the sacrificial layer is removed by etching, so that the movable part of the micro component is separated from the sacrificial layer to form a semiconductor thin film structure. The material of the sacrificial layer is usually a dielectric material, and the structural layer is a semiconductor material. Manufacturers of MEMS products hope to be able to monitor the thickness of semiconductor conductive films online and reflect process errors in the manufacturing process in real time. Therefore, online testing of MEMS products without leaving the processing environment and using convenient equipment has become a necessary means of controlling the process. The online test structure usually adopts the method of electrical excitation and electrical measurement, and obtains the geometrical parameters of the material through the electrical quantity value and the targeted calculation method.
发明内容SUMMARY OF THE INVENTION
有鉴于此,本发明的目的在于提供一种半导体导电薄膜厚度在线测试结构及其测试方法,用以在不离开加工环境的情况下,并采用便捷设备对半导体导电薄膜厚度进行在线测量。In view of this, the purpose of the present invention is to provide an on-line testing structure and method for measuring the thickness of a semiconductor conductive thin film, which can be used for on-line measurement of the thickness of a semiconductor conductive thin film by using convenient equipment without leaving the processing environment.
为了达到上述的目的,本发明通过以下技术方案来实现:In order to achieve the above-mentioned purpose, the present invention realizes through the following technical solutions:
一种半导体导电薄膜厚度在线测试结构,包括圆形半导体薄层和第一至第四接触电极,所述四个接触电极均匀的设置在所述圆形半导体薄层的周侧并且与所述圆形半导体薄层电连接,所述四个接触电极与所述圆形半导体薄层形成的张开角度为α;还包括:四探针电阻测试桥结构,所述四探针电阻测试桥结构设置在介质层的表面,所述介质层的表面有一部分被蚀刻成多个相互平行的且相同的凹槽,所述凹槽之间形成台阶,所述台阶具有相同的长度,所述多个凹槽以及相应的台阶共同构成连续阶梯结构,所述凹槽的两个侧壁与所述介质层表面存在相同的夹角;所述四探针电阻测试桥结构包括第一四探针半导体电阻桥和第二四探针半导体电阻桥,其中,An on-line test structure for the thickness of a semiconductor conductive thin film, comprising a circular semiconductor thin layer and first to fourth contact electrodes, the four contact electrodes are uniformly arranged on the peripheral side of the circular semiconductor thin layer and are connected with the circular semiconductor thin layer. The four contact electrodes are electrically connected with the circular semiconductor thin layer, and the opening angle formed by the four contact electrodes and the circular semiconductor thin layer is α; it also includes: a four-probe resistance test bridge structure, and the four-probe resistance test bridge structure is provided with On the surface of the dielectric layer, a part of the surface of the dielectric layer is etched into a plurality of mutually parallel and identical grooves, and steps are formed between the grooves, the steps have the same length, and the plurality of grooves are formed. The groove and the corresponding steps together form a continuous ladder structure, and the two sidewalls of the groove and the surface of the dielectric layer have the same included angle; the four-probe resistance test bridge structure includes a first four-probe semiconductor resistance bridge and a second four-probe semiconductor resistor bridge, where,
所述第一四探针半导体电阻桥包括第一半导体电阻条和四个金属电极,其中,在所述第一半导体电阻条的两端处并且每一侧处均电连接一个金属电极,所述第一半导体电阻条的中间部分爬越所述连续阶梯结构,所述第一半导体电阻条的一端与所述圆形半导体薄层连接形成一体结构,另外一端连接所述第二四探针半导体电阻桥;The first four-probe semiconductor resistance bridge includes a first semiconductor resistance strip and four metal electrodes, wherein one metal electrode is electrically connected at both ends and at each side of the first semiconductor resistance strip, the The middle part of the first semiconductor resistance strip climbs over the continuous ladder structure, one end of the first semiconductor resistance strip is connected with the circular semiconductor thin layer to form an integrated structure, and the other end is connected with the second four-probe semiconductor resistance bridge;
所述第二四探针半导体电阻桥包括第二半导体电阻条和两个金属电极,其中,所述第二半导体电阻条设置在所述第一半导体电阻条的另外一端并且与所述第一半导体电阻条连接,所述第二半导体电阻条与所述第一半导体电阻条共用两个金属电极,所述第二半导体电阻条设置在平坦的介质层表面上,所述第二半导体电阻条与所述第一半导体电阻条具有相同的宽度。The second four-probe semiconductor resistance bridge includes a second semiconductor resistance strip and two metal electrodes, wherein the second semiconductor resistance strip is arranged at the other end of the first semiconductor resistance strip and is connected with the first semiconductor resistance strip. Resistor bars are connected, the second semiconductor resistor bars share two metal electrodes with the first semiconductor resistor bars, the second semiconductor resistor bars are arranged on the surface of the flat dielectric layer, and the second semiconductor resistor bars are connected to the first semiconductor resistor bars. The first semiconductor resistance strips have the same width.
进一步的,所述金属电极设置锚区上,所述锚区为将所述介质层的表面进行蚀刻形成。Further, the metal electrode is disposed on an anchor region, and the anchor region is formed by etching the surface of the dielectric layer.
进一步的,所述介质层设置在绝缘衬底之上。Further, the dielectric layer is disposed on the insulating substrate.
一种半导体导电薄膜厚度在线测试方法,包括如下步骤:An on-line test method for the thickness of a semiconductor conductive film, comprising the following steps:
步骤S1、通过将圆形半导体薄层到简单结构的映射,再结合方块电阻的定义,求出所述圆形半导体薄层的方块电阻Rsq;Step S1, by mapping the circular semiconductor thin layer to a simple structure, combined with the definition of sheet resistance, obtain the sheet resistance R sq of the circular semiconductor thin layer;
步骤S2、对所述第一半导体电阻条同一侧的两个金属电极施加恒定电流,再测量另外一侧的两个金属电极之间的电压,电压与电流的比值即为电阻R1;Step S2, applying a constant current to the two metal electrodes on the same side of the first semiconductor resistance strip, and then measuring the voltage between the two metal electrodes on the other side, the ratio of the voltage to the current is the resistance R 1 ;
步骤S3、对所述第二半导体电阻条同一侧的两个金属电极施加恒定电流,再测量另外一侧的两个金属电极之间的电压,电压与电流的比值即为电阻RA;Step S3, applying a constant current to the two metal electrodes on the same side of the second semiconductor resistance strip, and then measuring the voltage between the two metal electrodes on the other side, and the ratio of the voltage to the current is the resistance RA ;
步骤S4、根据电阻R1,方块电阻Rsq与所述第二半导体电阻条的几何尺寸关系,根据所述第一半导体电阻条的厚度与所述台阶的几何尺寸关系,以及根据电阻R1,方块电阻Rsq与所述第一半导体电阻条的几何尺寸关系,建立公式组(1),表达式为:Step S4, according to the resistance R 1 , the relationship between the sheet resistance R sq and the geometric dimension of the second semiconductor resistance strip, according to the relationship between the thickness of the first semiconductor resistance strip and the geometric dimension of the step, and according to the resistance R 1 , The relationship between the sheet resistance R sq and the geometric size of the first semiconductor resistance strip is established by formula group (1), and the expression is:
公式组(1)中,W表示所述第二半导体电阻条的宽度,Rsq表示方块电阻,R1表示第一半导体电阻条的电阻,L1表示第二半导体电阻条的有效长度,RA表示第二半导体电阻条的电阻,S1表示凹槽顶面的长度,S2表示台阶长度的一半,S3表示凹槽侧壁的长度,β表示凹槽侧壁与凹槽底面的夹角,t1表示第一半导体电阻条的厚度,x为引入的一个中间变量,没有具体的物理意义,只是为了使公式(1)显得简洁明了,γ表示为拐角电阻的修正因子,n表示为台阶的数量;In formula group (1), W represents the width of the second semiconductor resistance strip, R sq represents the sheet resistance, R 1 represents the resistance of the first semiconductor resistance strip, L 1 represents the effective length of the second semiconductor resistance strip, R A Represents the resistance of the second semiconductor resistor strip, S 1 represents the length of the top surface of the groove, S 2 represents half the length of the step, S 3 represents the length of the side wall of the groove, β represents the angle between the side wall of the groove and the bottom surface of the groove , t 1 represents the thickness of the first semiconductor resistance strip, x is an intermediate variable introduced, which has no specific physical meaning, just to make the formula (1) appear concise and clear, γ represents the correction factor of the corner resistance, and n represents the step quantity;
步骤S5、将步骤S1得到的方块电阻Rsq,步骤S2得到的电阻R1以及步骤S3得到的电阻RA代入所述公式组(1)中,通过将测量得到的:第二半导体电阻条的有效长度L1、凹槽顶面的长度S1、台阶长度的一半S2、凹槽侧壁的长度S3,台阶的数量n,拐角电阻的修正因子γ以及凹槽侧壁与凹槽底面的夹角β代入所述公式组(1)中,得到所述半导体导电薄膜厚度。Step S5: Substitute the sheet resistance R sq obtained in step S1, the resistance R1 obtained in step S2, and the resistance RA obtained in step S3 into the formula group ( 1 ), obtained by measuring: the resistance of the second semiconductor resistance strip. Effective length L 1 , groove top length S 1 , half step length S 2 , groove side wall length S 3 , number n of steps, correction factor γ for corner resistance, and groove side walls and groove bottom The included angle β of is substituted into the formula group (1) to obtain the thickness of the semiconductor conductive film.
进一步的,所述步骤S1具体包括:Further, the step S1 specifically includes:
步骤S101、对第一接触电极和第四接触电极之间施加恒定电流,并且测量第一接触电极和第四接触电极之间的电压,电压与电流的比值为电阻Ra;Step S101, applying a constant current between the first contact electrode and the fourth contact electrode, and measuring the voltage between the first contact electrode and the fourth contact electrode, the ratio of the voltage to the current is the resistance Ra ;
步骤S102、对第一接触电极和第四接触电极之间施加恒定电流,并且测量第二接触电极和第四接触电极之间的电压,电压与电流的比值为电阻Rb;Step S102, applying a constant current between the first contact electrode and the fourth contact electrode, and measuring the voltage between the second contact electrode and the fourth contact electrode, the ratio of the voltage to the current is the resistance R b ;
步骤S103、根据圆形半导体薄层到简单结构的映射以及方块电阻的定义,建立公式组(2):Step S103 , according to the mapping from the circular semiconductor thin layer to the simple structure and the definition of the sheet resistance, formula group (2) is established:
公式组(2)中,P、Q、S和T均表示中间量,α为未知数,并且表示四个接触电极与圆形半导体薄层形成的张开角度,i为虚数单位,K[·]表示第一类椭圆积分函数,Rsq表示圆形半导体薄层的方块电阻,ga(α)和gb(α)表示只与张开角度α有关的函数;In formula group (2), P, Q, S and T all represent intermediate quantities, α is an unknown number, and represents the opening angle formed by the four contact electrodes and the circular semiconductor thin layer, i is an imaginary unit, K[ ] represents the first kind of elliptic integral function, R sq represents the sheet resistance of the circular semiconductor thin layer, g a (α) and g b (α) represent functions only related to the opening angle α;
步骤S103、将步骤S101得到的电阻Ra以及步骤S102得到的电阻Rb代入公式组(2)中,求出四个接触电极与圆形半导体薄层形成的张开角度α;Step S103: Substitute the resistance R a obtained in step S101 and the resistance R b obtained in step S102 into the formula group (2), and obtain the opening angle α formed by the four contact electrodes and the circular semiconductor thin layer;
步骤S104、将步骤S103求出的张开角度α代入公式(3)中,得到方块电阻Rsq,公式(3)的表达式为:Step S104: Substitute the opening angle α obtained in step S103 into formula (3) to obtain the sheet resistance R sq , and the expression of formula (3) is:
公式(3)中,ga(α)表示只与张开角度α有关的函数,i为虚数单位,P、Q、S和T均表示中间量。In formula (3), g a (α) represents a function only related to the opening angle α, i is an imaginary unit, and P, Q, S, and T all represent intermediate quantities.
进一步的,在所述步骤S5中,所述半导体导电薄膜厚度,表达式为:Further, in the step S5, the thickness of the semiconductor conductive film is expressed as:
本发明的有益效果是:The beneficial effects of the present invention are:
1、本发明提供的测试方法简单,测试设备要求低,测试过程及测试参数值稳定。加工过程与微机电器件同步,没有特殊加工要求,完全符合在线测试的要求。计算方法仅限于简单数学公式。1. The test method provided by the present invention is simple, the test equipment requirements are low, and the test process and test parameter values are stable. The processing process is synchronized with the micro-electromechanical device, there is no special processing requirements, and it fully meets the requirements of online testing. Calculation methods are limited to simple mathematical formulas.
2、本发明通过半导体爬越多个牺牲层台阶,利用多个台阶平均了台阶制造过程中的随机误差;利用多个台阶增加了电阻变化的数值,便于测量。测量采用四探针法,对两个半导体电阻进行测试。最后,结合圆形薄层结构得到的方块电阻,计算得到半导体的厚度。2. In the present invention, the semiconductor climbs over multiple steps of the sacrificial layer, and the random errors in the manufacturing process of the steps are averaged by using the multiple steps; the value of the resistance change is increased by using the multiple steps, which is convenient for measurement. The measurement uses the four-probe method to test two semiconductor resistors. Finally, combined with the sheet resistance obtained from the circular thin-layer structure, the thickness of the semiconductor is calculated.
附图说明Description of drawings
图1为圆形半导体薄层的结构示意图。FIG. 1 is a schematic structural diagram of a circular semiconductor thin layer.
图2为四探针电阻测试桥结构的结构示意图。FIG. 2 is a schematic structural diagram of a four-probe resistance test bridge structure.
图3为单个阶梯结构放大后的剖面图。FIG. 3 is an enlarged cross-sectional view of a single stepped structure.
附图中:In the attached picture:
101-第一接触电极、102-第二接触电极、103-第三接触电极、104-第四接触电极、105-圆形半导体薄层、106-第二半导体电阻条、107-凹槽、108-第一半导体电阻条、109,110,111,112,113以及114均表示锚区、115-金属电极、116-半导体层、117-介质层、118-绝缘衬底。101-first contact electrode, 102-second contact electrode, 103-third contact electrode, 104-fourth contact electrode, 105-round semiconductor thin layer, 106-second semiconductor resistance strip, 107-groove, 108 - The first semiconductor resistance strips, 109, 110, 111, 112, 113 and 114 all represent anchor regions, 115 - metal electrode, 116 - semiconductor layer, 117 - dielectric layer, 118 - insulating substrate.
具体实施方式Detailed ways
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
实施例1Example 1
参见图1、图2和图3,本实施例提供一种半导体导电薄膜厚度在线测试结构,包括圆形半导体薄层105、第一接触电极101、第二接触电极102、第三接触电极103和第四接触电极104,四个接触电极均匀的设置在圆形半导体薄层105的周侧并且与圆形半导体薄层105电连接,四个接触电极与圆形半导体薄层105形成的张开角度为α;具体的说,圆形半导体薄层105用于测量方块电阻,第一至第四接触电极用于施加电流和测量电压。Referring to FIG. 1 , FIG. 2 and FIG. 3 , this embodiment provides an on-line test structure for the thickness of a semiconductor conductive thin film, including a circular semiconductor
半导体导电薄膜厚度在线测试结构还包括:四探针电阻测试桥结构以及连续阶梯结构,四探针电阻测试桥结构设置在介质层117的表面,介质层117设置在绝缘衬底118之上,介质层117的表面有一部分被蚀刻成n个相互平行的且相同的凹槽107,具体请参见图3,凹槽107之间形成台阶,台阶具有相同的长度,凹槽107的两个侧壁与介质层117表面存在相同的夹角β,n个凹槽107以及相依的台阶共同构成上述连续阶梯结构。The semiconductor conductive thin film thickness on-line test structure also includes: a four-probe resistance test bridge structure and a continuous ladder structure. The four-probe resistance test bridge structure is set on the surface of the
四探针电阻测试桥结构包括第一四探针半导体电阻桥和第二四探针半导体电阻桥。The four-probe resistance test bridge structure includes a first four-probe semiconductor resistance bridge and a second four-probe semiconductor resistance bridge.
具体的说,第一四探针半导体电阻桥和第二四探针半导体电阻桥均包括一个半导体电阻条,以及四个金属电极115,用于进行四探针法的测量。并且第一四探针半导体电阻桥和第二四探针半导体电阻桥共用两个金属电极115,在笛卡尔坐标系中,半导体电阻条和与x轴方向平行。更具体的说,第一四探针半导体电阻桥包括第一半导体电阻条108和四个金属电极115,第一半导体电阻条108的最左端的两侧均电连接一个金属电极115,第一半导体电阻条108的最右端的两侧均电连接一个金属电极115,合计四个金属电极115,第一半导体电阻108条的中间部分爬越连续阶梯结构。Specifically, the first four-point probe semiconductor resistance bridge and the second four-point probe semiconductor resistance bridge each include a semiconductor resistance bar and four
第二四探针半导体电阻桥包括第二半导体电阻条106和两个金属电极115,第二半导体电阻条106设置在第一半导体电阻条108的最右端并且与第一半导体电阻条108连接,并且设置在平坦的介质层117表面上。第二半导体电阻条106的最右端的两侧均设置一个金属电极115,第二半导体电阻条106的最左端使用第一半导体电阻条108最右端的两个金属电极115。更具体的说,第一半导体电阻条108和第二半导体电阻条106沿y轴方向的长度为W,凹槽107的设计尺寸沿y轴方向的长度大于半导体电阻条的W值的3倍,x轴方向的长度为S1,第二半导体电阻条106有效长度为L1。The second four-probe semiconductor resistance bridge includes a second
具体的说,本实施例中的金属电极115设置在相应的六个锚区上,六个锚区是通过将介质层117的表面进行蚀刻形成,在本实施中,四探针电阻测试桥结构下侧的3个锚区从从左至右,依次为:锚区109、锚区110、锚区111;四探针电阻测试桥结构下侧的3个锚区从从右至左,依次为:锚区112、锚区113、锚区114。Specifically, the
参见图3,图3是单个凹槽结构放大后的A-A剖面图,118为绝缘衬底,其上淀积一层介质层117,厚度为t2,刻蚀出凹槽107,其设计尺寸沿x轴方向的长度为S1,由于工艺限制,凹槽107侧壁存在一定角度的倾斜,记为β。淀积一层厚度为t1的半导体层116,在凹槽107处爬越台阶,并形成以凹槽107的垂直中分线为对称轴的对称结构。该对称结构包括以下几部分:在凹槽107两侧未被刻蚀的介质层117表面,分别有一段长为S2的半导体电阻条;在凹槽107底部的衬底表面有一段长为S1-2x的半导体电阻条;两个凹槽107侧壁分别由一段长为S3的半导体电阻条覆盖,并与前面两部分通过四个拐角半导体电阻相连接。由n个图3所示的阶梯结构串联起来,就得到了图2中的连续阶梯结构。Referring to FIG. 3, FIG. 3 is an enlarged AA cross-sectional view of a single groove structure, 118 is an insulating substrate, on which a
实施例2Example 2
参见图1和图2,本实施例提供一种半导体导电薄膜厚度在线测试方法,本实施例的方法基于实施例1中的测试结构进行实现,具体包括如下步骤:Referring to FIG. 1 and FIG. 2 , this embodiment provides an on-line test method for the thickness of a semiconductor conductive film. The method of this embodiment is implemented based on the test structure in Embodiment 1, and specifically includes the following steps:
步骤S1、通过将圆形半导体薄层105到简单结构的映射,再结合方块电阻的定义,求出所述圆形半导体薄层105的方块电阻Rsq;Step S1, by mapping the circular semiconductor
步骤S1,具体采用四探针法进行测量,具体包括:In step S1, the four-probe method is specifically used for measurement, which specifically includes:
步骤S101、对第一接触电极101和第四接触电极104之间施加恒定电流,并且测量第一接触电极101和第四接触电极104之间的电压,电压与电流的比值为电阻Ra;Step S101, applying a constant current between the
步骤S102、对第一接触电极101和第四接触电极104之间施加恒定电流,并且测量第二接触电极102和第四接触电极104之间的电压,电压与电流的比值为电阻Rb;Step S102, applying a constant current between the
步骤S103、根据圆形半导体薄层105到简单结构的映射以及方块电阻的定义,建立下述公式组:Step S103, according to the mapping from the circular semiconductor
公式组中,P、Q、S和T均表示中间量,α为未知数,并且表示四个接触电极与圆形半导体薄层105形成的张开角度,i为虚数单位,K[·]表示第一类椭圆积分函数,Rsq表示圆形半导体薄层105的方块电阻,ga(α)和gb(α)表示只与张开角度α有关的函数;In the formula group, P, Q, S, and T all represent intermediate quantities, α is an unknown number, and represents the opening angle formed by the four contact electrodes and the circular semiconductor
步骤S103、将步骤S101得到的电阻Ra以及步骤S102得到的电阻Rb代入上述公式组中,求出四个接触电极101-104与圆形半导体薄层105形成的张开角度α;Step S103: Substitute the resistance R a obtained in step S101 and the resistance R b obtained in step S102 into the above formula group, and obtain the opening angle α formed by the four contact electrodes 101-104 and the circular semiconductor
步骤S104、将步骤S103求出的张开角度α代入下述公式中,得到方块电阻Rsq,其表达式为:Step S104: Substitute the opening angle α obtained in step S103 into the following formula to obtain the sheet resistance R sq , the expression of which is:
公式中,ga(α)表示只与张开角度α有关的函数,i为虚数单位,P、Q、S和T均表示中间量。In the formula, ga (α) represents a function only related to the opening angle α, i is an imaginary unit, and P, Q, S and T all represent intermediate quantities.
步骤S2、对第一半导体电阻条108的锚区109和锚区110之间施加恒定电流,再测量另外一侧的锚区113和锚区114之间的电压,电压与电流的比值即为电阻R1;Step S2, apply a constant current between the
步骤S3、对第二半导体电阻条106锚区112和锚区113之间施加恒定电流,再测量锚区110和锚区111之间的电压,电压与电流的比值即为电阻RA;Step S3, applying a constant current between the
步骤S4、根据电阻R1,方块电阻Rsq与第二半导体电阻条106的几何尺寸关系,根据第一半导体电阻条108的厚度与台阶的几何尺寸关系,以及根据电阻R1,方块电阻Rsq与第一半导体电阻条108的几何尺寸关系,建立公式组,表达式为:Step S4, according to the resistance R 1 , the sheet resistance R sq and the geometrical dimension relationship of the second
公式组中,W表示第二半导体电阻条106的宽度,Rsq表示方块电阻,R1表示第一半导体电阻条108的电阻,L1表示第二半导体电阻条106的有效长度,RA表示第二半导体电阻条106的电阻,S1表示凹槽107顶面的长度,S2表示台阶长度的一半,S3表示凹槽107侧壁的长度,β表示凹槽107侧壁与凹槽107底面的夹角,t1表示第一半导体电阻条108的厚度,x为引入的一个中间变量,没有具体的物理意义,只是为了使公式(1)显得简洁明了,γ表示为拐角电阻的修正因子,n表示为台阶的数量;In the formula group, W represents the width of the second
步骤S5、将步骤S1得到的方块电阻Rsq,步骤S2得到的电阻R1以及步骤S3得到的电阻RA代入公式组(1)中,通过将测量得到的:第二半导体电阻条106的有效长度L1、凹槽107顶面的长度S1、台阶长度的一半S2、凹槽107侧壁的长度S3,台阶的数量n,拐角电阻的修正因子γ以及凹槽107侧壁与凹槽107底面的夹角β代入步骤S4建立的公式组中,得到半导体导电薄膜厚度,表达式为:Step S5: Substitute the sheet resistance R sq obtained in step S1, the resistance R1 obtained in step S2, and the resistance RA obtained in step S3 into the formula group ( 1 ), obtained by measuring: the effective value of the second
综上所述,本发明的测试方法简单,采用简单的直流电流源作为激励源,采用普通的电压测试设备,完成所有的激励与测试过程。测试结构采用基本的微机电加工工艺完成。To sum up, the testing method of the present invention is simple, using a simple DC current source as the excitation source, and using common voltage testing equipment to complete all excitation and testing processes. The test structure was completed using a basic MEMS process.
参见图3,下面以典型的两层半导体微机电表面加工工艺说明测试结构的制作过程。Referring to FIG. 3 , the fabrication process of the test structure is illustrated below with a typical two-layer semiconductor MEMS surface processing process.
选择N型半导体硅片,热生长100纳米厚度的二氧化硅层,通过低压化学气相沉积工艺淀积一层500纳米厚度的氮化硅,形成绝缘衬底118。采用低压化学气相沉积工艺沉积一层300纳米的半导体并进行N型重掺杂使该层半导体成为导体,通过光刻工艺刻蚀形成锚区(109-114)的一部分。使用低压化学气相沉积工艺沉积2000纳米厚度的介质层117,通过光刻工艺形成锚区(109-114)的图形以及凹槽107。An N-type semiconductor silicon wafer is selected, a silicon dioxide layer with a thickness of 100 nanometers is thermally grown, and a layer of silicon nitride with a thickness of 500 nanometers is deposited by a low pressure chemical vapor deposition process to form an insulating
利用低压化学气相沉积工艺淀积一层1500纳米厚度的半导体层116,对半导体层116进行N型重掺杂,光刻工艺形成半导体测试结构图形和锚区(109-114),锚区(109-114)的厚度为两次半导体的厚度之和。A layer of
本发明未详述之处,均为本领域技术人员的公知技术。The parts that are not described in detail in the present invention are known techniques of those skilled in the art.
以上详细描述了本发明的较佳具体实施例。应当理解,本领域的普通技术人员无需创造性劳动就可以根据本发明的构思作出诸多修改和变化。因此,凡本技术领域中技术人员依本发明的构思在现有技术的基础上通过逻辑分析、推理或者有限的实验可以得到的技术方案,皆应在由权利要求书所确定的保护范围内。The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make many modifications and changes according to the concept of the present invention without creative efforts. Therefore, any technical solutions that can be obtained by those skilled in the art through logical analysis, reasoning or limited experiments on the basis of the prior art according to the concept of the present invention shall fall within the protection scope determined by the claims.
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