CN114582837A - Electrical test structure and method for monitoring Fin spacing drift in FinFET process - Google Patents

Abstract

The invention discloses an electrical test structure and a test method for monitoring Fin spacing drift in FinFET process₀Selecting at least one Fin to be tested from the rest Fins and recording the Fin as Fin_n；Fin_nAnd Fin₀Parallel arrangement, Fin_nAnd Fin₀A certain distance is formed between the first and second plates to form a first distance; wherein n is a positive integer; at least one first connecting part is marked as Link _ A, and at least one second connecting part is marked as Link _ B; link _ A and Fin_nElectrically connected, Link _ B and Fin₀And (6) electrically connecting. The electrical test structure provided by the invention is simple and easy to manufacture, and is suitable for the interval drift generated in the Fin manufacturing process in the FinFET process production process(Pitch Walking) problems are monitored, process production defects can be found in time, the semiconductor production process can be effectively corrected, and the yield of products is improved.

Description

An electrical test structure and method for monitoring Fin pitch drift in FinFET process

technical field

The invention relates to the technical field of semiconductor device testing, in particular to an electrical testing structure and a testing method for monitoring Fin Pitch Walking (Fin Pitch Walking) in a FinFET process.

Background technique

With the continuous development of large-scale integrated circuit technology and the continuous improvement of circuit integration, when the process technology node is less than 28nm, traditional planar MOS devices have been gradually replaced by three-dimensional fin field effect transistors (FinFETs) due to rapid performance degradation. the trend of. Compared with planar transistors, FinFET generally includes a semiconductor substrate, an oxide layer and a gate structure. A protruding structure is formed on the semiconductor substrate. The oxide layer covers the surface of the semiconductor substrate and a part of the sidewall of the protruding structure. The part beyond the oxide layer becomes the fin (Fin) of the FinFET, the gate structure spans on the fin and covers the top and sidewalls of the fin, and the gate structure includes a gate dielectric layer and a gate electrode on the gate dielectric layer. For a FinFET, the top of the fin and the part of the sidewalls on both sides in contact with the gate structure become the channel region, that is, there are multiple gates, which is beneficial to increase the driving current and improve the device performance.

The most critical step in the FinFET process is the preparation of Fin. In order to increase the integration density of semiconductor devices, self-aligned double patterning technology (SADP, Self-aligned Double Patterning) and self-aligned quadruple patterning technology (SAQP) are used in the prior art. , Self-aligned Quadruple Patterning) and other process methods to prepare Fin. When the FinFET process technology node enters below 7 nanometers, SAQP technology replaces SADP technology, and the process complexity is correspondingly at least doubled. In SAQP technology, one Mandrel (mandrel) deposits 2 Spacer (side walls) 1, 2 Spacer1 deposits 4 Spacer2, and finally 4 Fins (fins) can be obtained through pattern transfer. In the self-aligned dual pattern technique, the distance between Fins is controlled by the width of the Mandrel and the distance between the Spacers, respectively. In the self-aligned quadruple pattern technique, the distance between Fins is controlled by the width of the Mandrel, the distance between the Mandrels and the width of the Spacer, respectively. If these variables are not controlled accurately, the distance between Fins will be inconsistent, which will lead to the problem of Pitch Walking (spacing drift).

At present, there are two main methods for detecting the Pitch Walking problem: one is optical measurement, which directly measures the distance between different Fins by optical means to find abnormal points. This detection method is slow and inefficient. The amount is small, and it depends on the selection of the measurement area, which is easily affected by random fluctuations; the other is the transistor performance test, which measures the performance of a large number of transistors. If there is an abnormality, this method takes a long time to detect, and because there are many factors affecting the performance of the transistor, it cannot be determined whether the abnormality is caused by Pitch Walking.

SUMMARY OF THE INVENTION

In view of all or part of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide an electrical test structure and a test method for monitoring Fin pitch drift in a FinFET process, and the electrical test structure provided by the present invention is simple and easy to manufacture. , its test method is suitable for the FinFET process production process, to monitor the pitch drift (Pitch Walking) problem generated in the Fin manufacturing process, it can timely detect process production defects and effectively correct the semiconductor production process, improve product yield.

In order to realize the above-mentioned purpose of the invention, the present invention provides the following technical solutions:

The present invention provides an electrical testing structure for monitoring Fin spacing _drift in a FinFET process. The root is Fin to be measured and is denoted as Fin _n ; Fin _n and Fin ₀ are arranged in parallel, and there is a certain distance between Fin _n and Fin ₀ to form the first spacing; wherein, n is a positive integer; , At least one second connection part is denoted as Link_B; Link_A is electrically connected to Fin _n , and Link_B is electrically connected to Fin ₀ .

Define the extension direction of the Fin as the horizontal direction, and be perpendicular to the extension direction of the Fin as the vertical direction, and Fin _n and Fin ₀ are arranged in parallel along the vertical direction. ₀ Above the vertical direction, the first Fin to be tested arranged from bottom to top along the vertical direction is recorded as Fin ₁ , and Fin ₀ is located below the vertical direction of the Fin ₁ . Link_A is electrically connected to Fin ₁ , and Link_B is electrically connected to Fin ₀ . It is defined that Fin _n is located above Fin ₀ , the second connection part straddles Fin ₀ , and the end located above Fin ₀ is denoted as a terminal. According to the position of Link_B, it can be divided into the following three situations:

(1) When the Link_B terminal moves to Fin ₁ and is just connected to Fin ₁ , Link_A and Link_ B are turned on through Fin ₁ , and ideal electrical parameter values can be obtained during electrical testing;

(2) When the Link_B terminal is moved to the top of Fin ₁ and connected to Fin ₁ , Link_A and Link_ B are turned on through Fin ₁ , and ideal electrical parameter values can be obtained during electrical testing;

(3) When the Link_B terminal is moved to the bottom of Fin ₁ and is not connected to Fin ₁ , Link_A and Link_ B cannot be turned on through Fin ₁ , and ideal electrical parameter values cannot be obtained during electrical testing.

For the convenience of description, it is assumed that the offset between the position of Link_B and the initial position (for example, the lower end of Fin ₀ , that is, the end of Fin ₀ away from Fin _n ) is a standard distance. Estimate the presence or absence of pitch drift. At least when Link_B and Link_A cannot be turned on, it can be known that there is a pitch drift, that is, the first pitch is greater than the standard pitch. The electrical testing structure provided by the present invention can at least be used to test whether one or more Fins to be tested have distance drift during the production process.

The standard spacing may be the standard spacing between adjacent Fins, and of course, it may also refer to the standard spacing between non-adjacent Fins and Fins according to actual needs, and may be specially set according to different situations. The standard spacing between adjacent or non-adjacent Fins can be adjusted accordingly according to process requirements.

The "above" and "below" in the text are only for the convenience of description and are not intended to limit the present invention.

In some technical solutions, there are at least two second connection parts, denoted as Link_1_B and Link_2_B; Link_A is electrically connected to Fin ₀ and Fin _n , and both Link_1_B and Link_2_B are electrically connected to Fin ₀ , and it is defined that Fin _n is located at Fin ₀ Above, the second connection part spans Fin ₀ , the end above Fin ₀ is marked as a terminal, and the vertical distances between the terminals of Link_1_B and Link_2_B and the end of Fin ₀ away from Fin _n are different. And the vertical distance between the terminals of the two second connection parts may be a preset standard distance. When at least two second connecting parts are provided, one of the second connecting parts can determine the starting position A, the other second connecting part can determine the ending position B, and the vertical distance between the terminals of the two second connecting parts is Link_2_B the offset S. For ease of description, it is assumed that the Link_1_B terminal is moved to the lower end of Fin ₀ and is connected to Fin _0. If Link_2_B and Link_A cannot be turned on through Fin _n , it can be determined that there is a gap drift.

In some technical solutions, there are at least two Fins to be tested, denoted as Fin ₁ and Fin ₂ , Fin ₀ , Fin ₁ and Fin ₂ are arranged in parallel in sequence, and the distance between Fin ₀ and Fin ₁ is the first Spacing, there is a certain distance between Fin ₁ and Fin ₂ , which constitutes a second distance; the second connecting parts are at least two, denoted as Link_1_B and Link_2_B; Link_A is electrically connected to Fin ₁ and Fin ₂ , and both Link_1_B and Link_2_B are It is electrically connected to Fin ₀ , and it is defined that Fin ₁ is located above Fin ₀ , the second connection part straddles Fin ₀ , the end located above Fin ₀ is denoted as a terminal, and the terminals of Link_1_B and Link_2_B are connected to Fin ₀ away from Fin _n . The vertical distance between the ends is different. And the vertical distance between the terminals of the two second connection parts may be a preset standard distance. When the number of Fins to be measured is two, there are correspondingly two distances to be measured, the first distance is between Fin ₀ and Fin ₁ , and the second distance is between Fin ₁ and Fin ₂ .

For the convenience of description, it is assumed that the offset between the position of Link_1_B and the initial position (for example, the lower end of Fin ₀ ) is the standard spacing, and whether there is spacing drift in Fin ₁ can be evaluated by judging whether Link_1_B and Link_A are connected. By judging whether Link_ 2_ B and Link_ A are turned on, it is evaluated whether there is a gap drift. If Link_1_B and Link_A are not conducting, it can be known that the first spacing is smaller than the standard spacing; if Link_2_B and Link_A are not conducting, and Link_1_B and Link_A are conducting, it can be known that the second spacing is less than the standard spacing.

In some technical solutions, there are at least three second connection parts, denoted as Link_1_B, Link_2_B, and Link_3_B; Link_A is electrically connected to Fin ₀ , Fin ₁ , and Fin ₂ , and Link_1_B, Link_2_B, and Link_3_B are all electrically connected to Fin ₀ , the vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the end of Fin ₀ away from Fin _n are all different. And the vertical distance between the two terminals may be a preset standard distance. For the convenience of description, it is assumed that the Link_1_B terminal is moved to the lower end of Fin ₀ and just connected to Fin _0. If Link_2_B and Link_A are not connected, it can be known that the first distance is smaller than the standard distance; if Link_3_B and Link_A are not connected The connection between Link_3_B and Link_A is connected, and it can be known that the second spacing is smaller than the standard spacing.

In some technical solutions, the electrical testing structure is an electrical testing unit, and the electrical testing unit includes Link_A, Link_1_B, Link_2_B, and Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin ₀ are all different, and the vertical distance between the two terminals can be a preset standard distance, and an electrical test unit can be used to complete the electrical test.

In other technical solutions, the electrical testing structure includes at least three electrical testing units, the first electrical testing unit includes Link_A and Link_1_B, the second electrical testing unit includes Link_A and Link_2_B, and the third electrical testing unit includes Link_A and Link_2_B. Each of the electrical test units includes Link_A, Link_3_B.

In other technical solutions, the electrical testing structure includes at least three electrical testing units, and each of the electrical testing units includes at least three of the first connection parts denoted as Link_1_A, Link_2_A, Link_3_A, at least one of the first connection parts Two connecting parts; Link_1_A connects Fin ₀ , Fin ₁ and Fin ₂ , Link_2_A connects Fin ₁ and Fin ₂ , and Link_3_A connects Fin ₂ ; the first electrical test unit includes Link_1_B, the second electrical test unit includes Link_2_B, The third said electrical test unit includes Link_3_B.

In some technical solutions, different electrical test units may share part or all of the first connection part. When there are multiple electrical testing units in the electrical testing structure, the multiple electrical testing units need to be tested respectively, wherein the positions of the second connection parts in different electrical testing units are different They are completely identical, but the positions of the first connection parts may be the same. In this case, when the positions of the second connection parts in different electrical test units are the same, the first connection part can be selected to be shared.

In some technical solutions, there are two or more of the first connection parts and/or the second connection parts connected to the same Fin _n and/or Fin ₀ . When the first connection part and the second connection part are connected to the Fin, the first connection part and the second connection part may not be accurately connected to the Fin due to the deviation of the connection or the deviation caused by the process itself. A connecting portion and/or a second connecting portion can reduce the resulting error in test results.

In some technical solutions, an etching process is used to etch Fins in whole or in part, so that Link_A and Link_B are connected to the corresponding Fin _n and/or Fin ₀ . The first connection part and the second connection part can be made to form ideal passages with the corresponding Fins.

In some technical solutions, a lead-out structure is also included, Link_A and/or Link_B are connected with the lead-out structure, and the lead-out structure is connected with Link_A and/or Link_B through a connection structure. The extraction structure may facilitate applying voltage or current to the first connection portion and the second connection portion.

In some technical solutions, Link_A and Link_B are located in the M0 layer, and the lead-out structure is located in the metal layer. Specifically, the connection structure may be filled with a metal medium in the through hole, so as to realize the connection between the first connection part, the second connection part and the lead-out structure.

Link_A and/or Link_B are perpendicular to the extending direction of the Fin.

The present invention also provides a test method for monitoring Fin spacing drift in a FinFET process, using any one of the electrical test structures in the above solutions, and the test method includes the following steps:

S101: Preset the starting position A and the ending position B, define that Fin _n is located above Fin ₀ , the second connection part straddles Fin ₀ , the end located above Fin ₀ is denoted as a terminal, and the terminal of Link_B is set At B, the vertical distance between A and B is the offset S of Link_B;

S102: Apply current and/or voltage to Link_A and Link_B, perform electrical testing on the electrical testing structure, and obtain corresponding electrical parameter values;

S103: According to the obtained electrical parameter values, determine whether Link_B is connected to Fin _n , so as to evaluate the distance drift.

In some technical solutions, the adopted electrical test structure includes at least two of the second connection parts denoted as Link_1_B and Link_2_B; in S101, the terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, The vertical distance between A and B is S ₀ , and S ₀ is a preset reference offset value. S ₀ can be set according to actual needs.

Further, the adopted electrical test structure includes at least three of the second connection parts denoted as Link_1_B, Link_2_B and Link_3_B, at least two of the Fins to be tested are denoted as Fin ₁ and Fin ₂ ; Fin ₀ , Fin ₁ , Fin ₂ are arranged in parallel in sequence; Link_A is electrically connected to Fin ₀ , Fin ₁ and Fin ₂ ; in S101 , the terminal of Link_1_B is set at A, the terminal of Link_2_B is set at B, the terminal of Link_3_B is set at C, A The vertical distance between B and B is S ₀ , the vertical distance between B and C is S ₀ , and the vertical distance between A and C is 2S ₀ .

In some technical solutions, the initial position A is the position of the end of Fin ₀ away from Fin _n . Of course, corresponding adjustments can also be made according to the specific measurement standard for the distance between Fin and Fin.

In some technical solutions, the preset reference offset value S ₀ is a standard distance between Fin and Fin. Specifically, the standard spacing may be a standard spacing between adjacent Fins or a standard spacing between non-adjacent Fins.

In some technical solutions, the adopted electrical testing structure includes at least three electrical testing units, the first electrical testing unit includes Link_A and Link_1_B, the second electrical testing unit includes Link_A and Link_2_B, and the third electrical testing unit includes Link_A and Link_2_B. Each of the electrical test units includes Link_A and Link_3_B; Link_A of at least three of the electrical test units are all electrically connected to Fin ₀ , Fin ₁ and Fin ₂ ; Apply current to both ends of Link_3_B, measure the voltage, and calculate the resistance value; obtain the curve of the resistance value changing with the offset S, find the mutation point of the resistance value, and obtain the corresponding target second connection part at the mutation point of the resistance value and record it as Link_target_B and its offset Si; wherein, _i is a positive integer, i≤n; compare the difference of the offset Si between different _{Link_target_Bs} to evaluate the severity of distance drift.

In other technical solutions, the electrical testing structure includes at least three electrical testing units, and each of the electrical testing units includes at least three of the first connection parts, denoted as Pin1, Pin2, and Pin3; The electrical testing unit includes Link_1_B, the second electrical testing unit includes Link_2_B, and the third electrical testing unit includes Link_3_B; voltage is applied at both ends of Pin1 and Link_1_B, both ends of Pin1 and Link_2_B, and both ends of Pin1 and Link_3_B; Apply voltage across Pin2 and Link_1_B, Pin2 and Link_2_B, Pin2 and Link_3_B; apply voltage across Pin3 and Link_1_B, Pin3 and Link_2_B, Pin3 and Link_3_B; measure the leakage current respectively to obtain the current value , obtain the curve M _j of the corresponding current value changing with the offset S, j is a positive integer; find the sudden change point of the current value on the curve M _j , and obtain the corresponding target second connection part at the sudden change point of the current value and record it as Link_target_B and its offset Si; wherein, _i is a positive integer, i≤n; compare the difference of the offset Si between different _{Link_target_B} to evaluate the severity of distance drift.

Compared with the prior art, the present invention at least has the following beneficial effects:

The present invention forms an electrical testing structure through the first connecting part and the second connecting part, and tests the spacing between Fins to evaluate the spacing deviation of the Fins, and the electrical testing structure is simple and easy to manufacture. The electrical testing structure and method for monitoring Fin pitch drift provided by the present invention are suitable for the FinFET process production process to monitor the problem of pitch walking (Pitch Walking) generated in the Fin manufacturing process, so as to timely discover process production defects and effectively correct them Semiconductor production process to improve product yield.

Description of drawings

In order to illustrate the technical solutions in the specific embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.

1 is a schematic diagram of an electrical test structure in Embodiment 1 of the present invention;

2 is a graph of resistance and offset S drawn after the electrical test in Example 1 of the present invention;

3 is a schematic diagram of an electrical test structure in Embodiment 2 of the present invention;

FIG. 4 is a graph of current and offset S drawn after the electrical test in Example 2 of the present invention.

Reference numerals: 1-first connection part; 2-second connection part; 3-lead structure; 4-connection structure; 5-mandrel; 31-first lead-out structure; 32-second lead-out structure; 33-th Three lead-out structures; 34-the fourth lead-out structure.

S in FIGS. 1 and 3 represents the vertical distance between the terminal end of the second connection part and the lower end of Fin ₀ or the offset of the second connection part.

"Three fins" in Figures 2 and 4 refers to the case where the second connecting part spans and connects three Fins, "two fins" refers to the case where the second connecting part spans and connects two Fins, "one fin" "Fin" refers to the situation where the second connecting part spans and connects a Fin.

Detailed ways

The technical solutions in the specific embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. The definitions of parameters such as the starting position, the ending position, and the offset involved in the following embodiments are to be understood according to the specific application in the embodiments, and are not limited to one-to-one correspondence with the foregoing invention contents.

Example 1

An embodiment of the present invention provides an electrical test structure and a test method for monitoring Fin Pitch Walking in a FinFET process.

As shown in FIG. 1 , four mandrels 5 and eight Fins distributed on both sides of the four mandrels 5 are formed. The extension direction of Fin is defined as the horizontal direction, the extension direction perpendicular to the Fin is the vertical direction, and the Fins are arranged in parallel along the vertical direction. The vertical direction and the horizontal direction described here are only to facilitate the description of the technical solution, and are not intended to limit the present invention; similarly, the number of the corresponding mandrels 5 and Fin is only an example for the convenience of description, and should not be interpreted as a reference to the present invention. Limitation of the scope of protection.

In this embodiment, the first three Fins, the first mandrel 5 and the lower half of the second mandrel 5 are etched from bottom to top in the vertical direction, and the fourth Fin from bottom to top in the vertical direction is etched. The root Fin is the non-tested Fin (denoted as Fin ₀ ), the fifth Fin is the first under-tested Fin (denoted as Fin ₁ ), and the sixth Fin is the second under-tested Fin (denoted as Fin ₂ ). A first distance is formed between Fin ₀ and Fin ₁ , and a second distance is formed between Fin ₁ and Fin ₂ . It should be noted that, in other embodiments, the number of Fins to be tested may be determined or evaluated according to the actual situation. In other embodiments, other Fins may also be selected as Fins to be tested or Fins not to be tested.

The electrical testing structure includes at least three electrical testing units (only one of which is shown in FIG. 1 ), and each electrical testing unit includes at least one first connection part 1 , at least one second connection part 2 and at least four leads Structure, the first connecting part 1 and the second connecting part 2 are both perpendicular to the extending direction of Fin. Only one first connection part 1 , one second connection part 2 and four lead-out structures of one electrical test unit are shown in FIG. 1 . The second connection part 2 of the first electrical test unit is denoted as Link_1_B, the second connection part 2 of the second electric test unit is denoted as Link_2_B, and the second connection part 2 of the third electric test unit is denoted as Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin ₀ are all different, and the vertical distance between the two terminals is a preset standard distance. It is defined that Fin ₁ is located above Fin ₀ , the second connecting part spans on Fin ₀ , the end located above Fin ₀ is denoted as a terminal, and the lower end of Fin ₀ refers to the end of Fin ₀ away from Fin ₁ .

In the FinFET process, a metal layer is formed, a first connection part 1 is formed on the M0 layer, that is, the first metal layer, a second connection part 2 is formed on the metal layer, and the first connection part 1 and the second connection part 2 are connected by Structure 4 is connected to the outgoing structure. Specifically, in this embodiment, the connection structure 4 may be formed by filling the through hole with a metal medium to realize the connection between the first connection part 1 and the second connection part 2 and the lead-out structure 3 .

For the convenience of description, only three electrical test units are used as an example to illustrate the principle of this embodiment. However, in the actual implementation process of this embodiment, it is not limited to use only three electrical test units, and usually N electrical test units are used. N is a positive integer not less than 3. The following are ideal settings: As shown in Figure 1, the first connection part 1 of the first electrical test unit, Link_A, spans and connects Fin ₀ , Fin ₁ , and Fin ₂ , and Link_1_B is connected to Fin ₀ , and the terminal of Link_1_B is connected to Fin 0 , Fin 1 , and Fin 2 . The vertical distance between the lower ends of Fin ₀ is denoted as S ₁ . The first connection part 1 of the second electrical test unit, namely Link_A straddles and connects Fin ₀ , Fin ₁ , Fin ₂ , Link_2_B straddles and connects Fin ₀ , Fin ₁ , and the vertical connection between the terminal of Link_2_B and the lower end of Fin ₀ The distance is denoted as S ₂ . The first connection part 1 of the third electrical test unit, namely Link_A straddles and connects Fin ₀ , Fin ₁ , Fin ₂ , Link_3_B straddles and connects Fin ₀ , Fin ₁ , Fin ₂ , the terminal of Link_3_B and the lower end of Fin ₀ The vertical distance between them is denoted as S ₃ . For example, in an ideal situation where there is no distance drift, preset starting position A, first end position B, and second end position C, the terminal of Link_1_B is set at A, and the terminal of Link_2_B is set at B , the terminal of Link_3_B is set at C, the vertical distance between A and B is S ₀ , the vertical distance between B and C is S ₀ , and the vertical distance between A and C is 2S ₀ . Among them, S ₀ is the standard spacing between adjacent Fins. In this case, if the starting position A is the position of the end of Fin ₀ away from Fin ₁ , then the offset of Link_1_B (the vertical distance between the terminal of Link_1_B and the lower end of Fin ₀ ) S ₁ =0, then Link_2_B The offset (the vertical distance between the Link_2_B terminal and the lower end of Fin ₀ , that is, the vertical distance between A and B) S ₂ =S ₀ , then the offset of Link_3_B (the link between the Link_3_B terminal and the lower end of Fin ₀ ) The vertical distance between A and C, that is, the vertical distance between A and C) S ₃ =2S ₀ . In fact, as shown in Figure 1, S ₁ is not equal to 0, that is, the starting position A (terminal of Link_1_B) is not at the end of Fin ₀ far from Fin ₁ , and the offset S ₂ is not equal to the distance between A and B. Vertical distance, offset S ₃ is not equal to the vertical distance between A and C. The first connection parts 1 in the above three electrical test units may be provided separately, or may share the same first connection part 1 . "Upper" and "lower" are only for the convenience of description of the technical solution, and are not intended to limit the present invention. Taking three electrical test units as an example, and defining the vertical distance between the second connection part 2 and the lower end of Fin ₀ in the three electrical test units is also for the convenience of description. In practical applications, usually three are not directly set in advance. The second connection parts 2 connected to different Fins respectively, but the second connection parts 2 connected to different Fins can be known only after a large number of tests.

In practical applications, multiple electrical test units can be used as needed, and of course, it can also be one electrical test unit. Different electrical test units are used as examples to illustrate. During the electrical test process, preferably, the number of electrical test units more than three. On the one hand, in order to accurately know the severity of the spacing drift, it is necessary to preset a small offset, that is, the vertical distance between the terminal of the second connection part 2 of the different electrical test units and the lower end of Fin ₀ can be different and the gap is relatively large. In this case, it is possible to more accurately know when the electrical parameters change abruptly in the process of subsequent testing, so as to more accurately know the severity of the distance drift. On the other hand, by arranging the second connection parts 2 of different electrical testing units at the same or similar positions, the different electrical testing units are tested to reduce the influence of process or operation errors on the results. In other embodiments, an electrical test unit may further include a plurality of first connection parts 1 and/or a plurality of second connection parts 2, and a plurality of first connection parts 1 in an electrical test unit may span and be connected For the same Fin, a plurality of second connecting parts 2 can span across and connect the same Fin. The influence of errors on the results can be reduced in the same electrical test unit inspection. For the convenience of description, this embodiment is described by taking an example that each electrical test unit has a first connection part 1 and a second connection part 2, and the present invention is not limited to this. FIG. 1 corresponding to this embodiment only shows one second connection part 2 in one electrical test unit, in practice, a plurality of second connection parts 2 may be used in one electrical test unit as required.

In an electrical test unit, the first connecting part 1 is connected with two lead-out structures, denoted as the first lead-out structure 31 and the second lead-out structure 32; the second connection part 2 is connected with two lead-out structures, denoted as the third lead-out structure structure 33 and fourth lead-out structure 34 . It should be noted that, when a plurality of first connection parts 1 or a plurality of second connection parts 2 are provided in one electrical test unit, each first connection part 1 is connected with a first lead-out structure 31 and a second lead-out structure 32. A plurality of first connecting parts 1 can be connected together with a first lead-out structure 31 and a second lead-out structure 32; each second connecting part 2 is connected with a third lead-out structure 33 and a fourth lead-out structure 34. The two connecting parts 2 can be connected to a third lead-out structure 33 and a fourth lead-out structure 34 in common.

The test method includes: for each electrical test unit, the power supply applies current to both ends of the second lead-out structure 32 and the third lead-out structure 33, and the voltage is measured from both ends of the first lead-out structure 31 and the fourth lead-out structure 34, and the calculation is obtained. resistance. Ideally, when there are only three electrical test units, it is necessary to ensure that Link_1_B is connected to Fin ₀ , Link_2_B is connected to Fin ₀ and Fin ₁ , Link_3_B is connected to Fin ₀ , Fin ₁ and Fin ₂ , and the second connection part 2 is connected to The corresponding result can be measured only when the vertical distance between the terminal and the lower end of Fin ₀ is different.

FIG. 2 shows the change curve of the offset S and the resistance value when there are multiple electrical test units, that is, when there are multiple second connection parts 2 with different offsets. As shown in Figure 2, there are three mutation positions in the curve, and the corresponding offsets S ₁ , S ₂ , and S ₃ are obtained at the sudden changes, which correspond to the preset vertical distance between the Link_1_B terminal and the lower end of Fin ₀ , and the preset The vertical distance between the Link_2_B terminal and the lower end of Fin ₀ , and the preset vertical distance between the Link_3_B terminal and the lower end of Fin ₀ . In this default situation, Link_1_B is the first target second connection part Link_target_B, Link_2_B is the second target second connection part Link_target_B, and Link_3_B is the third target second connection part Link_target_B.

Combining Figure 1 and Figure 2, the interval between Fin ₀ and Fin ₁ , Fin ₁ and Fin ₂ can be obtained: the interval between Fin ₀ and Fin ₁ P1=S ₂ -S ₁ ; between Fin ₁ and Fin ₂ The interval P2=S ₃ -S ₂ . By comparing the sizes of P1 and P2, the severity of pitch walking (Pitch Walking) can be obtained.

The principle of this embodiment: when Link_1_B is connected to Fin ₀ , a Fin is connected between the first extraction structure 31 and the fourth extraction structure 34; when Link_2_B is connected to Fin ₀ and Fin ₁ , the first extraction structure 31 and the fourth extraction structure 34 are connected Two Fins are connected in parallel between the structures 34 ; when Link_3_B is connected to Fin ₀ , Fin ₁ , and Fin ₂ , three Fins are connected in parallel between the first extraction structure 31 and the fourth extraction structure 34 . The more Fins connected in parallel between the first extraction structure 31 and the fourth extraction structure 34, the lower the resistance value, and the number of Fins connected in parallel between the first extraction structure 31 and the fourth extraction structure 34 increases by one, and the resistance value at both ends thereof increases. will change. Through the sudden change of the resistance value, it can be known that the number of Fins connected in parallel between the first lead-out structure 31 and the fourth lead-out structure 34 has changed, so it can be known that the Fin connected by the second connection part 2 has changed, and it can be known that the passage between adjacent sudden changes The distance between adjacent Fins can be obtained by how much offset is needed. After knowing the distance between multiple Fins, the severity of the distance drift can be evaluated.

In this embodiment, only the distance drift between three Fins (two of which are Fins to be measured) is measured. According to actual needs, the distance drift between more Fins may also be measured in other embodiments. In this embodiment, the distance drift between three adjacent Fins is measured. In other embodiments, of course, the distance between non-adjacent Fins can also be tested, so as to evaluate the severity of the distance drift in a wide range.

The difference in the offsets of the second connection parts 2 in the same or different electrical test units may be small. Especially when a plurality of second connection parts ₂ are set in the same electrical test unit, the difference in the offset can be small. It is smaller than the spacing between adjacent Fins to be tested, so that fine and/or local fine migration due to defects and the like can be detected. The plurality of second connection parts 2 may be arranged at equal intervals, and may also be arranged according to other needs. The present invention does not limit the length of the second connecting parts 2 , and the lengths of the plurality of second connecting parts 2 may be the same or different.

Example 2

Another embodiment of the present invention provides an electrical testing structure and a testing method for monitoring Fin PitchWalking in a FinFET process.

As shown in FIG. 3 , three mandrels 5 and six Fins distributed on both sides of the three mandrels 5 are formed. The extension direction of Fin is defined as the horizontal direction, the extension direction perpendicular to the Fin is the vertical direction, and the Fins are arranged in parallel along the vertical direction. The vertical direction and the horizontal direction described here are only to facilitate the description of the technical solution, and are not intended to limit the present invention; similarly, the number of the corresponding mandrels 5 and Fin is only an example for the convenience of description, and cannot be understood as the present invention. Limitation of the scope of protection.

The electrical test structure includes at least three electrical test units (only one of which is shown in FIG. 3 ), and each electrical test unit includes at least three first connection parts 1 , at least one second connection part 2 and at least one lead-out In structure 3, both the first connecting part 1 and the second connecting part 2 are perpendicular to the extending direction of Fin. In FIG. 3 , only three first connection parts 1 , two second connection parts 2 and one lead-out structure 3 of one electrical test unit are shown. The second connection part 2 of the first electrical test unit is denoted as Link_1_B, the second connection part 2 of the second electric test unit is denoted as Link_2_B, and the second connection part 2 of the third electric test unit is denoted as Link_3_B. The vertical distances between the terminals of Link_1_B, Link_2_B, and Link_3_B and the lower end of Fin ₀ are all different, and the vertical distance between the two terminals is a preset standard distance.

In the FinFET process, a metal layer is formed, a first connection part 1 is formed on the M0 layer, that is, the first metal layer, a second connection part 2 is formed on the metal layer, and the second connection part 2 is connected through the connection structure 4 and the extraction structure 3 . connected. Specifically, in this embodiment, the connection structure 4 may be formed by forming a through hole and then filling the through hole with a metal medium, so as to realize the connection between the second connection portion 2 and the lead-out structure 3 . In this embodiment, the three first connecting parts 1 do not need to be drawn out through the lead-out structure 3, but are directly connected to the Pin, and the three first connecting parts 1 are defined as Pin1, Pin2, and Pin3, respectively. In other embodiments, the first connection portion 1 may also be connected to the lead-out structure 3 according to actual needs.

In this embodiment, in the area where Pin1 is located, the first three Fins, the first mandrel 5 and the lower half of the second mandrel 5 are etched from bottom to top in the vertical direction, and the bottom half of the second mandrel 5 is etched in the vertical direction. The fourth Fin above is the non-tested Fin (denoted as Fin ₀ ), the fifth Fin is the first under-tested Fin (denoted as Fin ₁ ), and the sixth Fin is the second under-tested Fin (denoted as Fin 1 ). for Fin ₂ ). In the area where Pin2 is located, the first four Fins, the first mandrel 5 and the second mandrel 5 are etched from bottom to top along the vertical direction. In the area where Pin3 is located, the first five Fins, the first mandrel 5 , the second mandrel 5 , and the lower half of the third mandrel 5 are etched from bottom to top along the vertical direction. A first distance is formed between Fin ₀ and Fin ₁ , and a second distance is formed between Fin ₁ and Fin ₂ .

For the convenience of description, only three electrical test units are used as an example to illustrate the principle of this embodiment. However, in the actual implementation process of this embodiment, it is not limited to use only three electrical test units, and usually N electrical test units are used. N is a positive integer not less than 3. The following are ideal settings: As shown in Figure 3, the first electrical test unit includes Pin1, Pin2, and Pin3. Pin1 straddles and connects Fin ₀ , Fin ₁ , and Fin ₂ , and Pin2 straddles and connects Fin ₁ and Fin. ₂ , Pin3 straddles and connects Fin ₂ . As shown in FIG. 3 , Link_1_B is connected to Fin ₀ , and the vertical distance between the terminal of Link_1_B and the lower end of Fin ₀ is denoted as S ₁ . Link_2_B straddles and connects Fin ₀ and Fin ₁ , and the vertical distance between the terminal of Link_2_B and the lower end of Fin ₀ is denoted as S ₂ . Link_3_B straddles and connects Fin ₀ , Fin ₁ , and Fin ₂ , and the vertical distance between the terminal of Link_3_B and the lower end of Fin ₀ is denoted as S ₃ . For example, in an ideal situation where there is no distance drift, preset starting position A, first end position B, and second end position C, the terminal of Link_1_B is set at A, and the terminal of Link_2_B is set at B , the terminal of Link_3_B is set at C, the vertical distance between A and B is S ₀ , the vertical distance between B and C is S ₀ , and the vertical distance between A and C is 2S ₀ . Among them, S ₀ is the standard spacing between adjacent Fins. In this case, if the starting position A is the position of the end of Fin ₀ away from Fin ₁ , then the offset of Link_1_B (the vertical distance between the terminal of Link_1_B and the lower end of Fin ₀ ) S ₁ =0, then Link_2_B The offset (the vertical distance between the Link_2_B terminal and the lower end of Fin ₀ , that is, the vertical distance between A and B) S ₂ =S ₀ , then the offset of Link_3_B (the link between the Link_3_B terminal and the lower end of Fin ₀ ) The vertical distance between A and C, that is, the vertical distance between A and C) S ₃ =2S ₀ . In fact, as shown in Figure 1, S ₁ is not equal to 0, that is, the starting position A (terminal of Link_1_B) is not at the end of Fin ₀ away from Fin ₁ , and the offset S ₂ is not equal to the distance between A and B. Vertical distance, offset S ₃ is not equal to the vertical distance between A and C. The three first connection parts 1 in the above three electrical test units may be provided separately, or the three first connection parts 1 may be shared. Taking three electrical test units as an example, and defining the vertical distance between the second connection part 2 and the lower end of Fin ₀ in the three electrical test units is also for the convenience of description. In practical applications, usually three are not directly set in advance. The second connection parts 2 connected to different Fins respectively, but the second connection parts 2 connected to different Fins can be known only after a large number of tests.

In an electrical test unit, a plurality of second connection parts 2 are commonly connected to one lead-out structure 3 . It should be noted that when more first connection parts 1 or more second connection parts 2 are set in one electrical test unit, each second connection part 2 can be connected to the same lead-out structure 3 .

The test method includes: for each electrical test unit, the power supply applies voltage to Pin1, Pin2, Pin3 and the extraction structure 3, and measures the leakage current from Pin1, Pin2, Pin3 and the extraction structure 3 to obtain the current value. Ideally, when there are only three electrical test units, it is necessary to ensure that Link_1_B is connected to Fin ₀ , Link_2_B is connected to Fin ₀ and Fin ₁ , Link_3_B is connected to Fin ₀ , Fin ₁ and Fin ₂ , and the second connection part 2 is connected to The corresponding result can be measured only when the vertical distance between the terminal and the lower end of Fin ₀ is different.

FIG. 4 shows the change curve of the offset S and the current value when there are multiple electrical test units, that is, when there are multiple second connection parts 2 with different offsets. As shown in Figure 4, there are three curves in total, representing the leakage current change curve between Pin1 and the extraction structure 3, the leakage current change curve between Pin2 and the extraction structure 3, and the leakage current change between Pin3 and the extraction structure 3 curve. There is one mutation position in each curve, and there are three mutation positions in Figure 4. The corresponding offsets S ₁ , S ₂ , and S ₃ are obtained at the sudden change, respectively corresponding to the vertical distance between the Link_1_B terminal and the lower end of Fin ₀ , the vertical distance between the Link_2_B terminal and the lower end of Fin ₀ , and the vertical distance between the Link_3_B terminal and the lower end of Fin ₀ . In this default situation, Link_1_B is the first target second connection part Link_target_B, Link_2_B is the second target second connection part Link_target_B, and Link_3_B is the third target second connection part Link_target_B.

Combining Fig. 3 and Fig. 4, the interval between Fin ₀ and Fin ₁ , Fin ₁ and Fin ₂ can be obtained: the interval between Fin ₀ and Fin ₁ P1=S ₂ -S ₁ ; between Fin ₁ and Fin ₂ The interval P2=S ₃ -S ₂ . By comparing the sizes of P1 and P2, the severity of pitch walking (Pitch Walking) can be obtained.

The principle of this embodiment: when Link_1_B is connected to Fin ₀ , Pin1 is connected to the lead-out structure 3, and both Pin2 and Pin3 cannot be connected to the lead-out structure 3; when Link_2_B is connected to Fin ₀ and Fin ₁ , Pin1, Pin2 and the lead-out structure 3 Conduction, Pin3 and lead-out structure 3 cannot be conducted; when Link_3_B is connected to Fin ₀ , Fin ₁ , Fin ₂ , Pin1, Pin2, Pin3 and lead-out structure 3 are connected. In the case of conduction, the corresponding leakage current can be measured. If it is not turned on, the current value will drop significantly. Through the sudden change of the current value, it can be seen that in the process of changing the offset S of the second connection part 2, when the Fins spanned and connected by the second connection part 2 are changed from three to two, the current value corresponding to Pin3 will decrease. , when the Fins spanned and connected by the second connecting part 2 change from two to one, the current value corresponding to Pin2 will decrease, and when the Fins spanned and connected by the second connecting part 2 change from one to zero, The current value corresponding to Pin1 will drop. Therefore, the curve mutation point corresponding to Pin1 is S ₁ , the curve mutation point corresponding to Pin2 is S ₂ , and the curve mutation point corresponding to Pin3 is S ₃ . The distance between adjacent Fins can be obtained by knowing how many offsets have passed between adjacent mutations, and the severity of the distance drift can be evaluated after knowing the distances between multiple Fins. In fact, the selection of the Fin to be measured, the selection of the offset, and the length of the second connecting portion 2 are similar to the relevant descriptions in Embodiment 1, and are not repeated here.

Example 3

Another embodiment of the present invention provides an electrical testing structure and a testing method for monitoring Fin PitchWalking in a FinFET process.

The difference between the electrical test structure provided in this embodiment and Embodiment 1 and Embodiment 2 is that there is only one electrical test unit in this embodiment, that is, multiple electrical test units in Embodiment 1 and Embodiment 2 are combined into one electrical test unit. unit. Set Link_1_B, Link_2_B, Link_3_B in the same electrical test unit.

The test method is the same as or similar to Embodiment 1 or Embodiment 2. The difference is: In Embodiment 1 and Embodiment 2, it is necessary to conduct electrical tests on different electrical test units respectively. This embodiment can be performed in one electrical test unit. Complete all electrical tests. During the test, the curve of the corresponding electrical parameters and the offset S can be directly obtained in an electrical test unit, and the distance between different Fins can be obtained from the curve mutation point, so as to evaluate the severity of the distance drift.

Example 4

Another embodiment of the present invention provides an electrical testing structure and a testing method for monitoring Fin PitchWalking in a FinFET process.

The difference between the electrical test structure provided in this embodiment and Embodiment 1 is that in this embodiment, there is only one Fin to be tested, denoted as Fin ₁ , and one non-to-be-measured Fin is denoted as Fin ₀ , and Fin ₁ and Fin ₀ are arranged in parallel. A first distance is formed between Fin ₀ and Fin ₁ . The electrical test structure includes at least one first connection part 1 (referred to as Link_A), at least one second connection part 2 and a lead-out structure 3 . For the convenience of description, two second connection parts 2 (referred to as Link_1_B and Link_2_B) are used as examples below to illustrate the principle of this embodiment. Of course, more second connection parts 2 can actually be provided, and each second connection part The offset S between 2 is less different. Link_A connects Fin ₀ and Fin ₁ , Link_1_B connects Fin ₀ , and Link_2_B connects Fin ₀ and Fin ₁ by default. The ideal setting is as follows: The vertical distance between the terminals of Link_1_B and Link_2_B and the end of Fin ₀ away from Fin ₁ (that is, the lower end of Fin ₀ ) is different. When the terminal of Link_1_B is located at the lower end of Fin ₀ , the offset S of Link_2_B is the vertical distance between the terminal of Link_2_B and the lower end of Fin ₀ .

The difference between the test methods is that in this embodiment, the difference between the three Fins (two Fins to be tested and one Fin not to be tested) is not judged by comparing the difference between the offsets S between the mutation positions obtained at the electrical parameter curve. The distance drifts, but according to whether the corresponding electrical parameters can be obtained to determine whether Link_2_B is connected to Fin ₁ , so as to determine the difference between the preset Link_2_B and Link_1_B offsets (set as the standard distance) and the first distance If there is a gap, assess the spacing drift. Specifically: the starting position A and the ending position B are preset, and it is defined that Fin ₁ is located above Fin ₀ , the second connecting part 2 is straddling Fin ₀ , the end located above Fin ₀ is denoted as the terminal, and the terminal of Link_1_B is set at At A, the terminal of Link_2_B is set at B, the vertical distance between A and B is S ₀ , and S ₀ is the preset reference offset value; when A is the lower end of Fin ₀ , S ₀ (Link_2_B offset) That is, the standard spacing, which is directly compared with the first spacing. In this embodiment, A is set as the lower end of Fin ₀ . Apply current to both ends of Link_A and Link_2_B respectively, test the voltage, and get the resistance value, so as to judge whether the connection between Link_A and Link_2_B is connected.

The number of the second connecting portion 2 may also be one. Take monitoring whether the distance drift occurs between two adjacent Fins as an example, preset the starting position A and the ending position B, define that Fin ₁ is located above Fin ₀ , Link_ B spans on Fin ₀ , and is located above Fin ₀ . One end is marked as the terminal, the terminal of Link_B is set at B, the vertical distance between A and B; the vertical distance between the terminal of Link_B and the lower end of Fin ₀ is the offset S of Link_B, when Link_B After the offset S of B and the initial position A are determined, when the initial position A is the lower end of Fin ₀ , the vertical distance between A and B is the offset S of Link_B, assuming that the offset S is the preset reference offset Shift amount S ₀ (set to the standard spacing between adjacent Fins). If the second connection portion 2 and the Fin ₁ are not conductive, that is, the corresponding electrical parameters are not measured, it is preliminarily estimated that there is a gap drift. In other embodiments, the initial position A may also be selected at other positions, and the offset S may not be the standard distance between adjacent Fins.

In some specific solutions, it is also possible to randomly monitor the distance drift between two non-adjacent Fins, or the distance shift between adjacent or non-adjacent Fins, only need to set the offset S When adjusting and selecting the appropriate preset reference offset S ₀ , it is possible to randomly monitor whether general spacing drift occurs in a large range.

The descriptions of the above embodiments are only used to help understand the method and the core idea of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, several improvements and modifications can also be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims (20)

1. An electrical test structure for monitoring Fin pitch drift in a FinFET process, formed with:

at least two Fins, one of which is a non-Fin to be tested and is recorded as Fin₀Selecting at least one Fin to be tested from the rest Fins and recording the Fin as Fin_n；Fin_nAnd Fin₀Parallel arrangement, Fin_nAnd Fin₀A certain distance is formed between the first and second plates to form a first distance; wherein n is a positive integer;

at least one first connecting part is marked as Link _ A, and at least one second connecting part is marked as Link _ B; link _ A and Fin_nElectrically connected, Link _ B and Fin₀And (6) electrically connecting.

2. The method of claim 1, for monitoring Fin spacing drift in a FinFET processThe electrical test structure is characterized in that at least two second connecting parts are marked as Link _1_ B and Link _2_ B; link _ A and Fin₀、Fin_nIs electrically connected with Link _1_ B and Link _2_ B and Fin₀Electrically connect, define Fin_nIs located in Fin₀Above, the second connecting part spans over Fin₀Above, at Fin₀The upper end is marked as the terminal, the terminals of Link _1_ B and Link _2_ B and Fin₀Upper distance Fin_nThe vertical distance between the ends of (a) and (b) is different.

3. The electrical test structure for monitoring Fin spacing drift in FinFET process of claim 1, wherein there are at least two Fins to be tested, which are denoted as Fin₁And Fin₂，Fin₀、Fin₁、Fin₂Are arranged in parallel in sequence, Fin₀And Fin₁Is the first distance, Fin₁And Fin₂A certain distance is formed between the first and second plates to form a second distance; at least two second connecting parts are marked as Link _1_ B and Link _2_ B; link _ A and Fin₁、Fin₂Is electrically connected with Link _1_ B and Link _2_ B and Fin₀Electrically connect, define Fin₁Is located in Fin₀Above, the second connecting part spans over Fin₀Above, at Fin₀The upper end is marked as the terminal, the terminals of Link _1_ B and Link _2_ B and Fin₀Upper distance Fin_nThe vertical distance between the ends of (a) and (b) is different.

4. The electrical test structure for monitoring Fin spacing drift in FinFET process according to claim 3, wherein said second connections are at least three, denoted as Link _1_ B, Link _2_ B and Link _3_ B; link _ A and Fin₀、Fin₁、Fin₂Electrically connected, Link _1_ B, Link _2_ B, Link _3_ B and Fin₀Electrically connecting the terminal of Link _1_ B, Link _2_ B, Link _3_ B with Fin₀Upper distance Fin_nAll have different vertical distances therebetween.

5. The electrical test structure for monitoring Fin spacing drift in FinFET process of claim 4, wherein said electrical test structure is an electrical test unit comprising Link _ A, Link _1_ B, Link _2_ B, Link _3_ B.

6. An electrical test structure used for monitoring Fin pitch drift in FinFET process, according to claim 4, wherein said electrical test structure comprises at least three electrical test units, the first of said electrical test units comprises Link _ A, Link _1_ B, the second of said electrical test units comprises Link _ A, Link _2_ B, and the third of said electrical test units comprises Link _ A, Link _3_ B.

7. The electrical test structure for monitoring Fin spacing drift in FinFET process according to claim 4, wherein said electrical test structure comprises at least three electrical test units, each of said electrical test units comprises at least three first connections, at least one second connection, and at least one Link _1_ A, Link _2_ A, Link _3_ A; link _1_ A connects Fin₀、Fin₁And Fin₂Link _2_ A connects Fin₁And Fin₂Link _3_ A connects Fin₂(ii) a The first electrical test unit comprises Link _1_ B, the second electrical test unit comprises Link _2_ B, and the third electrical test unit comprises Link _3_ B.

8. An electrical test structure for monitoring Fin pitch drift in FinFET process according to claim 6 or 7, wherein different electrical test units can share part or all of the first connection.

9. An electrical test structure for monitoring Fin spacing drift in FinFET process according to claim 1, wherein the same Fin is used_nAnd/or Fin₀The number of the first connecting parts and/or the second connecting parts is two or more.

10. The electrical test structure for monitoring Fin spacing drift in FinFET process of claim 1, wherein the Fin is etched wholly or partially by an etching process to achieve Link _ A, Link _ B connection with corresponding Fin_nAnd/or Fin₀。

11. The electrical test structure for monitoring Fin spacing drift in FinFET process according to claim 1, further comprising an extraction structure, wherein Link _ A and/or Link _ B are connected with the extraction structure, and the extraction structure is connected with Link _ A and/or Link _ B through a connection structure.

12. The electrical test structure for monitoring Fin pitch drift in a FinFET process of claim 11, wherein Link _ a and Link _ B are located in a M0 layer and the extraction structure is located in a metal layer.

13. An electrical test structure for monitoring Fin pitch drift in a FinFET process according to claim 1, wherein Link _ a and/or Link _ B is perpendicular to the Fin extension direction.

14. A test method for monitoring Fin pitch drift in a FinFET process, using the electrical test structure of any of claims 1-13, the test method comprising the steps of:

s101: presetting a starting position A and an end position B, and defining Fin_nIs located in Fin₀Above, the second connecting part spans over Fin₀Above, at Fin₀The upper end is marked as a terminal, the terminal of Link _ B is set at B, and the vertical distance between A and B is the offset S of Link _ B;

s102: applying current and/or voltage to Link _ A and Link _ B, and carrying out electrical test on the electrical test structure to obtain corresponding electrical parameter values;

s103: according to the obtained electrical parameter values, judgingWhether Link _ B is in contact with Fin_nConnected to evaluate pitch drift.

15. The test method for monitoring Fin spacing drift in FinFET process according to claim 14, wherein an electrical test structure is adopted, and the electrical test structure comprises at least two second connecting parts, which are denoted as Link _1_ B and Link _2_ B; in S101, the terminal of Link _1_ B is set at A, the terminal of Link _2_ B is set at B, and the vertical distance between A and B is S₀，S₀Is a preset reference offset value.

16. The test method for monitoring Fin spacing drift in FinFET process according to claim 15, wherein an electrical test structure is adopted, and the electrical test structure comprises at least three second connecting parts, which are denoted by Link _1_ B, Link _2_ B and Link _3_ B, and at least two Fins to be tested, which are denoted by Fin₁And Fin₂；Fin₀、Fin₁、Fin₂Are arranged in parallel in sequence; link _ A and Fin₀、Fin₁And Fin₂Electrically connecting; in S101, the terminal of Link _1_ B is set at A, the terminal of Link _2_ B is set at B, the terminal of Link _3_ B is set at C, and the vertical distance between A and B is S₀And the vertical distance between B and C is S₀The vertical distance between A and C is 2S₀。

17. The method of claim 14, 15 or 16, wherein the initial position a is Fin₀Upper distance Fin_nIs in position.

18. The test method for monitoring Fin spacing drift in FinFET process according to claim 15 or 16, wherein the preset reference offset value S₀Is the standard spacing between Fin and Fin.

19. The method of claim 16, for monitoring Fin pitch drift in a FinFET processThe test method is characterized in that the adopted electrical test structure comprises at least three electrical test units, wherein the first electrical test unit comprises Link _ A, Link _1_ B, the second electrical test unit comprises Link _ A, Link _2_ B, and the third electrical test unit comprises Link _ A, Link _3_ B; link _ A and Fin of at least three electrical test units₀、Fin₁And Fin₂Electrically connecting; applying currents to two ends of Link _ A and Link _1_ B, two ends of Link _ A and Link _2_ B and two ends of Link _ A and Link _3_ B respectively, measuring voltage and calculating resistance values; obtaining a curve of the resistance value changing along with the offset S, searching a mutation point of the resistance value, and acquiring a corresponding target second connecting part marked as Link _ target _ B and the offset S thereof at the mutation point of the resistance value_i(ii) a Wherein i is a positive integer, i is less than or equal to n; comparing offsets S between different Link _ target _ B_iDifference to assess the pitch drift severity.

20. The test method for monitoring Fin pitch drift in a FinFET process of claim 16, wherein the electrical test structure comprises at least three electrical test cells, each of the electrical test cells comprising at least three of the first connections designated Pin1, Pin2, Pin 3; the first electrical test unit comprises Link _1_ B, the second electrical test unit comprises Link _2_ B, and the third electrical test unit comprises Link _3_ B; applying voltages across Pin1 and Link _1_ B, Pin1 and Link _2_ B, Pin1 and Link _3_ B; applying voltages across Pin2 and Link _1_ B, Pin2 and Link _2_ B, Pin2 and Link _3_ B; applying voltages across Pin3 and Link _1_ B, across Pin3 and Link _2_ B, and across Pin3 and Link _3_ B; respectively measuring leakage current to obtain current value, and obtaining curve M of corresponding current value changing with offset S_jJ is a positive integer; find curve M_jThe sudden change point of the upper current value is informed that the corresponding target second connecting part is marked as Link _ target _ B and the offset S thereof_i(ii) a Wherein i is a positive integer, i is not more than n; comparing offsets S between different Link _ target _ B_iDifference value to evaluate the gap driftThe severity is high.

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