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KR920702549A - 반도체 장치 및 그의 제조방법 - Google Patents

반도체 장치 및 그의 제조방법

Info

Publication number
KR920702549A
KR920702549A KR1019920701096A KR920701096A KR920702549A KR 920702549 A KR920702549 A KR 920702549A KR 1019920701096 A KR1019920701096 A KR 1019920701096A KR 920701096 A KR920701096 A KR 920701096A KR 920702549 A KR920702549 A KR 920702549A
Authority
KR
South Korea
Prior art keywords
die pad
semiconductor device
resin
sloped
semiconductor chip
Prior art date
Application number
KR1019920701096A
Other languages
English (en)
Other versions
KR960003853B1 (ko
Inventor
가즈또 쓰지
요시유끼 요네따
준이찌 가사이
Original Assignee
세끼자와 다다시
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 세끼자와 다다시, 후지쓰 가부시끼가이샤 filed Critical 세끼자와 다다시
Publication of KR920702549A publication Critical patent/KR920702549A/ko
Application granted granted Critical
Publication of KR960003853B1 publication Critical patent/KR960003853B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49558—Insulating layers on lead frames, e.g. bridging members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

내용 없음

Description

반도체 장치 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 일실시예에 의한 반도체 장치의 횡단면도. 제4도는 리드프레임의 평면도. 제4B도는 리드프레임의 일부 확대된 횡단측면도. 제5도는 본 발명의 반도체 장치의 제조방법 설명도.

Claims (6)

  1. 다이패드와 상기 다이패드 외부에 구비된 복수의 리드들을 포함하는 리드프레임을 사용하여 제조하되 상기 다이패드에 반도체 칩을 탑재후 상기 다이패드와 그 주변을 수지로 밀봉하여 제조되며, 상기 다이패드는 리드들을 갖는 리드프레임의 요부와 별도로 형성되며 또한 상기 다이패드의 전체 연부가 사면처리되며 또한 평판형상을 갖는 것이 특징인 반도체 장치.
  2. 제1항에 있어서, 상기 다이패드는 세라믹으로 제조되며 또한 상기 다이패드의 형성중 사면처리 되는 것이 특징인 반도체 장치.
  3. 제1항에 있어서, 상기 다이패드는 수지로 제조되며 또한 상기 다이패드의 형성중 사면처리 되는 것이 특징인 반도체 장치.
  4. 제1항에 있어서, 상기 다이패드는 금속으로 제조되며 또한 상기 다이패드의 형성중 사면처리 되는 것이 특징인 반도체 장치.
  5. 제2,3 또는 4항중 어느 한 항에 있어서, 상기 다이패드의 연부의 사면의 곡률반경 0.03mm이상인 것이 특징인 반도체 장치.
  6. 사면처리된 연부를 갖는 다이패드를 형성하는 단계와, 상효 연결된 리드들과 상기 다이패드를 지지하는 지지바아를 포함하는 리드프레임의 요부를 형성하는 단계와, 상기 다이패드와 상기 지지바아를 접합하는 단계와, 상기 지지바아가 접합된 다이패드상에 반도체 칩을 탑재하는 단계와, 상기 반도체 칩을 복수의 리드들과 와이어 접속하는 단계와, 상기 다이패드상에 탑재된 반도체 칩과 와이어 접속된 리드들을 수지로 밀봉하는 단계를 포함하는 것이 특징인 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920701096A 1990-09-10 1991-09-09 반도체 장치 및 그의 제조방법 KR960003853B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP23962290 1990-09-10
JP90-239622 1990-09-10
PCT/JP1991/001195 WO1992004730A1 (en) 1990-09-10 1991-09-09 Semiconductor device and its manufacturing process

Publications (2)

Publication Number Publication Date
KR920702549A true KR920702549A (ko) 1992-09-04
KR960003853B1 KR960003853B1 (ko) 1996-03-23

Family

ID=17047471

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920701096A KR960003853B1 (ko) 1990-09-10 1991-09-09 반도체 장치 및 그의 제조방법

Country Status (5)

Country Link
US (1) US5440170A (ko)
EP (1) EP0503072B1 (ko)
KR (1) KR960003853B1 (ko)
DE (1) DE69128464T2 (ko)
WO (1) WO1992004730A1 (ko)

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Also Published As

Publication number Publication date
EP0503072A1 (en) 1992-09-16
DE69128464T2 (de) 1998-04-16
EP0503072B1 (en) 1997-12-17
DE69128464D1 (de) 1998-01-29
WO1992004730A1 (en) 1992-03-19
EP0503072A4 (en) 1993-10-06
KR960003853B1 (ko) 1996-03-23
US5440170A (en) 1995-08-08

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