CN105096747A - 显示面板结构 - Google Patents
显示面板结构 Download PDFInfo
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- CN105096747A CN105096747A CN201410324302.4A CN201410324302A CN105096747A CN 105096747 A CN105096747 A CN 105096747A CN 201410324302 A CN201410324302 A CN 201410324302A CN 105096747 A CN105096747 A CN 105096747A
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- 239000000758 substrate Substances 0.000 claims abstract description 20
- 239000010409 thin film Substances 0.000 claims description 43
- 239000000725 suspension Substances 0.000 claims 7
- 239000010408 film Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 22
- 230000002093 peripheral effect Effects 0.000 description 11
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- XTKDAFGWCDAMPY-UHFFFAOYSA-N azaperone Chemical compound C1=CC(F)=CC=C1C(=O)CCCN1CCN(C=2N=CC=CC=2)CC1 XTKDAFGWCDAMPY-UHFFFAOYSA-N 0.000 description 1
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Abstract
一种显示面板结构,包括:一基板;复数条栅极线,沿一第一方向平行设置于该基板上;复数条数据线,沿一第二方向平行设置于该基板上;复数个像素单元;以及复数个假像素单元,包含一第一区假像素单元沿着该第一方向延伸设置、一第二区假像素单元沿着该第二方向延伸设置、以及一第三区假像素单元设置于该第一区及该第二区之间;其中,该第三区的该些假像素单元包含该些栅极线之一与该些数据线之一。
Description
技术领域
本发明是关于一种显示面板结构。
背景技术
在众多种类的平面显示器中,不难发现显示面板的结构都只有一种形状“矩形”。如图1所示,矩形的显示面板结构提供的假像素电路,通常都是假栅极线配合数据线或假数据线配合栅极线的方式来构成假像素单元结构91。然而当提供不同形状的显示面板结构时,上述方式可能就不适用。
发明人爰因于此,本于积极发明的精神,亟思一种自由形状的显示面板结构,而不再只限于矩形的显示面板结构,可使任意形状的显示面板结构配合不同结构的假像素单元,据以提供静电放电保护的效果。
发明内容
本发明的目的在于提供一种显示面板结构,以使任意形状的显示面板结构具备配合的假像素单元、假栅极线、及假数据线,据以提供静电放电保护的效果。
为实现上述目的,本发明提供的显示面板结构,包括:一基板,其中该基板包含一显示区与一周边区,该周边区环绕该显示区;复数条栅极线,沿一第一方向平行设置于该基板上,其中该复数条栅极线由该显示区延伸至该周边区;复数条数据线,沿一第二方向平行设置于该基板上,并且该第一方向不平行于第二方向,其中该复数条数据线由该显示区延伸至该周边区;复数个像素单元,位于该显示区,每一该复数个像素单元是由相邻两条的该些栅极线与相邻两条的该些数据线所界定;以及复数个假像素单元,位于该周边区,包含一第一区假像素单元、一第二区假像素单元以及一第三区假像素单元,其中该第一区假像素单元沿该第一方向延伸设置,该第二区假像素单元沿该第二方向延伸设置,以及第三区假像素单元设置于该第一区及该第二区之间,其中该第三区的该些假像素单元包含该些栅极线之一与该些数据线之一。
以此,本发明假像素单元的特殊结构及多样性,可提供自由形状的显示面板结构,而不再只限于矩形的显示面板结构,也就是说当产品需要特殊形状的显示面板结构时,即可利用本发明的显示面板结构。
附图说明
图1是公知矩行显示面板结构示意图。
图2是本发明显示面板结构的整体结构示意图。
图3(A)是本发明一第一实施例的显示面板结构的部分详细结构示意图。
图3(B)是本发明一第二实施例的显示面板结构的部分详细结构示意图。
图3(C)是本发明一第三实施例的显示面板结构的部分详细结构示意图。
图4(A)是本发明一第四实施例的显示面板结构的部分详细结构示意图。
图4(B)是本发明一第五实施例的显示面板结构的部分详细结构示意图。
图4(C)是本发明一第六实施例的显示面板结构的部分详细结构示意图。
图5是本发明的显示面板结构中的桥接结构。
图6(A)是本发明一第七实施例的显示面板结构的部分详细结构示意图。
图6(B)是本发明一第八实施例的显示面板结构的部分详细结构示意图。
图6(C)是本发明一第九实施例的显示面板结构的部分详细结构示意图。
附图中的符号说明:
显示面板结构1,栅极驱动器2,数据驱动器3,第一晶体管4,第二晶体管5,桥接6,第一区11,第二区12,第三区13,像素18,像素单元181,假像素19,假像素单元191,基板17,栅极线g1~gn,假栅极线gm,数据线D1~Dn,假数据线Dm,假像素单元结构91。
具体实施方式
首先,请参照图2所示,是本发明显示面板结构的整体结构示意图。此显示面板结构1是以一圆形的显示面板为例说明,但本发明不限于此,其他非矩形的显示器亦可适用本发明的结构。如图2所示,本发明的显示面板结构包含一基板17(图中显示为圆形)、复数条栅极线g1~gn、至少一条假栅极线gm、一栅极驱动器2、复数条数据线D1~Dn、至少一条假数据线Dm、一数据驱动器3、复数个像素18、以及复数个假像素19。其中,如图2所示意,该基板17包含一显示区(斜线区)及一周边区(空白区),该周边区环绕该显示区,该复数个像素18位于该显示区,该复数个假像素19位于该周边区。另外,该复数条栅极线g1~gn及至少一条假栅极线gm可为同时形成,该复数条数据线D1~Dn及至少一条假数据线Dm可为同时形成。
该复数条栅极线g1~gn是沿一第一方向平行设置于一基板17上,该栅极驱动器2则用以驱动该些栅极线g1~gn。该复数条数据线D1~Dn是沿一第二方向平行设置于该基板17上,并且该第一方向不平行于第二方向,该数据驱动器3则用以驱动该些数据线D1~Dn,且该些栅极线g1~gn以及该些复数条数据线D1~Dn是由该显示区延伸至该周边区。如图2所示,该些栅极线g1~gn及该至少一条假栅极线gm与该些数据线D1~Dn及该至少一条假数据线Dm彼此相交,该至少一条假栅极线gm沿着该第一方向延伸设置于该基板17上,该至少一条假数据线Dm沿着该第二方向延伸设置于该基板17上,且该些假栅极线gm与该些假数据线Dm仅位于该周边区。
如图3(A)所示,是本发明第一实施例的显示面板结构的部分A的详细结构示意图,以图形的显示面板为例说明,其中每一像素18包含三个像素单元181(例如,红色像素单元R、绿色像素单元G、蓝色像素单元B),该些像素单元181是由相邻两条的该些栅极线g1~gn与相邻两条的该些数据线D1~Dn所界定,每一该复数个像素单元181具有一薄膜晶体管,其栅极与该复数条栅极线g1~gn之一连接,每一该复数个像素单元181的薄膜晶体管的漏极或源极与该复数条数据线D1~Dn之一连接。
如图3(A)所示,该复数个假像素19包含一第一区11的复数个假像素单元191沿着该第一方向延伸设置、一第二区12的复数个假像素单元191沿着该第二方向延伸设置、以及一第三区13的复数个假像素单元191设置于该第一区11及该第二区12之间,该第一区11、第二区12、及第三区13的该复数个假像素单元191环绕该复数个像素单元181,即该周边区环绕该显示区,该第三区13的该复数个假像素单元191包含该些栅极线g1~gn之一与该些数据线D1~Dn之一。该第一区11、第二区12、及第三区13的每一假像素单元191包含一薄膜晶体管,该第一区11假像素单元191的该薄膜晶体管包含一栅极与该假栅极线gm连接以及一漏极或源极与该数据线D1~Dn之一连接,该假栅极线gm穿过该第一区11假像素单元191,该第二区12假像素单元191的该薄膜晶体管包含一栅极与该些栅极线g1~gn之一连接以及一漏极或源极与该假数据线Dm连接,该假数据线Dm穿过该第二区12假像素单元191,该第三区13假像素单元191的该薄膜晶体管包含一栅极与该些栅极线g1~gn之一连接以及一漏极或源极与该数据线D1~Dn浮接。在此第一实施例中,是一圆边的显示面板结构1的右上圆边的示意图,而此显示面板结构1的左上、右下、左下圆边皆为相似对称的配置。
如图3(B)所示,是本发明第二实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该第三区13假像素单元191的该薄膜晶体管的栅极与该些栅极线g1~gn浮接以及漏极或源极与该复数条数据线D1~Dn之一连接。
如图3(C)所示,是本发明第三实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该第三区13假像素单元191的该薄膜晶体管的栅极与该些栅极线g1~gn浮接以及漏极或源极与该些数据线D1~Dn浮接。
请参照图4(A),是本发明一第四实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该假栅极线gm还穿过该第二区12假像素单元191,该第二区12假像素单元191的该薄膜晶体管包含一栅极与该假栅极线gm连接以及一漏极或源极与该假数据线Dm连接。另外,请同时参照图5,是本发明的自由行状显示面板结构中的桥结结构,该假栅极线gm具有至少一桥接6,使该假栅极线gm横跨该些栅极线g1~gn。
请参照图4(B),是本发明一第五实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该假栅极线gm与该些栅极线g1~gn之一连接,该第一区11假像素单元191的该薄膜晶体管包含一栅极与该假栅极线gm连接以及一漏极或源极与该些数据线D1~Dn浮接。
请参照图4(C),是本发明一第六实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该假栅极线gm与该些栅极线g1~gn之一连接,该假栅极线gm更穿过该第二区12假像素单元191,该第一区11假像素单元191的该薄膜晶体管包含一栅极与该假栅极线gm连接以及一漏极或源极与该些数据线D1~Dn浮接,该第二区12假像素单元191的该薄膜晶体管包含一栅极与该假栅极线gm连接以及一漏极或源极与该假数据线Dm连接。另外,请同时参照图5,该假栅极线gm具有至少一桥接6,使该假栅极线gm横跨该些栅极线g2~gn。
请参照图6(A),是本发明一第七实施例的显示面板结构的部分A详细结构示意图,其结构大致与第一实施例相当,惟该第一区11、第二区12、以及第三区13的每一假像素单元191可包含两上下配置的一第一薄膜晶体管4及一第二薄膜晶体管5,该第一区11的假像素单元191的该第一及第二薄膜晶体管4、5的栅极与该假栅极线gm连接,该第二区12及第三区13的假像素单元191的该第一及第二薄膜晶体管4、5的栅极与该些栅极线g1~gn之一连接,该第一区11的每一假像素单元191的该第一及第二薄膜晶体管4、5的漏极或源极与该些数据线D1~Dn之一连接,第二区12的每一假像素单元191的该第一及第二薄膜晶体管4、5的漏极或源极与该至少一条假数据线Dm连接,而该些假数据线Dm则并无实际的连接,第三区13的每一假像素单元191的该第一及第二薄膜晶体管4、5的漏极或源极与该些数据线D1~Dn浮接。
请参照图6(B),是本发明一第八实施例的显示面板结构的部分A详细结构示意图,其结构大致与第七实施例相当,惟该假栅极线gm还穿过该第二区12以及第三区13假像素单元191,该第二区12及该第三区13的每一假像素单元191的该第一薄膜晶体管4的栅极与该假栅极线gm连接,该第三区13的每一该假像素单元191的该第一薄膜晶体管4的漏极或源极与该复数条数据线D1~Dn之一连接。另外,请同时参照图5,该假栅极线gm具有至少一桥接6,使该假栅极线gm横跨该些栅极线g1~gn。
请参照图6(C),是本发明一第九实施例的显示面板结构的部分A详细结构示意图,其结构大致与第七实施例相当,惟该假栅极线gm还穿过该第二区12以及第三区13假像素单元191,该第二区12及该第三区13的每一该复数个假像素单元191的该第二薄膜晶体管5的栅极与该假栅极线gm连接,该第三区13的每一假像素单元191的该第二薄膜晶体管5的漏极或源极与该复数条数据线D1~Dn之一连接。另外,请同时参照图5,该假栅极线gm具有至少一桥接6,使该假栅极线gm横跨该些栅极线g1~gn。
由以上的假像素电路配置,可使任意形状的显示面板结构搭配不同结构的假像素单元,而能提供显示面板具有静电放电保护的效果。
上述实施例仅为了方便说明而举例而已,本发明所主张的权利范围自应以申请专利范围所述为准,而非仅限于上述实施例。
Claims (19)
1.一种显示面板结构,包括:
一基板,其中该基板包含一显示区与一周边区,该周边区环绕该显示区;
复数条栅极线,沿一第一方向平行设置于该基板上,其中该复数条栅极线由该显示区延伸至该周边区;
复数条数据线,沿一第二方向平行设置于该基板上,并且该第一方向不平行于第二方向,其中该复数条数据线由该显示区延伸至该周边区;
复数个像素单元,位于该显示区,每一该复数个像素单元系由相邻两条的该些栅极线与相邻两条的该些数据线所界定;以及
复数个假像素单元,位于该周边区,包含一第一区假像素单元、一第二区假像素单元以及一第三区假像素单元,其中该第一区假像素单元系沿该第一方向延伸设置,该第二区假像素单元沿该第二方向延伸设置,以及第三区假像素单元设置于该第一区及该第二区之间,其中该第三区的该些假像素单元包含该些栅极线之一与该些数据线之一。
2.如权利要求1所述的显示面板结构,其中,包含:
一栅极驱动器,用以驱动该些栅极线;以及
一数据驱动器,用以驱动该些数据线。
3.如权利要求1所述的显示面板结构,其中,该第三区假像素单元包含一薄膜晶体管,其中该薄膜晶体管包含与该栅极线连接的一栅极,以及与该数据线浮接的一漏极或源极。
4.如权利要求1所述的显示面板结构,其中,该第三区假像素单元包含一薄膜晶体管,其中该薄膜晶体管包含与该栅极线浮接的一栅极,以及与该数据线连接的一漏极或源极。
5.如权利要求1所述的显示面板结构,其中,该第三区假像素单元包含一薄膜晶体管,其中该薄膜晶体管包含与该栅极线浮接的一栅极,以及与该数据线浮接的一漏极或源极。
6.如权利要求3或4或5所述的显示面板结构,其中,包含:
至少一条假栅极线,沿着该第一方向延伸设置于该基板上,且穿过该第一区假像素单元;以及
至少一条假数据线,沿着该第二方向延伸设置于该基板上,且穿过该第二区假像素单元。
7.如权利要求6所述的显示面板结构,其中,该第一区假像素单元包含至少一薄膜晶体管,其中该薄膜晶体管包含与该假栅极线连接的一栅极,以及与该数据线连接的一漏极或源极。
8.如权利要求7所述的显示面板结构,其中,该第二区假像素单元包含至少一薄膜晶体管,该薄膜晶体管包含与该些栅极线之一连接的一栅极,以及与该假数据线连接之一漏极或源极。
9.如权利要求7所述的显示面板结构,其中,该假栅极线穿过该第二区假像素单元。
10.如权利要求9所述的显示面板结构,其中,该第二区假像素单元包含至少一薄膜晶体管,该薄膜晶体管包含与该假栅极线连接的一栅极,以及与该假数据线连接的一漏极或源极。
11.如权利要求10所述的显示面板结构,其中,该假栅极线具有至少一桥接,使该假栅极线横跨该些栅极线。
12.如权利要求6所述的显示面板结构,其中,该假栅极线与该些栅极线之一连接。
13.如权利要求12所述的显示面板结构,其中,该第一区假像素单元包含至少一薄膜晶体管,其中该薄膜晶体管包含与该假栅极线连接的一栅极,以及与该些数据线浮接之一的一漏极或源极。
14.如权利要求13所述的显示面板结构,其中,该第二区假像素单元包含至少一薄膜晶体管,该薄膜晶体管包含至少与该些栅极线连接的一栅极,以及与该假数据线连接的一漏极或源极。
15.如权利要求13所述的显示面板结构,其中,该假栅极线穿过该第二区假像素单元。
16.如权利要求15所述的显示面板结构,其中,该第二区假像素单元包含至少一薄膜晶体管,该薄膜晶体管包含与该假栅极线连接的一栅极,以及与该假数据线连接的一漏极或源极。
17.如权利要求16所述的显示面板结构,其中,该假栅极线具有至少一桥接,使该假栅极线横跨该些栅极线。
18.如权利要求6所述的显示面板结构,其中,该第三区假像素单元包含一第一薄膜晶体管及一第二薄膜晶体管。
19.如权利要求18所述的显示面板结构,其中,该第一薄膜晶体管包含与该至少一条假栅极线连接的一栅极,以及与该些数据线之一连接或为浮接的一漏极或源极,该第二薄膜晶体管包含与该些栅极线之一连接的一栅极,以及与数据线浮接的一漏极或源极。
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TWI608457B (zh) * | 2016-05-04 | 2017-12-11 | 群創光電股份有限公司 | 顯示面板 |
CN105911787B (zh) * | 2016-07-05 | 2019-06-04 | 厦门天马微电子有限公司 | 一种阵列基板以及显示面板 |
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US20150323821A1 (en) | 2015-11-12 |
KR20150128546A (ko) | 2015-11-18 |
KR20150128547A (ko) | 2015-11-18 |
CN105082231A (zh) | 2015-11-25 |
JP2015215597A (ja) | 2015-12-03 |
TW201543120A (zh) | 2015-11-16 |
TWI509334B (zh) | 2015-11-21 |
TW201543123A (zh) | 2015-11-16 |
CN105082231B (zh) | 2017-11-07 |
TW201542478A (zh) | 2015-11-16 |
CN105096747B (zh) | 2018-03-13 |
CN105093703A (zh) | 2015-11-25 |
KR101794400B1 (ko) | 2017-11-07 |
KR101653099B1 (ko) | 2016-08-31 |
CN108181754A (zh) | 2018-06-19 |
TWI560160B (en) | 2016-12-01 |
TWI494668B (zh) | 2015-08-01 |
KR20150128558A (ko) | 2015-11-18 |
CN105097785A (zh) | 2015-11-25 |
TW201543991A (zh) | 2015-11-16 |
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