KR850005169A - 우물영역을 갖는 반도체기판상에 형성되는 mis형 반도체장치 - Google Patents
우물영역을 갖는 반도체기판상에 형성되는 mis형 반도체장치 Download PDFInfo
- Publication number
- KR850005169A KR850005169A KR1019840007019A KR840007019A KR850005169A KR 850005169 A KR850005169 A KR 850005169A KR 1019840007019 A KR1019840007019 A KR 1019840007019A KR 840007019 A KR840007019 A KR 840007019A KR 850005169 A KR850005169 A KR 850005169A
- Authority
- KR
- South Korea
- Prior art keywords
- region
- well region
- semiconductor device
- mis
- type semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims 9
- 239000000758 substrate Substances 0.000 title claims 6
- 238000009792 diffusion process Methods 0.000 claims 2
- 230000005684 electric field Effects 0.000 claims 2
- 230000005669 field effect Effects 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 238000000137 annealing Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0191—Manufacturing their doped wells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims (5)
- 일도전형을 갖는 반도체기판과, 상기 일도전형으로서 동일도전형을 갖는 상기 기판내에 형성되는 우물영역과, 상기 가판에 형성되는 전계절연층과, 그리고 상기 우물영역상에 형성되며 상기 전계절연층에 의해 분리되는 MIS형 전계효과 트랜지스터와를 포함하되, 상기 트랜지스터는 게이트와 드레인 영역을 갖고 있으며, 상기 우물영역은 상기 게이트와 상기 전계절연층 밑 부분들에 선택적으로 형성되며 상기 드레인영역밑의 적어도 일부분에 형성되지 않는 것이 특징인 우물영역을 갖는 반도체 기판상에 형성되는 MIS형 반도체장치.
- 제1항에서, 상기 드레인영역밑의 상기부분은 상기 기판과 접촉상태에 있는 MIS형 반도체장치.
- 제1항에서, 드레인영역밑의 상기 부분에 형성되는 측방확산영역을 더 포함하되, 그 측방확산영역은 우물 영역보다 저불순물 농도를 갖는 MIS형 반도체장치.
- 제1항에 있어서, 상기 트랜지스터는 소오스영역을 더 포함하며, 상기 우물영역은 상기 소오스영역 둘레에 형성되며 상기 소오스영역 밑부분에는 형성되지 않는 MIS형 반도체장치.
- 제1항에서, 상기 우물영역은 상기 드레인영역보다 더 큰 깊이를 갖는 MIS형 반도체장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58230862A JPS60123055A (ja) | 1983-12-07 | 1983-12-07 | 半導体装置及びその製造方法 |
JP58-230862 | 1983-12-07 | ||
JP?58-230862 | 1983-12-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR850005169A true KR850005169A (ko) | 1985-08-21 |
KR890004797B1 KR890004797B1 (ko) | 1989-11-27 |
Family
ID=16914468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019840007019A KR890004797B1 (ko) | 1983-12-07 | 1984-11-09 | 우물영역을 갖는 반도체기판상에 형성되는 mis형 반도체장치 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5128739A (ko) |
EP (1) | EP0144248B1 (ko) |
JP (1) | JPS60123055A (ko) |
KR (1) | KR890004797B1 (ko) |
DE (1) | DE3476944D1 (ko) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61111576A (ja) * | 1984-10-13 | 1986-05-29 | Fujitsu Ltd | 半導体装置 |
EP0304541A1 (de) * | 1987-08-18 | 1989-03-01 | Deutsche ITT Industries GmbH | Verfahren zum Herstellen implantierter Wannen und Inseln von integrierten CMOS-Schaltungen |
JPH02122568A (ja) * | 1988-09-15 | 1990-05-10 | Advanced Micro Devices Inc | ゲートのいずれの側にも配置された相対的に高濃度にドープされた接合を有する金属酸化物半導体素子 |
JP2504573B2 (ja) * | 1989-08-08 | 1996-06-05 | 株式会社東芝 | 半導体装置及びその製造方法 |
US5557125A (en) * | 1993-12-08 | 1996-09-17 | Lucent Technologies Inc. | Dielectrically isolated semiconductor devices having improved characteristics |
US5382820A (en) * | 1993-12-08 | 1995-01-17 | United Microelectronics Corporation | High voltage CMOS device to integrate low voltage controlling device |
JPH1092950A (ja) | 1996-09-10 | 1998-04-10 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US20060143180A1 (en) * | 2000-03-09 | 2006-06-29 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
EP2955896B1 (en) | 2002-08-09 | 2017-10-18 | Good Technology Holdings Limited | System and method for preventing access to data on a compromised remote device |
US6982433B2 (en) * | 2003-06-12 | 2006-01-03 | Intel Corporation | Gate-induced strain for MOS performance improvement |
US8001082B1 (en) | 2004-10-28 | 2011-08-16 | Good Technology, Inc. | System and method of data security in synchronizing data with a wireless device |
CN115440815A (zh) * | 2021-06-01 | 2022-12-06 | 长鑫存储技术有限公司 | 一种半导体器件及其制造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
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GB1153428A (en) * | 1965-06-18 | 1969-05-29 | Philips Nv | Improvements in Semiconductor Devices. |
US3751722A (en) * | 1971-04-30 | 1973-08-07 | Standard Microsyst Smc | Mos integrated circuit with substrate containing selectively formed resistivity regions |
US3946419A (en) * | 1973-06-27 | 1976-03-23 | International Business Machines Corporation | Field effect transistor structure for minimizing parasitic inversion and process for fabricating |
US4104784A (en) * | 1976-06-21 | 1978-08-08 | National Semiconductor Corporation | Manufacturing a low voltage n-channel MOSFET device |
JPS5380172A (en) * | 1976-12-25 | 1978-07-15 | Fujitsu Ltd | Semiconductor device |
DE2801085A1 (de) * | 1977-01-11 | 1978-07-13 | Zaidan Hojin Handotai Kenkyu | Statischer induktionstransistor |
US4132998A (en) * | 1977-08-29 | 1979-01-02 | Rca Corp. | Insulated gate field effect transistor having a deep channel portion more highly doped than the substrate |
JPS54136275A (en) * | 1978-04-14 | 1979-10-23 | Agency Of Ind Science & Technol | Field effect transistor of isolation gate |
JPS55111171A (en) * | 1979-02-20 | 1980-08-27 | Mitsubishi Electric Corp | Field-effect semiconductor device |
US4306916A (en) * | 1979-09-20 | 1981-12-22 | American Microsystems, Inc. | CMOS P-Well selective implant method |
NL8100347A (nl) * | 1981-01-26 | 1982-08-16 | Philips Nv | Halfgeleiderinrichting met een beveiligingsinrichting. |
JPS57143854A (en) * | 1981-02-27 | 1982-09-06 | Toshiba Corp | Complementary type metal oxide semiconductor device and its manufacture |
JPS57155777A (en) * | 1981-03-20 | 1982-09-25 | Sharp Corp | Mos transistor |
JPS5812349A (ja) * | 1981-07-16 | 1983-01-24 | Toshiba Corp | 相補型mos半導体装置 |
US4435895A (en) * | 1982-04-05 | 1984-03-13 | Bell Telephone Laboratories, Incorporated | Process for forming complementary integrated circuit devices |
IT1210872B (it) * | 1982-04-08 | 1989-09-29 | Ates Componenti Elettron | Processo per la fabbricazione di transistori mos complementari in circuiti integrati ad alta densita' per tensioni elevate. |
US4480375A (en) * | 1982-12-09 | 1984-11-06 | International Business Machines Corporation | Simple process for making complementary transistors |
US4633289A (en) * | 1983-09-12 | 1986-12-30 | Hughes Aircraft Company | Latch-up immune, multiple retrograde well high density CMOS FET |
US4599789A (en) * | 1984-06-15 | 1986-07-15 | Harris Corporation | Process of making twin well VLSI CMOS |
-
1983
- 1983-12-07 JP JP58230862A patent/JPS60123055A/ja active Pending
-
1984
- 1984-11-09 KR KR1019840007019A patent/KR890004797B1/ko not_active IP Right Cessation
- 1984-12-07 EP EP84308517A patent/EP0144248B1/en not_active Expired
- 1984-12-07 DE DE8484308517T patent/DE3476944D1/de not_active Expired
-
1990
- 1990-11-19 US US07/616,806 patent/US5128739A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0144248A2 (en) | 1985-06-12 |
EP0144248A3 (en) | 1985-12-18 |
KR890004797B1 (ko) | 1989-11-27 |
DE3476944D1 (en) | 1989-04-06 |
JPS60123055A (ja) | 1985-07-01 |
US5128739A (en) | 1992-07-07 |
EP0144248B1 (en) | 1989-03-01 |
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