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DE3476944D1 - Mis type semiconductor device element on a semiconductor substrate having a well region - Google Patents

Mis type semiconductor device element on a semiconductor substrate having a well region

Info

Publication number
DE3476944D1
DE3476944D1 DE8484308517T DE3476944T DE3476944D1 DE 3476944 D1 DE3476944 D1 DE 3476944D1 DE 8484308517 T DE8484308517 T DE 8484308517T DE 3476944 T DE3476944 T DE 3476944T DE 3476944 D1 DE3476944 D1 DE 3476944D1
Authority
DE
Germany
Prior art keywords
well region
device element
mis type
semiconductor device
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8484308517T
Other languages
English (en)
Inventor
Takehide C O Fujitsu L Shirato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3476944D1 publication Critical patent/DE3476944D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
DE8484308517T 1983-12-07 1984-12-07 Mis type semiconductor device element on a semiconductor substrate having a well region Expired DE3476944D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58230862A JPS60123055A (ja) 1983-12-07 1983-12-07 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
DE3476944D1 true DE3476944D1 (en) 1989-04-06

Family

ID=16914468

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484308517T Expired DE3476944D1 (en) 1983-12-07 1984-12-07 Mis type semiconductor device element on a semiconductor substrate having a well region

Country Status (5)

Country Link
US (1) US5128739A (de)
EP (1) EP0144248B1 (de)
JP (1) JPS60123055A (de)
KR (1) KR890004797B1 (de)
DE (1) DE3476944D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61111576A (ja) * 1984-10-13 1986-05-29 Fujitsu Ltd 半導体装置
EP0304541A1 (de) * 1987-08-18 1989-03-01 Deutsche ITT Industries GmbH Verfahren zum Herstellen implantierter Wannen und Inseln von integrierten CMOS-Schaltungen
JPH02122568A (ja) * 1988-09-15 1990-05-10 Advanced Micro Devices Inc ゲートのいずれの側にも配置された相対的に高濃度にドープされた接合を有する金属酸化物半導体素子
JP2504573B2 (ja) * 1989-08-08 1996-06-05 株式会社東芝 半導体装置及びその製造方法
US5557125A (en) * 1993-12-08 1996-09-17 Lucent Technologies Inc. Dielectrically isolated semiconductor devices having improved characteristics
US5382820A (en) * 1993-12-08 1995-01-17 United Microelectronics Corporation High voltage CMOS device to integrate low voltage controlling device
JPH1092950A (ja) 1996-09-10 1998-04-10 Mitsubishi Electric Corp 半導体装置及びその製造方法
US20060143180A1 (en) * 2000-03-09 2006-06-29 Pkware, Inc. System and method for manipulating and managing computer archive files
US8012219B2 (en) 2002-08-09 2011-09-06 Visto Corporation System and method for preventing access to data on a compromised remote device
US6982433B2 (en) * 2003-06-12 2006-01-03 Intel Corporation Gate-induced strain for MOS performance improvement
US8001082B1 (en) 2004-10-28 2011-08-16 Good Technology, Inc. System and method of data security in synchronizing data with a wireless device
CN115440815A (zh) * 2021-06-01 2022-12-06 长鑫存储技术有限公司 一种半导体器件及其制造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1153428A (en) * 1965-06-18 1969-05-29 Philips Nv Improvements in Semiconductor Devices.
US3751722A (en) * 1971-04-30 1973-08-07 Standard Microsyst Smc Mos integrated circuit with substrate containing selectively formed resistivity regions
US3946419A (en) * 1973-06-27 1976-03-23 International Business Machines Corporation Field effect transistor structure for minimizing parasitic inversion and process for fabricating
US4104784A (en) * 1976-06-21 1978-08-08 National Semiconductor Corporation Manufacturing a low voltage n-channel MOSFET device
JPS5380172A (en) * 1976-12-25 1978-07-15 Fujitsu Ltd Semiconductor device
DE2801085A1 (de) * 1977-01-11 1978-07-13 Zaidan Hojin Handotai Kenkyu Statischer induktionstransistor
US4132998A (en) * 1977-08-29 1979-01-02 Rca Corp. Insulated gate field effect transistor having a deep channel portion more highly doped than the substrate
JPS54136275A (en) * 1978-04-14 1979-10-23 Agency Of Ind Science & Technol Field effect transistor of isolation gate
JPS55111171A (en) * 1979-02-20 1980-08-27 Mitsubishi Electric Corp Field-effect semiconductor device
US4306916A (en) * 1979-09-20 1981-12-22 American Microsystems, Inc. CMOS P-Well selective implant method
NL8100347A (nl) * 1981-01-26 1982-08-16 Philips Nv Halfgeleiderinrichting met een beveiligingsinrichting.
JPS57143854A (en) * 1981-02-27 1982-09-06 Toshiba Corp Complementary type metal oxide semiconductor device and its manufacture
JPS57155777A (en) * 1981-03-20 1982-09-25 Sharp Corp Mos transistor
JPS5812349A (ja) * 1981-07-16 1983-01-24 Toshiba Corp 相補型mos半導体装置
US4435895A (en) * 1982-04-05 1984-03-13 Bell Telephone Laboratories, Incorporated Process for forming complementary integrated circuit devices
IT1210872B (it) * 1982-04-08 1989-09-29 Ates Componenti Elettron Processo per la fabbricazione di transistori mos complementari in circuiti integrati ad alta densita' per tensioni elevate.
US4480375A (en) * 1982-12-09 1984-11-06 International Business Machines Corporation Simple process for making complementary transistors
US4633289A (en) * 1983-09-12 1986-12-30 Hughes Aircraft Company Latch-up immune, multiple retrograde well high density CMOS FET
US4599789A (en) * 1984-06-15 1986-07-15 Harris Corporation Process of making twin well VLSI CMOS

Also Published As

Publication number Publication date
KR890004797B1 (ko) 1989-11-27
EP0144248A2 (de) 1985-06-12
EP0144248A3 (en) 1985-12-18
US5128739A (en) 1992-07-07
EP0144248B1 (de) 1989-03-01
JPS60123055A (ja) 1985-07-01
KR850005169A (ko) 1985-08-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee