KR20170038916A - 이방성 도전 필름 - Google Patents
이방성 도전 필름 Download PDFInfo
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- KR20170038916A KR20170038916A KR1020177006100A KR20177006100A KR20170038916A KR 20170038916 A KR20170038916 A KR 20170038916A KR 1020177006100 A KR1020177006100 A KR 1020177006100A KR 20177006100 A KR20177006100 A KR 20177006100A KR 20170038916 A KR20170038916 A KR 20170038916A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R11/00—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts
- H01R11/01—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts characterised by the form or arrangement of the conductive interconnection between the connecting locations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29082—Two-layer arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29499—Shape or distribution of the fillers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
Description
도 1b 는 본 발명의 이방성 도전 필름의 단면도이다.
도 2a 는 본 발명의 이방성 도전 필름의 평면 투시도이다.
도 2b 는 본 발명의 이방성 도전 필름의 평면 투시도이다.
도 2c 는 본 발명의 이방성 도전 필름의 평면 투시도이다.
도 2d 는 본 발명의 이방성 도전 필름의 평면 투시도이다.
도 2e 는 본 발명의 이방성 도전 필름의 평면 투시도이다.
도 3a 는 본 발명의 제조 방법의 공정 설명도이다.
도 3b 는 본 발명의 제조 방법의 공정 설명도이다.
도 3c 는 본 발명의 제조 방법의 공정 설명도이다.
도 3d 는 본 발명의 제조 방법의 공정 설명도이다.
도 3e 는 본 발명의 제조 방법의 공정 설명도이다.
도 3f 는 본 발명의 제조 방법의 공정 설명도인 동시에, 본 발명의 이방성 도전 필름의 개략 단면도이다.
11, 104 절연성 접착 베이스층
12, 105 절연성 접착 커버층
13, 103 도전 입자
14, 114 도전 입자군
15 평면 격자 패턴의 격자점 영역
100 전사체
101 볼록부
102 미점착부
P 격자점
Claims (11)
- 절연성 접착 베이스층의 표면 또는 표면 근방에 도전 입자가 배치된 구조의 이방성 도전 필름으로서,
도전 입자가 2 개 이상 모여 도전 입자군을 구성하고,
도전 입자군이 평면 격자 패턴의 격자점 영역에 배치되어 있는, 이방성 도전 필름. - 절연성 접착 베이스층과 절연성 접착 커버층이 적층되고, 그들의 계면 근방에 도전 입자가 배치된 구조의 이방성 도전 필름으로서,
도전 입자가 2 개 이상 모여 도전 입자군을 구성하고,
도전 입자군이 평면 격자 패턴의 격자점 영역에 배치되어 있는, 이방성 도전 필름. - 제 1 항 또는 제 2 항에 있어서,
평면 격자 패턴의 격자점 영역이, 격자점을 중심으로 하는 원으로서, 그 반경이 도전 입자의 평균 입자경의 2 배 이상 7 배 이하인, 이방성 도전 필름. - 제 1 항 내지 제 3 항 중 어느 한 항에 있어서,
인접하는 격자점 영역끼리의 최단 거리가, 도전 입자의 평균 입자경의 2 배 이상 혹은 격자점 영역의 등배 이상의 어느 것인, 이방성 도전 필름. - 제 1 항 내지 제 4 항 중 어느 한 항에 있어서,
격자점 영역 내의 복수의 도전 입자가, 서로 접촉하고 있지 않은, 이방성 도전 필름. - 제 1 항 내지 제 5 항 중 어느 한 항에 있어서,
격자점 영역 내의 복수의 도전 입자가 규칙 배열되어 있는, 이방성 도전 필름. - 제 1 항에 기재된 이방성 도전 필름의 제조 방법으로서, 이하의 공정 (가) ∼ (라) :
<공정 (가)>
평면 격자 패턴의 격자점 영역에 상당하는 볼록부가 표면에 형성된 전사체를 준비하는 공정 ;
<공정 (나)>
전사체의 볼록부의 천면에 적어도 2 개 이상의 미점착부를 형성하는 공정 ;
<공정 (다)>
그 전사체의 볼록부의 미점착부에 도전 입자를 부착시키는 공정 ; 및
<공정 (라)>
그 전사체의 도전 입자가 부착된 측의 표면에 절연성 접착 베이스층을 중첩하여 가압함으로써, 절연성 접착 베이스층에 도전 입자를 전착시키는 공정
을 갖는, 제조 방법. - 제 2 항에 기재된 이방성 도전 필름의 제조 방법으로서, 이하의 공정 (가) ∼ (마) :
<공정 (가)>
평면 격자 패턴의 격자점 영역에 상당하는 볼록부가 표면에 형성된 전사체를 준비하는 공정 ;
<공정 (나)>
전사체의 볼록부의 천면에 적어도 2 개 이상의 미점착부를 형성하는 공정 ;
<공정 (다)>
그 전사체의 볼록부의 미점착부에 도전 입자를 부착시키는 공정 ;
<공정 (라)>
그 전사체의 도전 입자가 부착된 측의 표면에 절연성 접착 베이스층을 중첩하여 가압함으로써, 절연성 접착 베이스층에 도전 입자를 전착시키는 공정 ; 및
<공정 (마)>
도전 입자가 전착된 절연성 접착 베이스층에 대해, 도전 입자 전착면측으로부터 절연성 접착 커버층을 적층하는 공정
을 갖는, 제조 방법. - 제 7 항 또는 제 8 항에 있어서,
공정 (가) 에서 사용하는 전사체가, 금속 플레이트를 가공하여 원반을 제조하고, 거기에 경화성 수지 조성물을 도포하고, 경화시켜 제조한 것인, 제조 방법. - 제 7 항 내지 제 9 항 중 어느 한 항에 있어서,
공정 (가) 의 전사체의 볼록부의 높이가, 도전 입자의 평균 입자경의 1.2 배 이상 4 배 미만이며, 볼록부의 반치폭이, 도전 입자의 평균 입자경의 2 배 이상 7 배 이하인, 제조 방법. - 제 1 전자 부품의 단자와 제 2 전자 부품의 단자가, 제 1 항 내지 제 6 항 중 어느 한 항에 기재된 이방성 도전 필름에 의해 이방성 도전 접속된, 접속 구조체.
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KR1020197018608A KR102362816B1 (ko) | 2014-11-17 | 2015-11-17 | 이방성 도전 필름 |
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PCT/JP2015/082221 WO2016080379A1 (ja) | 2014-11-17 | 2015-11-17 | 異方性導電フィルム |
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KR101996737B1 KR101996737B1 (ko) | 2019-07-04 |
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US (4) | US10026709B2 (ko) |
JP (3) | JP6746898B2 (ko) |
KR (3) | KR102677632B1 (ko) |
CN (5) | CN111029875B (ko) |
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US10982771B2 (en) | 2018-04-24 | 2021-04-20 | Faurecia Systemes D'echappement | Valve for exhaust line |
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KR101729867B1 (ko) | 2012-08-01 | 2017-04-24 | 데쿠세리아루즈 가부시키가이샤 | 이방성 도전 필름의 제조 방법, 이방성 도전 필름, 및 접속 구조체 |
KR101843226B1 (ko) * | 2012-08-29 | 2018-03-28 | 데쿠세리아루즈 가부시키가이샤 | 이방성 도전 필름 및 그 제조 방법 |
TWI824740B (zh) * | 2014-10-28 | 2023-12-01 | 日商迪睿合股份有限公司 | 異向性導電膜、連接構造體、及連接構造體之製造方法 |
CN111029875B (zh) * | 2014-11-17 | 2022-05-10 | 迪睿合株式会社 | 各向异性导电膜、连接结构体及其制造方法 |
WO2017191779A1 (ja) * | 2016-05-05 | 2017-11-09 | デクセリアルズ株式会社 | 異方性導電フィルム |
CN118325319A (zh) * | 2016-05-05 | 2024-07-12 | 迪睿合株式会社 | 填充剂配置膜 |
JP7274810B2 (ja) | 2016-05-05 | 2023-05-17 | デクセリアルズ株式会社 | 異方性導電フィルム |
KR20240157116A (ko) * | 2016-09-13 | 2024-10-31 | 데쿠세리아루즈 가부시키가이샤 | 필러 함유 필름 |
JP7081097B2 (ja) * | 2016-09-13 | 2022-06-07 | デクセリアルズ株式会社 | フィラー含有フィルム |
JP7087305B2 (ja) * | 2017-04-23 | 2022-06-21 | デクセリアルズ株式会社 | フィラー含有フィルム |
KR102478199B1 (ko) * | 2016-10-18 | 2022-12-15 | 데쿠세리아루즈 가부시키가이샤 | 필러 함유 필름 |
CN115710367B (zh) * | 2016-10-18 | 2024-08-27 | 迪睿合株式会社 | 含填料膜 |
JP7035370B2 (ja) * | 2016-10-31 | 2022-03-15 | デクセリアルズ株式会社 | フィラー含有フィルム |
JP7319578B2 (ja) * | 2017-04-23 | 2023-08-02 | デクセリアルズ株式会社 | フィラー含有フィルム |
US20190100663A1 (en) * | 2017-10-03 | 2019-04-04 | Shin-Etsu Chemical Co., Ltd. | Anisotropic conductive film and method for manufacturing anisotropic conductive film |
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