USRE40947E1 - Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole - Google Patents
Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole Download PDFInfo
- Publication number
- USRE40947E1 USRE40947E1 US10/829,479 US82947990A USRE40947E US RE40947 E1 USRE40947 E1 US RE40947E1 US 82947990 A US82947990 A US 82947990A US RE40947 E USRE40947 E US RE40947E
- Authority
- US
- United States
- Prior art keywords
- hole
- substrate
- layer
- filler
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 claims description 25
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0212—Resin particles
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0215—Metallic fillers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0242—Shape of an individual particle
- H05K2201/0257—Nanoparticles
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/383—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Definitions
- This invention relates to a multilayer printed wiring board used as a package board for mounting an IC chip or the like and a process of producing the same, and more particularly to a multilayer printed wiring board capable of providing a high density wiring easily and of preventing the formation of cracks or the like in through-holes or in the neighborhood thereof when heat cycle occurs, for example.
- This invention also relates to a resist composition for filling through-hole of a multilayer printed wiring board, which composition is used for ensuring satisfactory electric connections between viaholes and through-holes even at high temperature and high humidity conditions or under such conditions as to cause heat cycle.
- through-holes are formed for electrically connecting the front surface to the back surface of a core substrate (hereinafter referred to as “substrate”) of a two-sided multilayer printed wiring board.
- substrate a core substrate
- through-holes are, however, considered as dead spaces in designing of a circuit, and hence become one of the factors which prevent wiring from densifying.
- Japanese Unexamined Patent Publication No. 9-8424 discloses a technique of filling through-holes with a resin and roughening the resin on its surface and forming a mount pad on the roughened surface.
- Japanese Unexamined Patent Publication No. 2-196494 discloses a technique of filling through-holes with a conductive paste, and dissolving and removing an electrolytic plated film covering the through-holes to form landless through-holes.
- Japanese Unexamined Patent Publication No. 1-143292 discloses a technique of filling through-holes with a conductive paste and subjecting the resultant substrate to a copper plating to form a plated film covering the paste.
- Japanese Unexamined Patent Publication No. 4-92496 discloses a technique of forming, for example, a copper plated film onto all over the surface of a substrate inclusive of internal surfaces of through-holes by electroless plating, filling the inside of the through-holes with an electrically conductive material (conductive paste) and then covering the substrate with a copper plated film so as to encapsulate the electrically conductive material in the through-holes.
- an electrically conductive material conductive paste
- a two-sided multilayer printed wiring board as is described in Japanese Unexamined Patent Publication No. 9-8424 requires a roughening treatment of the surface of a resin in order to ensure adhesion between the resin filled in through-holes and the mount pad.
- the conductor layer on the through-holes may peel or form cracks due to heat cycle.
- the conductive paste is in direct contact with the internal surfaces of through-holes of a resin substrate so that metal ions are apt to disperse from the surfaces to the inside of the substrate when it takes up moisture.
- the dispersion (migration) of metal ions causes development of a short circuit between the conductor layer and the through-holes.
- gaps or voids tend to form because of poor adhesion between the conductor layer and the electric conductive material in the through-holes.
- the formation of voids between the electric conductive material and a through-hole causes delamination of the conductor layer or generation of cracks on the through-hole in the use at high temperature and high humidity conditions due to air or water accumulated in the voids.
- connection is generally made by forming a pad, i.e., a land protrusion on the periphery of the through-hole, and connecting the through-hole to the viahole through the interposition of the pad.
- the pad is, however, frequently obstructive because it is formed protruding on the outer periphery of the through-hole and hence causes, for example, an increasing pitch between adjacent through-holes to each other. This becomes an impediment to achieving a high density wiring or to narrower intervals between through-holes.
- Japanese Unexamined Patent Publication No. 6-275959 discloses a multilayer printed wiring board obtained by filling through-holes with a filler, forming a conductor layer thereon, and forming viaholes on the conductor layer.
- Japanese Unexamined Patent Publication No. 5-243728 discloses a process of filling through-holes with a conductive paste and curing the paste, polishing a surface of the substrate, forming a conductor layer covering the through-holes, and mounting a surface mount part on the conductor layer.
- a surface mount part can be connected to through-holes so as to provide high density wiring or through-holes, but they have the following disadvantages.
- the multilayer printed wiring board as exemplified in Japanese Unexamined Patent Publication No. 6-275959 is obtained by filling through-holes with a photosensitive resin as the filler.
- a photosensitive resin as the filler.
- delamination between the filler and the conductor layer occurs when the wiring board is exposed to high temperature and high humidity conditions such as in Pressure Cooker Test, and a reliable connection between viaholes formed on the conductor layer and through-holes cannot be obtained.
- Japanese Unexamined Patent Publication No. 5-243728 is not a technique relating to a build-up multilayer printed wiring board and hence does not make the most of the high density wiring function inherent in the build-up method.
- the present invention solves the aforementioned problems inherent in the conventional techniques, and the present invention provides a multilayer printed wiring board which can easily ensure high density wiring and a production process therefor.
- the present invention provides a construction of a multilayer printed wiring board which is effective for preventing delamination between a filler for a through-hole and a conductor layer, for inhibiting delamination and formation of cracks between a conductor circuit and an interlaminar insulating resin layer, for preventing metal ions in the filler from diffusing and for protecting the filler from erosion by a laser beam.
- the present invention further provides high density through-hole intervals and wiring in a build-up multilayer printed wiring board without reducing an electric connection reliability between through-holes and viaholes at high temperature and high humidity conditions.
- the present invention also provides a construction of a multilayer printed wiring board for ensuring a reliable electric connection between an internal layer circuit inside a substrate and build-up multilayer circuit layers on both surfaces of the substrate even when the substrate is multi-layered.
- the present invention also provides a construction of a resin composition used for filling through-hole of the aforementioned multilayer printed wiring boards.
- the present invention provides a multilayer printed wiring board comprising a substrate provided with through-holes, and a conductor circuit formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes being filled with a filler, wherein the internal surfaces of the through-holes are roughened, and the filler comprises metal particles and thermosetting resin or thermoplastic resin.
- the invention also provides a multilayer printed wiring board comprising a substrate provided with through-holes, and a conductor circuit formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes being filled with a filler, wherein internal surfaces of the through-holes are roughened, and the filler comprises metal particles and thermosetting resin or thermoplastic resin and an exposed portion of the filler in the through-holes is covered with a through-hole-covering conductor layer.
- the present invention provides a multilayer printed wiring board comprising a substrate provided with through-holes, and a conductor circuit formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes being filled with a filler, wherein internal surfaces of the through-holes are roughened, and the filler comprises metal particles and thermosetting resin or thermoplastic resin and an exposed portion of the filler in the through-holes is covered with a through-hole-covering conductor layer, and the through-hole-covering conductor layer is connected to a viahole formed just above the conductor layer.
- Another aspect of the present invention provides a process of producing a multilayer printed wiring board comprising at least the following steps: forming a conductor layer and a through-hole on both surfaces of a substrate by at least one of electroless plating, or electroplating, forming a roughened layer on the internal surface of the through-hole, filling the through-hole provided with the roughened layer on its internal surface with a filler comprising metal particles and thermosetting resin or thermoplastic resin, and drying and curing the filler, and forming an interlaminar insulating resin layer and then forming a conductor circuit by subjecting the substrate to at least one of electroless plating, or electro-plating.
- Another aspect of the present invention provides a process of producing a multilayer printed wiring board comprising at least the following steps: forming a conductor layer and a through-hole on both surfaces of a substrate by at least one of electroless plating, or electroplating, forming a roughened layer on an internal surface of the through-hole, filling the through-hole with a filler comprising metal particles and thermosetting resin or thermoplastic resin, and drying and curing the filler, subjecting an exposed portion of the filler on the through-hole to at least one of electroless plating, or electroplating to form a through-hole-covering conductor layer, and forming an interlaminar insulating resin layer and then forming a conductor circuit by at least one of electroless plating, or electroplating.
- Another further aspect of the present invention provides a process of producing a multilayer printed wiring board comprising at least the following steps: forming a conductor layer and a through-hole on both surfaces of a substrate by at least one of electroless plating, or electroplating, forming a roughened layer on the internal surface of the through-hole, filling the through-hole provided with the roughened layer on its internal surface with a filler comprising metal particles and thermosetting resin or thermoplastic resin, and drying and curing the filler, subjecting an exposed portion of the filler on the through-hole to an at least one of electroless plating, or electroplating to form a through-hole-covering conductor layer, forming an interlaminar insulating resin layer, and forming a viahole and a conductor circuit in the interlaminar insulating resin layer located just above the through-hole, and connecting the viahole to the through-hole-covering conductor layer.
- the present invention provides a resin composition for filling through-hole of a printed wiring board, which resin composition comprises a particulate substance, a resin and an ultrafine inorganic powder.
- FIG. 1 is a cross section view illustrating an embodiment of the multilayer printed wiring board according to the present invention.
- FIGS. 2 (a)-(f) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 3 (a)-(e) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 4 (a)-(d) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 5 (a)-(f) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 6 (a)-(e) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 7 (a)-(d) is a diagram illustrating some of the production steps of the multilayer printed wiring board according to the present invention.
- FIGS. 8 (a) and (b) is an enlarged cross section view illustrating a part of the multilayer printed wiring board according to the present invention.
- the multilayer printed wiring board according to one aspect of the present invention is characterized by forming a roughened layer on an internal surface conductor of the through-hole filled with a filler.
- a through-hole-covering conductor layer is formed for covering an exposed surface of the filler filling the through-hole.
- the multilayer printed wiring board is characterized by forming a viahole just above the through-hole-covering conductor layer which is formed just above the through-hole and by connecting the viahole to the conductor layer.
- a yet another aspect of the present invention concerns a resin composition for filling through-hole of the aforementioned multilayer printed wiring board.
- a roughened layer is formed on the internal surface of the through-hole in order to bring the filler into intimate contact with the through-hole via the roughened layer and to avoid the formation of voids. If a void is formed between the filler and the through-hole, a conductor layer formed just thereabove by electroplating becomes bumpy or air in the void expands by heat and causes cracks or delamination, whereas moisture accumulated in the void causes migration or cracks. The formation of a roughened layer can avoid such defects.
- wiring can be installed just above the through-hole and a viahole can be connected directly thereto, as described below.
- the through-hole-covering conductor layer plays a role of protecting a resin ingredient in the filler from erosion.
- the viahole which is directly connected via the through-hole-covering conductor layer formed just above the through-hole precludes the formation of a land (internal layer pad) for wiring around the through-hole as in conventional equivalents.
- the shape of the land of the through-hole can remain a perfect circle. Accordingly, intervals between through-holes formed in a substrate can be reduced so as to decrease dead spaces and increase the number of through-holes. In other words, this construction ensures intervals of adjacent through-holes to be as narrow as 700 ⁇ m or less.
- Such a construction ensures lines of a back build-up wiring layer of the substrate to connect to a front build-up wiring layer through a multitude of through-holes.
- wiring of the conductor circuit to the periphery of the substrate can be installed in both the front and back build-up layers.
- a plurality of wiring from plural bumps on the back surface are integrated and connected to bumps on the front surface in a multilayer printed wiring board.
- through-holes are formed in high density, wiring can be integrated in front and back build-up wiring layers in the same condition so that the numbers of build-up wiring layers can be the same between the front and back surfaces and, in addition, can be reduced.
- the pitch between through-holes may be set to equal to or less than 700 ⁇ m in order to obtain the aforementioned operations and advantages.
- the pitch of equal to or less than 700 ⁇ m increases the number of through-holes and ensures connection from the front to the back build-up layers.
- a roughened layer is formed on the internal surfaces of the through-holes and/or on the surface of the through-hole-covering conductor layer which covers the filler exposed from the through-hole.
- the latter roughened layer ensures a direct connection of a viahole to the through-hole-covering layer with a high reliability. Consequently, even when used at high temperature and high humidity conditions, high density wiring and through-holes in a build-up multilayer printed wiring board can easily be achieved without reducing electric connection reliability between the through-hole and viahole.
- the thickness of the roughened layer formed on the internal surface of through-holes or on the surface of the conductor layer should preferably fall in the range from 0.1 to 10 ⁇ m. This is because a thicker roughened layer causes a short circuit between layers, whereas a thinner roughened layer decreases adhesion of the roughened layer with respect to an adhered layer.
- These roughened layers may preferably be obtained by subjecting the conductor on the internal surface of through-holes or the surface of the through-hole-covering conductor layer to an oxidation (graphitization)-reduction treatment or a treatment with an aqueous mixture of an organic acid and a copper(II) complex, or a plating treatment with needle-formed alloy of a copper-nickel-phosphorus.
- an oxidation bath comprising NaOH (10 g/l), NaClO 2 (40 g/l) and Na 3 PO 4 (6 g/l), and a reduction bath comprising NaOH (10 g/l) and NaBH 4 (6 g/l) are used.
- the solution acts as follows in the coexistence of oxygen such as in spraying or bubbling and dissolves a metal foil such as copper as a conductor circuit: Cu+Cu(II)A n ⁇ 2Cu(I)A n/2 2Cu(I)A n/2 +(n/4)O 2 +nAH (aeration) ⁇ 2Cu(II)A n +(n/2)H 2 O
- the copper(II) complex used in this treatment is preferably a copper(II) complex of an azole.
- the copper(II) complex of an azole acts as an oxidizing agent for oxidizing a metallic copper or the like.
- the preferred azole includes diazoles, triazoles and tetrazoles. Among them, imidazole, 2-methylimidazole, 2-ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole and 2-undecylimidazole are preferred.
- the content of the copper(II) complex of an azole should preferably fall in the range from 1 to 15% by weight. Within this range, satisfactory solubility and stability can be obtained.
- the organic acid is incorporated for dissolving a copper oxide.
- At least one organic acid selected from formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, maleic acid, benzoic acid, glycolic acid, lactic acid, maleic acid or sulfamic acid is desirable.
- the concentration of the organic acid may preferably fall in the range from 0.1% to 30% by weight. Within this range, solubility and dissolution stability of an oxidized copper can be maintained.
- the produced copper(I) complex is dissolved by a function of an acid and bonded with oxygen to form a copper(II) complex and thereby to contribute oxidation of copper again.
- Halogen ions such as fluorine ions, chlorine ions, bromine ions or the like may be added to the etchant comprising the organic acid-copper(II) complex for supplementing dissolution of copper or oxidation of an azole.
- the halogen ion can be supplied by adding hydrochloric acid, sodium chloride or the like to the solution.
- the concentration of the halogen ion may preferably fall in the range from 0.01 to 20% by weight. Within this range, the formed roughened layer has a satisfactory adherence with respect to the interlaminar insulating resin layer.
- the etchant comprising an organic acid-copper(II) complex may be prepared by dissolving a copper(II) complex of an azole and an organic acid (if necessary with halogen ion) in water.
- the plating treatment with a needle-formed alloy of copper-nickel-phosphorus may preferably by conducted using a plating bath containing 1 to 40 g/l of copper sulfate, 0.1 to 6.0 g/l of nickel sulfate, 10 to 20 g/l of citric acid, 10 to 100 g/l of a phosphinate, 10 to 40 g/l of boric acid, and 0.01 to 10 g/l of a surfactant.
- the first filler (A) used in the present invention should preferably comprise metal particles, a thermosetting resin and a curing agent, or metal particles and a thermoplastic resin, whereas a solvent can be added as necessary.
- a solvent can be added as necessary.
- the metal particles there may be mentioned particles of copper, gold, silver, aluminum, nickel, titanium, chromium, tin/lead, palladium, platinum or others.
- the particle size of the metal particles may preferably fall in the range from 0.1 to 50 ⁇ m. When the particle size is less than 0.1 ⁇ m, surfaces of the metal particles are oxidized so as to reduce wettability of the filler with respect to the resin, whereas when the particle size exceeds 50 ⁇ m, the print quality is deteriorated.
- the metal particles may preferably be incorporated in a ratio ranging from 30 to 90% by weight with respect to the total weight. When the ratio is less than 30% by weight, the adherence of the conductor layer covering an exposed filler from through-hole is deteriorated, whereas when the ratio exceeds 90% by weight, the print quality is worsened.
- the resin examples include epoxy resins, phenolic resins, polyimide resins, polytetrafluoroethylene (PTFE) and other fluororesins, bismaleimide-triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, aramid resins, PEEK, PEKK, PET and others.
- the surfaces of the metal particles can be treated with a complexing agent or a modifier for improving their adherence with respect to the resin.
- a complexing agent or a modifier for improving their adherence with respect to the resin for the thermosetting resin, any of imidazole-series, phenol-series or amine-series curing agents can be employed, and any of NMP (N-methylpyrrolidone), DMDG (diethylene glycol dimethyl ether), glycerin, water, 1-, 2- or 3-cyclohexanol, cyclohexanone, methyl cellosolve, methyl cellosolve acetate, methanol, ethanol, butanol, propanol, bisphenol A type epoxy and other solvents may be used.
- NMP N-methylpyrrolidone
- DMDG diethylene glycol dimethyl ether
- glycerin water, 1-, 2- or 3-cyclohexanol, cyclohexanone, methyl cellosolve, methyl
- the filler preferably has, as an optimum composition, a combination of a mixture of Cu powder and bisphenol F type solvent-free epoxy (manufactured by Yuka Shell Co., Ltd., trade name: E-807) in a weight ratio of 6:4 to 9:1 and a curing agent, or a combination of Cu powder, PPS and NMP in a weight ratio of 8:2:3.
- filler (B) As a second filler (B) used in the present invention, there may be mentioned following ones. To be more specific, such a filler (B) should be distinguished from the aforementioned filler (A), and filler (B) is essentially characterized by comprising a particulate substance, a resin and an ultrafine inorganic powder.
- the aforementioned resin composition for filling through-hole comprises an inorganic ultrafine powder having an average particle size preferably ranging from 1 to 1,000 nm (more preferably from 2 to 100 nm), and when it is charged in the through-hole, a meshwork formed as a function of an intermolecular force of the ultrafine inorganic powder traps the particulate substance so as to prevent isolation and precipitation of the particulate substance.
- the particulate substance can be engaged into the through-hole-covering conductor layer above the filler as an anchor, and in addition, crevices for anchoring can be formed by dissolving and removing the particulate substance to contribute to effective integration of the filler and the through-hole-covering conductor layer.
- the particulate substance is a metal particle
- the metal particle protrudes from the surface of the filler so that the protruded metal particle and the through-hole-covering conductor layer covering the same as integrated to enhance the adherence therebetween.
- delamination between the filler and the through-hole conductor layer can be prevented, and hence delamination between the filler and the conductor layer covering the filler can be prevented even at high temperature and high humidity conditions.
- the particulate substance at least one member selected from metal particles, inorganic particles or resin particles is preferred.
- metal particles those used in the filler (A) may be employed.
- the inorganic particles include particles of silica, alumina, mullite, silicon carbide and the like.
- a surface-modifier such as a silane coupling agent can be added.
- resin particles at least one member selected from epoxy resins, benzoguanamine resins or amino resins is advantageously employed. These resins have satisfactory adherence with respect to the constitutive resin of the filler.
- the particulate substance preferably has an average particle size ranging from 0.1 to 30 ⁇ m. Such an average particle size enhances adherence with respect to the through-hole-covering conductor layer covering the filler.
- the concentration of the particulate substance may preferably fall in the range from 30 to 90% by weight based upon the total solid contents of the resin composition. Within this range, satisfactory adherence and print quality can be obtained simultaneously.
- the constitutive resin (which should be distinguished from the aforementioned resin particle) of the resin composition for filling through-hole includes thermosetting resins and thermoplastic resins.
- thermosetting resin includes at least one member selected from epoxy resins, polyimide resins or phenolic resins.
- thermoplastic resin use may preferably made of at least one member selected from polytetrafluoroethylene (PTFE), tetrafluoroethylene-hexafluoropropylene copolymers (FEP), tetrafluoroethylene-perfluoroalcoxy copolymers (PFA) and other fluororesins, polyethylene terephthalates (PET), polysulfones (PSF), polyphenylene sulfides (PPS), thermoplastic polyphenylene ethers (PPE), polyether sulfones (PES), polyether imides (PEI), polyphenylene sulfones (PPES), polyethylene naphthalates (PEN), polyether ether ketones (PEEK), or polyolefin resins.
- PTFE polytetrafluoroethylene
- FEP tetrafluoroethylene-hexafluoropropylene copolymers
- PFA tetrafluoroethylene-perfluoroalc
- At least one member selected from bisphenol type epoxy resins or novolac type epoxy resins can advantageously be used as the resin for filling through-hole.
- the viscosity of a bisphenol type epoxy resin can be regulated by selecting from A-type resins, F-type resins or others suitably without the use of a diluent solvent.
- a novolac type epoxy resin has a high strength, excellent heat resistance and chemical resistance and is not disintegrated even in a strongly basic solution such as a plating solution and not degraded by heat.
- bisphenol type epoxy resin use is preferably made of at least one member selected from bisphenol A type epoxy resins or bisphenol F type epoxy resins.
- bisphenol F type epoxy resins can advantageously be employed as they can be used at a low viscosity without any solvent.
- At least one member selected from phenol novolac type epoxy resins and cresol novolac type epoxy resins may preferably be employed as the novolac type epoxy resin.
- the composition ratio thereof should preferably fall in the range from 1/1 to 1/100 by weight. Within this range, excessive increase of the viscosity can be prevented.
- the preferred curing agent used in the resin composition includes imidazole-series curing agents, acid anhydride-series curing agents and amine-series curing agents, since these curing agents exhibit a small shrinkage in curing. By preventing such shrinkage in curing, integration between the filler and the conductor layer covering the same can be enhanced and the adherence can be improved.
- the resin composition may be diluted with a solvent as necessary.
- a solvent there may be mentioned NMP (N-methylpyrrolidone), DMDG (diethylene glycol dimethyl ether), glycerin, water, 1-, 2- or 3-cyclohexanol, cyclohexanone, methyl cellosolve, methyl cellosolve acetate, methanol, ethanol, butanol, propanol and the like.
- ultrafine inorganic particle (which should be distinguished from the aforementioned inorganic particle) constituting the resin composition for filling through-hole includes silica, alumina, silicon carbide and mullite, among which silica is most desirable.
- the ultrafine inorganic particle should have an average particle size ranging from 1 to 1,000 nm and more preferably from 2 to 100 nm. Within this range, the particle size is fine and thus repletion of through-holes is not deteriorated, and meshwork bonds, which are estimated as hydrogen bonds, can be formed so as to trap the particulate substance.
- the concentration of the ultrafine inorganic particle should preferably fall in the range from 0.1 to 5% by weight relative to the total solid contents in the resin composition. This is because precipitation of the metal particle can be prevented without deteriorating repletion within this range.
- the filler being composed of the resin composition as mentioned above should be a nonconducting filler having a specific resistance of equal to or more than 10 6 ⁇ cm and more preferably equal to or more than 10 8 ⁇ cm.
- the filler is electroconductive, cuttings of the filler are formed in polishing of the resin composition after curing, and they adhere between the conductor circuit so as to cause a short circuit.
- the composition should be cured and shrunk. If such a shrinkage by curing is excessive, delamination between the filler and the through-hole-covering conductor layer covering the filler occurs.
- the interlaminar insulating resin layer according to the present invention can be composed of an lower layer comprising a resin having excellent insulation properties and an upper layer comprising a resin having a satisfactory adherence, using any of thermosetting resins, thermoplastic resins or complexes of a thermosetting resin and a thermoplastic resin.
- thermosetting resin epoxy resins, polyimide resins, phenolic resins, thermosettable polyphenylene ethers (PPE) may be employed.
- thermoplastic resin examples include polytetrafluoroethylene (PTFE) and other fluororesins, polyethylene terephthalates (PET), polysulfones (PSF), polyphenylene sulfides (PPS), thermoplastic polyphenylene ethers (PPE), polyether sulfones (PES), polyether imides (PEI), polyphenylene sulfones (PPES), tetrafluoroethylene-hexafluoropropylene copolymers (FEP), tetrafluoroethylene-perfluoroalkoxy copolymers (PFA), polyethylene naphthalates (PEN), polyether ether ketones (PEEK) and polyolefin resins.
- the complex of a thermosetting resin and a thermoplastic resin includes an epoxy resin-PES, an epoxy resin-PSF, an epoxy resin-PPS, an epoxy resin-PPES and the like.
- a glass cloth-impregnated resin complex can be used as the interlaminar insulating resin layer.
- the glass cloth-impregnated resin complex includes a glass cloth-impregnated epoxy, a glass cloth-impregnated bismaleimide-triazine, a glass cloth-impregnated PTFE, a glass cloth-impregnated PPE, a glass cloth-impregnated polyimide and the like.
- An adhesive for electroless plating can also be used as the interlaminar insulating resin layer in the present invention.
- an adhesive formed by dispersing cured heat-resistant particles soluble in an acid or an oxidizing agent into an uncured heat-resistant resin hardly soluble in an acid or an oxidizing agent through curing treatment is most desirable.
- the heat-resistant resin particles are dissolved and removed by a treatment with an acid or an oxidizing agent so as to form a roughened layer composed of reverse- ⁇ -formed anchors on its surface.
- the cured heat-resistant resin particles in the adhesive for electroless plating particularly preferred is at least one member selected from ⁇ circle around (1) ⁇ heat-resistant resin particles having an average particle size of equal to or less than 10 ⁇ m, ⁇ circle around (2) ⁇ agglomerate particles obtained by aggregating heat-resistant resin powder having an average particle size of equal to or less than 2 ⁇ m, ⁇ circle around (3) ⁇ a mixture of heat-resistant resin powder having an average particle size ranging from 2 to 10 ⁇ m and heat-resistant resin powder having an average particle size of equal to or less than 2 ⁇ m, ⁇ circle around (4) ⁇ quasi-particles obtained by adhering at least one of heat-resistant resin powder or inorganic powder each having an average particle size of equal to or less than 2 ⁇ m to surfaces of heat-resistant resin powder having an average particle size ranging from 2 to 10 ⁇ m, ⁇ circle around (5) ⁇ a mixture of heat-resistant resin powder having an average particle size ranging from 0.1 to 0.8 ⁇ m and heat-resistant resin
- thermosetting resins thermoplastic resins and complexes of a thermosetting resin and a thermoplastic resin may be employed.
- the conductor circuit (inclusive of the through-hole-covering conductor layer) formed on the substrate and the conductor circuit formed on the interlaminar insulating resin layer can be connected to each other through a viahole.
- the viahole may be filled with a plated film or a filler.
- a process of producing the multilayer printed wiring board through a semi-additive process will be described below, whereas a full-additive process, a multilamination process and a pin lamination process can also be employed in the production process of the multilayer printed wiring board according to the invention.
- an aqueous plating solution containing 2.2 ⁇ 10 ⁇ 2 to 4.1 ⁇ 10 ⁇ 2 mol/l of copper ions, 2.2 ⁇ 10 ⁇ 3 to 4.1 ⁇ 10 ⁇ 3 mol/l of nickel ions and 0.20 to 0.25 mol/l of phosphinic acid ions is preferably employed.
- the crystal structure of a deposited film is in needle-form so as to exhibit a satisfactory anchoring effect.
- a complexing agent and/or a additive can be added to the electroless plating aqueous solution in addition to the above compounds.
- a surfactant may also be added to the solution in a concentration ranging from 0.01 to 10 g/l.
- Preferred surfactant includes, for example, acetylene-containing polyoxyethylene surfactants such as Surfinol 440, 465 and 485 manufactured by Nisshin Kagaku Kogyo Co., Ltd.
- an aqueous plating solution containing 1 to 40 g/l of copper sulfate, 0.1 to 6.0 g/l of nickel sulfate, 10 to 20 g/l of citric acid, 10 to 100 g/l of a phosphinate, 10 to 40 g/l of boric acid, and 0.01 to 10 g/l of a surfactant is advantageously used.
- an oxidation bath containing NaOH (20 g/l), NaClO 2 (g/l) and Na 3 PO 4 (15.0 g/l) and a reduction bath containing NaOH (2.7 g/l) and NaBH 4 1.0 g/l) are preferably employed.
- the surface of copper is roughened as a function of oxidizing properties of divalent copper in the solution.
- a typical example of the solution includes (CZ8100 solution manufactured by MEC Co., Ltd.
- the roughened layer may be covered with a layer of a metal or noble metal having an ionization tendency of more than copper but less than titanium.
- a metal or noble metal layer covering the roughened layer can prevent the dissolution of the conductor circuit due to a local electrode reaction created in the roughening of the interlaminar insulating resin layer.
- the thickness of this layer is preferably from 0.01 to 2 ⁇ m.
- the metal preferred is at least one metal selected from titanium, aluminium, zinc, iron, indium, thallium, cobalt, nickel, tin, lead or bismuth.
- the noble metal includes, for instance, gold, silver, platinum and palladium.
- tin is desirable, because it can form a thin layer through electroless substitution plating and can advantageously be followed to the roughened layer.
- a solution of tin borofluoride-thiourea or tin chloride-thiourea is used. In this case, Sn layer having a thickness ranging from 0.01 to 2 ⁇ m through Cu—Sn substitution reaction.
- a noble metal sputtering method, vaporization method or the like is employed.
- a conductive paste can be employed instead of the filler.
- the conductive paste is composed of metal powder and a resin, whereas a solvent can be added thereto as necessary.
- the metal powder powder of Cu, Au, Ag, Al, Ni, Pd, Pt, Ti, Cr, Sn/Pb or the like may be used.
- the metal powder should preferably have a particle size ranging from 0.1 to 30 ⁇ m.
- the resin includes, for instance, epoxy resins, phenolic resins, polyimide resins, polytetrafluoroethylene (PTFE) and other fluororesins, bismaleimide-triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, aramid resins, PEEK, PEKK and PET.
- epoxy resins for instance, epoxy resins, phenolic resins, polyimide resins, polytetrafluoroethylene (PTFE) and other fluororesins, bismaleimide-triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, aramid resins, PEEK, PEKK and PET.
- any of NMP N-methylpyrrolidone
- DMDG diethylene glycol dimethyl ether
- glycerin water, 1-, 2- or 3-cyclohexanol, cyclohexanone methyl cellosolve, methyl cellosolve acetate, methanol, ethanol, butanol, propanol, bisphenol A type epoxy and other solvents can be used.
- a modifier for metal surface such as a saline coupling agent may be added to the filler.
- other additives such as defoaming agents inclusive of acrylic defoaming agents and silicon defoaming agents, silica, alumina, talc and other inorganic fillers can also be added.
- a silane coupling agent may be attached to the surfaces of the metal particle.
- the filler is printed in the following condition, for example. That is, printing is conducted using a print masking plate of Tetlon mesh plate and a square squeegee of 45° in the condition of Cu paste viscosity: 120 Pa ⁇ s, squeegee rate: 13 mm/min, squeegee amount: 1 mm.
- a photosensitive dry film is laminated onto the surface of the plated film, a photomask film (preferably made of glass) imaged with a pattern is placed thereon, exposed to light and then developed with a developer to form an etching resist.
- a portion where resist is not formed is then subjected to etching to form a conductor circuit portion and a through-hole-covering conductor layer portion which covers the filler.
- an aqueous solution of sulfuric acid-hydrogen peroxide an aqueous solution of a peroxosulfate such as ammonium peroxodisulfate, sodium peroxodisulfate and potassium peroxodisulfate, or an aqueous solution of iron(II) chloride or copper(II) chloride.
- the etching resist is then peeled off to form an independent conductor circuit and through-hole-covering conductor layer, and then a roughened layer is formed onto the surfaces of the conductor circuit and the through-hole-covering conductor layer.
- the conductors are excellent in adherence with respect to the interlaminar insulating resin layer so that cracks starting from a boundary face between the side face of the conductor circuit and through-hole-covering conductor layer which covers the filler and the insulating resin layer can be prevented.
- the through-hole-covering conductor layer covering the filler can effectively contribute to improvement of adherence with respect to viaholes which are electrically connected thereto.
- the roughened layers may be formed according to any of the processes mentioned above, such as a graphitization (oxidation)-reduction treatment, a plating with a needle-formed alloy or an etching process.
- a resin is applied and charged between the conductor circuits and then cured in order to reduce unevenness due to the conductor layer formed on surface of the substrate.
- the surface of the resin should preferably be polished and smoothed so that the conductor is exposed.
- a resin composed of a bisphenol A type epoxy resin, bisphenol F type epoxy resin or other bisphenol type epoxy resin, an imidazole curing agent and inorganic particles is desirable.
- Such a bisphenol type epoxy resin has a low viscosity and a satisfactory applicability.
- a bisphenol F type epoxy resin can be applied without solvent, and hence is advantageous as to prevent the formation of cracks or delamination caused by volatilization of a solvent in heating and curing.
- a roughened layer is formed on surface of each of the conductors after polishing.
- a plating resist is formed onto the substrate after completion of the steps ⁇ circle around (1) ⁇ and ⁇ circle around (2) ⁇ , and a non-resist-formed portion is subjected to an electroplating so as to form a conductor circuit and a through-hole-covering conductor layer portion.
- a solder plated film is then formed on these conductors using a solder electroplating solution composed of tin borofluoride, lead borofluoride, hydroborofluoric acid and peptone.
- the plating resist is then removed, and the electroless plating film and copper foil located beneath the plating resist are removed by etching, and then the solder plating film is dissolved and removed with an aqueous solution of borofluoric acid to form a conductor layer.
- interlaminar insulating resin layer is used any of thermosetting resins, thermoplastic resins or complexes of a thermosetting resin and a thermoplastic resin.
- the aforementioned adhesive for electroless plating can also be used as a material for the interlaminar insulating resin.
- the interlaminar insulating resin layer is formed by applying an uncured solution of any of these resins with a roll coater or a curtain coater, or laminating a resin film through thermo-compression bonding.
- the interlaminar insulating resin layer formed on the conductor circuit of the substrate frequently has a state of causing unevenness due to the fact that the thickness of the interlaminar insulating resin layer on the conductor circuit pattern is thin and the thickness of the interlaminar insulating resin layer on the conductor circuit having a large area is thick. Accordingly, it is desirable that the surface of the interlaminar insulating resin layer is smoothed by pressing a metal plate or a metal roll onto the interlaminar insulating resin layer of the uneven state while heating.
- the opening is formed by light exposure and development when the interlaminar insulating resin layer is composed of a photosensitive resin, and by a laser beam irradiation when it is composed of a thermoplastic resin or a thermoplastic resin.
- the laser beam includes a carbon dioxide gas laser, an ultraviolet ray laser, an excimer laser and the like.
- the substrate may be subjected to a desmearing treatment.
- the desmearing treatment can be conducted using an oxidizing agent composed of an aqueous solution of chromic acid, a per-manganate or the like, or by a treatment with an oxygen plasma.
- the surface of the insulating layer is subjected to a roughening treatment by selectively and removing only the heat-resistant resin particles existing in the surface of the insulating layer through dissolution or decomposition with an acid or an oxidizing agent.
- an acid there may be mentioned phosphoric acid, hydrochloric acid, sulfuric acid, or organic acids including formic acid, acetic acid and others.
- the use of the organic acid is desirable, because it hardly corrodes the metal conductor layer exposed from the viahole in the roughening treatment.
- chromic acid or a permanganate (potassium permanganate or the like)
- thermosetting resin or a thermoplastic resin is employed as the insulating resin layer
- a roughening treatment on the surface of the layer using an oxidizing agent selected from aqueous solutions of chromic acid, permanganates and the like is also effective.
- the surface of the layer is roughened by, for example, a plasma treatment or a treatment with Tetraetch (a metallic naphthalene compound manufactured by Junkosha Co., Ltd.).
- the catalyst nuclei In general, palladium-tin colloid is used as the catalyst nuclei.
- the substrate is dipped in a solution of the colloid, dried and then heated to fix the catalyst nuclei on the surface of the resin.
- the catalyst nuclei can be formed by driving metal nuclei onto the surface of the resin through CVD, sputtering or plasma.
- the metal nucleic are embedded on the surface of the resin, and plating is deposited with the metal nuclei as cores to form conductor circuits. Therefore, even when a resin which is hardly roughened or a resin having a poor adherence with respect to the conductor circuit such as a fluororesin (polytetrafluoroethylene or the like) is used, adherence can be ensured.
- the metal nuclei at least one metal selected from palladium, silver, gold, platinum, titanium, copper and nickel is preferred.
- the amount of the metal nuclei should preferably be equal to or less than 20 ⁇ g/cm 2 . When it exceeds this range, removal of the metal nuclei is required.
- an aqueous solution of a mixture of sulfuric acid and hydrogen peroxide an aqueous solution of a persulfate such as ammonium persulfate, sodium persulfate and potassium persulfate, an aqueous solution of iron chloride, copper chloride or the like is advantageously used.
- the viaholes are filled with an electrolytic plated metal to form so-called filled viaholes in order to ensure smoothness of the interlaminar insulating resin layer.
- FIG. 1 is a cross section view illustrating a multilayer printed wiring board according to an embodiment of the invention, which has a construction composed of a substrate 100 , and build-up wiring layers 101 A, 101 B respectively formed on the front and back surfaces of the substrate 100 .
- Each of the build-up layers 101 A, 101 B is composed of an interlaminar insulating resin layer 104 provided with a viahole 102 and a conductor circuit 103 , and an interlaminar insulating resin layer 204 provided with a viahole 202 and a conductor circuit 203 .
- a solder bump 105 is formed on the front surface for connecting to a bump of an IC chip (not shown), and a solder bump 106 is formed on the back surface for connecting to a bump of a mother board (not shown).
- a conductor circuit starting from the solder bump 105 connecting to the IC chip is routed in the peripheral direction of the substrate, and connected to the solder bump 106 connecting to the mother board.
- the front build-up layer 101 A and the back build-up layer 101 B are connected to each other through through-holes 107 formed on the substrate 100 .
- the through-holes 107 are filled with a filler 108 , and a through-hole-covering conductor layer 109 is so formed as to cover an exposed surface of the filler 108 from the through-holes 107 .
- the upper-layer viahole 102 is connected to the conductor layer 109
- the upper-layer viahole 202 is connected to the conductor circuit 103 connecting to the viahole 102 .
- the solder bumps 105 , 106 are formed on the viahole 202 , or on the conductor circuit 203 connecting to the viahole 202 .
- the through-hole-covering conductor layer 109 located above the filler 108 in the through-holes 107 is formed round, and the viahole 102 is connected directly to the conductor layer 109 .
- the wiring board does not require addition of an internal layer pad for connecting from the through-holes 107 to the viahole 102 as in conventional equivalents, the land shape of the through-hole 107 can be set to round. As a result, the number of through-holes can be increased by densifying the through-holes 107 formed in the substrate 30 .
- routing for dispersing the conductor circuits to the periphery of the substrate can be conducted on both the front and back build-up layers 101 A, 101 B.
- a multilayer printed wiring board a plurality of wiring from plural front bumps are connected to back bumps while being integrated, as described above.
- wiring can be integrated at the same pace between the front and back build-up wiring layers 101 A, 101 B.
- the numbers of the layers of the front and back build-up wiring layers 101 A, 101 B can be set to the same and can be reduced.
- a palladium-tin colloid was then applied to substrate, and the substrate was immersed in an electroless plating solution having the following composition to form an electroless plated film of 2 ⁇ m in thickness all over the surface of the substrate.
- the substrate was subjected to an electrolytic copper plating under the following conditions to form an electrolytic copper plated film having a thickness of 15 ⁇ m (see FIG. 2 (c)).
- the multilayer printed wiring board prepared by the above mentioned manner ensures through-holes each provided with a perfectly circular land, and it can provide a land pitch of about 600 ⁇ m and thereby through-holes can be formed in a high density so as to density through-holes easily.
- the number of through-holes in the substrate can be increased, an electric connection with respect to conductor circuits in the multilayer core substrate can sufficiently be ensured through the through-holes.
- a multilayer printed wiring board was manufactured in the same manner as in Example 1, except that when through-holes were filled with a copper paste, a through-hole-covering conductor layer 10 for covering an exposed copper paste from the through-holes was not formed. According to this process, pits might be formed because the surface of the copper paste was frequently removed in the formation of openings on an insulating resin layer by a laser beam irradiation.
- a multilayer printed wiring board was obtained in a similar manner to Example 1, except that the following composition was employed as the filler.
- Bisphenol F type epoxy resin manufactured by 100 parts by weight Yuka Shell Co., Ltd., E-807
- Imidazole curing agent manufactured by Shikoku 5 parts by weight Kasei Co., Ltd., 2E4MZ-CN
- Copper powder having a particle size of 15 ⁇ m or 735 parts by weight less manufactured by Fukuda Metal Foil and Powder Co., Ltd., SCR-Cu-15
- Aerosil #200 10 parts by weight
- Defoaming agent manufactured by Sannopko, 0.5 part by weight Pernol S4
- example 1 The procedure of example 1 was repeated to produce a multilayer printed wiring board, except that a bisphenol F type epoxy resin containing no metal particle was used as the filler for filling the through-hole.
- a multilayer printed wiring board was produced in a similar manner to Example 1, except that through-holes were filled with the epoxy resin and the surfaces of the epoxy resin exposed from the through-holes were roughened with chromic acid and then covered with a conductor layer.
- a multilayer printed wiring board was obtained in the same manner as in Example 1, except that a roughened layer was not formed on the surface of the internal conductor on the through-holes.
- viaholes could be formed just above the through-holes according to the multilayer printed wiring boards of Examples 1 to 4 of the present invention, and thus high density through-holes could easily be obtained.
- no peeling was observed between the filler and the internal surface conductor of the through-hole, or between the filler and the through-hole-covering conductor, and neither crack nor migration was found in the heat cycle test and PCT.
- Example 2 the substrate was subjected to an electrolytic copper plating in the same conditions as in Example 1 to form an electrolytic copper plated film having a thickness of 15 ⁇ m (see FIG. 2 (c)).
- a resin composition (filler) 5 for filling through-hole was prepared by kneading, through three rolls, 3.5 parts by weight of a cresol novolac type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epikote 152), 14.1 parts by weight of a bisphenol F type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epikote 807), 1.0 part by weight of ultrafine silica particles (Aerosil R202) having an average particle size of 14 nm, 1.2 parts by weight of an imidazole curing agent (manufactured by Shikoku Kasei Co., Ltd., 2E4MZ-CN) and 100 parts by weight of copper powder having an average particle size of 15 ⁇ m, and adjusting the viscosity of the mixture to the range from 200 to 300 Pa ⁇ s at 22 ⁇ 1° C.
- a cresol novolac type epoxy resin manufactured by Yuka Shell Co., Ltd., Epikote 152
- the surface of the substrate was smoothed by removing the roughened surface positioned above the through-holes and the filler 5 protruding from the through-holes 3 by means of belt sander abrasion using a #400 belt abrasive paper (manufactured by Sankyo Rikagaku Co., Ltd.), and further buffing the substrate with alumina abrasive grains or SiC abrasive grains for removing scratches due to the belt sander abrasion (see FIG. 2 (e)).
- the interlaminar insulating resin agent 12 was cured by heating at 100° C. for 1 hour, at 120° C. for 3 hours, at 150° C. for 1 hour and at 180° C. for 7 hours.
- both surfaces of the substrate were smoothed by removing the surface areas of the interlaminar insulating resin agent 12 charged in gaps of the conductor circuits 9 or of the through-hole-covering conductor layer 10 , and the roughened layer 11 positioned above the conductor circuits 9 or the through-hole-covering layer 10 to give a substrate in which the interlaminar insulating resin agent 12 and the conductor circuits 9 or a side surface of the through-hole-covering conductor layer 10 were firmly adhered to each other through the interposition of the roughened layer 11 . That is, the surface of the interlaminar insulating resin agent 12 and those of the internal layer copper patterns could be aligned in the same plane by this step.
- the charged cured resin had a Tg point (glass transition point) of 155.6° C. and a linear thermal expansion coefficient of 44.5 ⁇ 10 ⁇ 6 /° C.
- the substrate was acidically degreased and soft-etched, and then treated with a catalyst solution containing palladium chloride and an organic acid to apply a Pd catalyst. After activating the catalyst, the substrate was immersed in an electroless plating solution of pH of 9 containing 8 g/l of copper sulfate, 0.6 g/l of nickel sulfate, 15 g/l of citric acid, 29 g/l of sodium hypophosphite, 31 g/l of boric acid and 0.1 g/l of a surfactant to form a roughened layer 11 of a Cu—Ni—P alloy having a thickness of 2.5 ⁇ m on the surfaces of the copper conductor circuits.
- the substrate was then subjected to a Cu—Sn substitution reaction at a temperature of 50° C. and pH of 1.2 by immersing in an electroless tin plating solution containing 0.1 mol/l of tin borofluoride and 1.0 mol/l of thiourea for 1 hour to form a Sn layer of 0.3 ⁇ m in thickness on the surface of the roughened layer (the Sn layer is not shown).
- An adhesive A for upper-layer electroless plating was prepared by mixing the above mixtures ⁇ circle around (1) ⁇ to ⁇ circle around (3) ⁇ .
- An adhesive B for lower-layer electroless plating was prepared by admixing the above mixtures ⁇ circle around (1) ⁇ to ⁇ circle around (3) ⁇ .
- the substrate was washed with water and immersed in an electroless tin substitution plating bath containing 0.1 mol/l of tin borofluoride and 1.0 mol/l of thiourea at 50° C. for 1 hour to form a tin substitution plated layer of 0.05 ⁇ m in thickness on the surface of the roughened layer 11 (where tine substituted layer is not shown).
- the viscosity was measured by B-type viscometer (manufactured by Tokyo Keiki Co., Ltd., model: DVL-B) using a rotor No. 4 at 60 rpm and a rotor No. 3 at 6 rpm.
- solder tin-silver, tin-indium, tin-zinc, tin-bismuth or other solders can be employed as the solder.
- a multilayer printed wiring board was produced in a similar manner to Example 1, except that the following composition was used as the resin composition for filling through-hole.
- a resin composition for filling through-hole was prepared by kneading through three rolls 3.5 parts by weight of a cresol novolac type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epikote 152), 14.1 parts by weight of a bisphenol F type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epitoke 807), 1.2 parts by weight of an imidazole curing agent (manufactured by Shikoku Kasei co., Ltd., 2E4MZ-CN) and 100 parts by weight of copper powder having an average particle size of 15 ⁇ m, and adjusting a viscosity to the range from 200 to 300 Pa ⁇ s at 22 ⁇ 1° C.
- a cresol novolac type epoxy resin manufactured by Yuka Shell Co., Ltd., Epikote 152
- 14.1 parts by weight of a bisphenol F type epoxy resin manufactured by Yuka Shell Co., Ltd., Epitoke 807
- an imidazole curing agent manufactured
- Example 1 The procedure of Example 1 was repeated to give a multilayer printed wiring board, except that the following resin composition was employed as the resin composition for filling through-hole.
- a resin composition for filling through-hole was prepared by mixing 17.6 parts by weight of a bisphenol F type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epikote 807), 1.0 part by weight of ultrafine silica particles (Aerosil R202) having an average particle size of 14 nm, 1.2 parts by weight of an imidazole curing agent (Shikoku Kasei Co., Ltd., 2E4MZ-CN) and 100 parts by weight of copper powder having an average particle size of 15 ⁇ m.
- a bisphenol F type epoxy resin manufactured by Yuka Shell Co., Ltd., Epikote 807
- ultrafine silica particles Aerosil R202 having an average particle size of 14 nm
- an imidazole curing agent Shikoku Kasei Co., Ltd., 2E4MZ-CN
- a multilayer printed wiring board was prepared in the same manner as in Example 1, except that the following resin composition was used as the resin composition for filling through-hole.
- a resin composition for filling through-hole was prepared by kneading, through three rolls, 3.5 parts by weight of a cresol novolac type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epikote 152), 1.0 part by weight of ultrafine silica particles (Aerosil R202) having an average particle size of 14 nm, 14.1 parts by weight of a bisphenol F type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epitoke 807), 1.2 parts by weight of an imidazole curing agent (manufactured by Shikoku Kasei Co., Ltd., 2E4MZ-CN) and 100 parts by weight of silica particles having an average particle size of 10 ⁇ m, and adjusting a viscosity to the range from 200 to 300 Pa ⁇ s at 22 ⁇ 1° C.
- a cresol novolac type epoxy resin manufactured by Yuka Shell Co., Ltd., Epikote 152
- ultrafine silica particles
- a multilayer printed wiring board was produced in a similar manner to Example 1, except that the following resin composition for filling through-hole was used and that after polishing the surface of the filler, the epoxy resin exposed from the surface was removed by chromic acid.
- a resin composition for filling through-hole was prepared by kneading through three rolls 3.5 parts by weight of a cresol novolac type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epitoke 152), 14.1 parts by weight of a bisphenol F type epoxy resin (manufactured by Yuka Shell Co., Ltd., Epitoke 807), 1.0 part by weight of ultrafine silica particles (Aerosil R202) having an average particle size of 14 nm, 1.2 parts by weight of an imidazole curing agent (manufactured by Shikoku Kasei Co., Ltd., 2E4MZ-CN) and 100 parts by weight of epoxy resin particles (manufactured by Sanyo Kasei Co., Ltd., Polymerpole) having an average particle size of 1 ⁇ m, and adjusting the viscosity of the mixture to the range from 200 to 300 Pa ⁇ s at 22 ⁇ 1° C.
- a cresol novolac type epoxy resin manufactured by
- Example 1 The procedure of Example 1 was repeated to give a multilayer printed wiring board, except that the following resin composition was employed as the resin composition for filling through-hole.
- a cresol novolac type epoxy resin manufactured by Yuka Shell Co., Ltd., Epikote 152
- 14.1 parts by weight of a bisphenol F type epoxy resin manufactured by Yuka Shell Co., Ltd., Epitoke 807
- an imidazole curing agent manufactured by Shikoku Kasei Co., Ltd., 2E4MZ-CN
- the copper powder precipitated so as to cause the filler to peel from the conductor layer covering the filler, and thereby to invite a break between the through-hole and viahole.
- the printed wiring board according to the present invention is useful for a multilayer wiring board which is used as a packaging substrate for packing IC chips, in particular for a multilayer printed wiring board obtained by a semi-additive process for a full-additive process.
- the resin composition according to the present invention is applicable as through-holes, as well as an interlaminar insulating resin layer of a printed wiring board.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28049997 | 1997-10-14 | ||
| JP34018097A JPH11186728A (ja) | 1997-10-14 | 1997-12-10 | 多層プリント配線板 |
| JP34018297A JP3564981B2 (ja) | 1997-10-14 | 1997-12-10 | 多層プリント配線板およびその製造方法 |
| JP6706598A JP3408417B2 (ja) | 1998-03-17 | 1998-03-17 | スルーホール充填用樹脂組成物および多層プリント配線板 |
| PCT/JP1998/004584 WO1999020090A1 (fr) | 1997-10-14 | 1998-10-12 | Plaquette a circuit imprime multicouche, son procede de fabrication et composition resineuse de remplissage de trous traversants |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/341,689 Reissue US6376049B1 (en) | 1997-10-14 | 1990-10-12 | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| USRE40947E1 true USRE40947E1 (en) | 2009-10-27 |
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Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US10/829,479 Expired - Lifetime USRE40947E1 (en) | 1997-10-14 | 1990-10-12 | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US09/341,689 Ceased US6376049B1 (en) | 1997-10-14 | 1990-10-12 | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US09/556,860 Expired - Lifetime US6376052B1 (en) | 1997-10-14 | 2000-04-21 | Multilayer printed wiring board and its production process, resin composition for filling through-hole |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/341,689 Ceased US6376049B1 (en) | 1997-10-14 | 1990-10-12 | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US09/556,860 Expired - Lifetime US6376052B1 (en) | 1997-10-14 | 2000-04-21 | Multilayer printed wiring board and its production process, resin composition for filling through-hole |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | USRE40947E1 (zh) |
| EP (3) | EP1030544B1 (zh) |
| CN (3) | CN1237852C (zh) |
| DE (2) | DE69842069D1 (zh) |
| TW (3) | TWI249979B (zh) |
| WO (1) | WO1999020090A1 (zh) |
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| US20080063792A1 (en) * | 2002-06-04 | 2008-03-13 | Sumitomo Electric Industries, Ltd. | Board for printed wiring, printed wiring board, and method for manufacturing them |
| US20080311285A1 (en) * | 2007-06-14 | 2008-12-18 | Seiko Epson Corporation | Contact hole forming method, conducting post forming method, wiring pattern forming method, multilayered wiring substrate producing method, electro-optical device producing method, and electronic apparatus producing method |
| US20090188710A1 (en) * | 2008-01-30 | 2009-07-30 | Cisco Technology, Inc. | System and method for forming filled vias and plated through holes |
| US20100218980A1 (en) * | 2009-02-27 | 2010-09-02 | Ibiden Co., Ltd. | Printed wiring board |
| US20110284912A1 (en) * | 2010-05-21 | 2011-11-24 | Napra Co., Ltd. | Electronic device and manufacturing method therefor |
| US20120066901A1 (en) * | 2008-12-24 | 2012-03-22 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
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| US12144121B2 (en) * | 2021-10-08 | 2024-11-12 | Ibiden Co., Ltd. | Wiring substrate and method for manufacturing wiring substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE40947E1 (en) | 1997-10-14 | 2009-10-27 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| KR20070086864A (ko) | 1998-09-03 | 2007-08-27 | 이비덴 가부시키가이샤 | 다층프린트배선판 및 그 제조방법 |
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| US8745863B2 (en) | 1999-06-02 | 2014-06-10 | Ibiden Co., Ltd. | Method of manufacturing multi-layer printed circuit board |
| US8822830B2 (en) | 1999-06-02 | 2014-09-02 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| US8782882B2 (en) | 1999-06-02 | 2014-07-22 | Ibiden Co., Ltd. | Method of manufacturing multi-layer printed circuit board |
| US20080063792A1 (en) * | 2002-06-04 | 2008-03-13 | Sumitomo Electric Industries, Ltd. | Board for printed wiring, printed wiring board, and method for manufacturing them |
| US8231766B2 (en) * | 2002-06-04 | 2012-07-31 | Sumitomo Electric Industries, Ltd. | Method for producing printed wiring board |
| US20080311285A1 (en) * | 2007-06-14 | 2008-12-18 | Seiko Epson Corporation | Contact hole forming method, conducting post forming method, wiring pattern forming method, multilayered wiring substrate producing method, electro-optical device producing method, and electronic apparatus producing method |
| US20090188710A1 (en) * | 2008-01-30 | 2009-07-30 | Cisco Technology, Inc. | System and method for forming filled vias and plated through holes |
| US20120066901A1 (en) * | 2008-12-24 | 2012-03-22 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
| US9021692B2 (en) * | 2008-12-24 | 2015-05-05 | Ibiden Co., Ltd. | Method for manufacturing a printed wiring board |
| US9363891B2 (en) | 2008-12-24 | 2016-06-07 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
| US8410374B2 (en) * | 2009-02-27 | 2013-04-02 | Ibiden Co., Ltd. | Printed wiring board |
| US20100218980A1 (en) * | 2009-02-27 | 2010-09-02 | Ibiden Co., Ltd. | Printed wiring board |
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| US9685394B2 (en) * | 2010-05-21 | 2017-06-20 | Napra Co., Ltd. | Electronic device and manufacturing method therefor |
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| US9484276B2 (en) | 2011-01-31 | 2016-11-01 | Ibiden Co., Ltd. | Semiconductor mounting device and method for manufacturing semiconductor mounting device |
| US20120325531A1 (en) * | 2011-06-27 | 2012-12-27 | Fanuc Corporation | Printed wiring board with improved corrosion resistance and yield |
| US8853561B2 (en) * | 2011-06-27 | 2014-10-07 | Fanuc Corporation | Printed wiring board with improved corrosion resistance and yield |
| US12144121B2 (en) * | 2021-10-08 | 2024-11-12 | Ibiden Co., Ltd. | Wiring substrate and method for manufacturing wiring substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1030544B1 (en) | 2009-12-30 |
| EP2015624B1 (en) | 2011-10-12 |
| EP2015624A2 (en) | 2009-01-14 |
| EP2015624A3 (en) | 2010-03-03 |
| CN100418390C (zh) | 2008-09-10 |
| WO1999020090A1 (fr) | 1999-04-22 |
| DE69842069D1 (de) | 2011-02-03 |
| CN1592554A (zh) | 2005-03-09 |
| EP1286578A3 (en) | 2006-03-22 |
| EP1030544A4 (en) | 2006-03-08 |
| EP1286578B1 (en) | 2010-12-22 |
| EP1030544A1 (en) | 2000-08-23 |
| TW443084B (en) | 2001-06-23 |
| TW520629B (en) | 2003-02-11 |
| DE69841424D1 (de) | 2010-02-11 |
| EP1286578A2 (en) | 2003-02-26 |
| CN1474642A (zh) | 2004-02-11 |
| CN1237852C (zh) | 2006-01-18 |
| CN1272298A (zh) | 2000-11-01 |
| US6376049B1 (en) | 2002-04-23 |
| US6376052B1 (en) | 2002-04-23 |
| CN1181717C (zh) | 2004-12-22 |
| TWI249979B (en) | 2006-02-21 |
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