TWI288972B - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit device Download PDFInfo
- Publication number
- TWI288972B TWI288972B TW092109086A TW92109086A TWI288972B TW I288972 B TWI288972 B TW I288972B TW 092109086 A TW092109086 A TW 092109086A TW 92109086 A TW92109086 A TW 92109086A TW I288972 B TWI288972 B TW I288972B
- Authority
- TW
- Taiwan
- Prior art keywords
- interlayer insulating
- insulating film
- wiring layer
- protective film
- integrated circuit
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H01L2924/01029—Copper [Cu]
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01038—Strontium [Sr]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01079—Gold [Au]
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- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002118522A JP3961335B2 (ja) | 2002-04-19 | 2002-04-19 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200403020A TW200403020A (en) | 2004-03-01 |
TWI288972B true TWI288972B (en) | 2007-10-21 |
Family
ID=29207867
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW092109086A TWI288972B (en) | 2002-04-19 | 2003-04-18 | Semiconductor integrated circuit device |
Country Status (5)
Country | Link |
---|---|
US (1) | US7081681B2 (zh) |
JP (1) | JP3961335B2 (zh) |
KR (1) | KR100539040B1 (zh) |
CN (1) | CN1315188C (zh) |
TW (1) | TWI288972B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005120543A1 (en) | 2004-06-08 | 2005-12-22 | Flamma, S.P.A. | Compositions containing d-carnosine |
JP2006339406A (ja) * | 2005-06-02 | 2006-12-14 | Renesas Technology Corp | 半導体装置 |
US7566647B2 (en) * | 2006-07-12 | 2009-07-28 | United Microelectronics Corp. | Method of disposing and arranging dummy patterns |
JP2009111333A (ja) * | 2007-10-12 | 2009-05-21 | Panasonic Corp | 半導体装置 |
JP5014945B2 (ja) * | 2007-10-17 | 2012-08-29 | シャープ株式会社 | 半導体装置 |
JP2009124099A (ja) * | 2007-10-24 | 2009-06-04 | Panasonic Corp | 半導体チップの電極構造 |
US20100264522A1 (en) * | 2009-04-20 | 2010-10-21 | Chien-Pin Chen | Semiconductor device having at least one bump without overlapping specific pad or directly contacting specific pad |
JP5296116B2 (ja) * | 2011-02-16 | 2013-09-25 | シャープ株式会社 | 半導体装置 |
US8426984B2 (en) * | 2011-09-13 | 2013-04-23 | Chipbond Technology Corporation | Substrate structure with compliant bump and manufacturing method thereof |
US9385100B1 (en) * | 2014-03-21 | 2016-07-05 | STATS ChipPAC Pte. Ltd. | Integrated circuit packaging system with surface treatment and method of manufacture thereof |
KR102454892B1 (ko) | 2015-12-09 | 2022-10-14 | 삼성전자주식회사 | 반도체 칩, 이를 포함하는 반도체 패키지, 및 반도체 칩의 제조 방법 |
US11259406B2 (en) * | 2018-11-21 | 2022-02-22 | Synaptics Incorporated | Flexible connector for a display device |
US11224132B2 (en) | 2019-09-06 | 2022-01-11 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3022565B2 (ja) * | 1988-09-13 | 2000-03-21 | 株式会社日立製作所 | 半導体装置 |
JPH05206298A (ja) * | 1992-01-28 | 1993-08-13 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH06216277A (ja) * | 1993-01-20 | 1994-08-05 | Hitachi Ltd | 半導体装置およびその半導体装置を組み込んだicカード |
JPH08213422A (ja) | 1995-02-07 | 1996-08-20 | Mitsubishi Electric Corp | 半導体装置およびそのボンディングパッド構造 |
JP3463961B2 (ja) | 1995-03-20 | 2003-11-05 | 富士通株式会社 | 半導体装置 |
JP3135039B2 (ja) * | 1995-11-15 | 2001-02-13 | 日本電気株式会社 | 半導体装置 |
JPH10163317A (ja) * | 1996-11-28 | 1998-06-19 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP3159108B2 (ja) | 1997-03-27 | 2001-04-23 | ヤマハ株式会社 | 半導体装置とその製造方法 |
JP3638778B2 (ja) * | 1997-03-31 | 2005-04-13 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
KR100295240B1 (ko) | 1997-04-24 | 2001-11-30 | 마찌다 가쯔히꼬 | 반도체장치 |
CN1146976C (zh) * | 1997-10-30 | 2004-04-21 | 株式会社日产制作所 | 半导体装置及其制造方法 |
JP3403689B2 (ja) * | 1999-06-25 | 2003-05-06 | 沖電気工業株式会社 | 半導体装置 |
US6459156B1 (en) * | 1999-12-22 | 2002-10-01 | Motorola, Inc. | Semiconductor device, a process for a semiconductor device, and a process for making a masking database |
-
2002
- 2002-04-19 JP JP2002118522A patent/JP3961335B2/ja not_active Expired - Lifetime
-
2003
- 2003-04-18 KR KR10-2003-0024589A patent/KR100539040B1/ko not_active IP Right Cessation
- 2003-04-18 US US10/418,151 patent/US7081681B2/en not_active Expired - Lifetime
- 2003-04-18 CN CNB031225330A patent/CN1315188C/zh not_active Expired - Lifetime
- 2003-04-18 TW TW092109086A patent/TWI288972B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20030197272A1 (en) | 2003-10-23 |
CN1315188C (zh) | 2007-05-09 |
KR100539040B1 (ko) | 2005-12-27 |
CN1452243A (zh) | 2003-10-29 |
US7081681B2 (en) | 2006-07-25 |
TW200403020A (en) | 2004-03-01 |
JP2003318177A (ja) | 2003-11-07 |
JP3961335B2 (ja) | 2007-08-22 |
KR20030083596A (ko) | 2003-10-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |