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TW202018314A - Inspection instruction information generation device, substrate inspection system, inspection instruction information generation method, and inspection instruction information generation program - Google Patents

Inspection instruction information generation device, substrate inspection system, inspection instruction information generation method, and inspection instruction information generation program Download PDF

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TW202018314A
TW202018314A TW108132747A TW108132747A TW202018314A TW 202018314 A TW202018314 A TW 202018314A TW 108132747 A TW108132747 A TW 108132747A TW 108132747 A TW108132747 A TW 108132747A TW 202018314 A TW202018314 A TW 202018314A
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conductive
instruction information
inspection
wiring
inspection instruction
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TWI846729B (en
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椹木雅也
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日商日本電產理德股份有限公司
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits

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  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
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Abstract

本發明根據表示基板的面狀導體IP、導電部P、配線W、及通孔V如何導通連接的導電結構資訊D1,所述基板包括:導體層Lc、設置有多個導電部P的基板面F、配線層L、以及通孔V,當存在多個經由配線層L的配線W而相互導通的導電部P彼此的群組時,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對導電部P作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊D2來產生。The present invention is based on the conductive structure information D1 showing how the planar conductor IP, the conductive portion P, the wiring W, and the via V of the substrate are conductively connected. The substrate includes a conductor layer Lc and a substrate surface provided with a plurality of conductive portions P F, the wiring layer L, and the through-hole V, when there are a plurality of groups of conductive portions P mutually conducting via the wiring W of the wiring layer L, the following inspection instruction information generation process is performed: from each group Each pair of conductive portions P is selected as the first selected conductive portion, and information indicating the selected pairs of first selected conductive portions is generated as inspection instruction information D2.

Description

檢查指示資訊產生裝置、基板檢查系統、檢查指示資訊產生方法以及檢查指示資訊產生程式Inspection instruction information generation device, substrate inspection system, inspection instruction information generation method, and inspection instruction information generation program

本發明是有關於一種產生用於指示檢查基板時的檢查部位的檢查指示資訊的檢查指示資訊產生裝置、使用該檢查指示資訊進行檢查的基板檢查系統、檢查指示資訊產生方法以及檢查指示資訊產生程式。The present invention relates to an inspection instruction information generating device for generating inspection instruction information for instructing an inspection site when inspecting a substrate, a substrate inspection system for inspecting using the inspection instruction information, an inspection instruction information generation method, and an inspection instruction information generation program .

自先前以來,已知有如下的基板檢查裝置:當將如設置於電路基板的通孔(via)般,自電路基板的一側的面橫跨至另一側的面進行貫穿者作為測定對象時,使測定電流流入該測定對象,並測定該測定對象中所產生的電壓,藉此根據所述電流值與電壓值來測定該測定對象的電阻值(例如,參照專利文獻1)。 [現有技術文獻] [專利文獻]Conventionally, there has been known a substrate inspection device in which a measurement object is to be penetrated from a surface of one side of a circuit substrate to a surface of another side like a via provided in a circuit substrate In this case, a measurement current is flowed into the measurement object, and the voltage generated in the measurement object is measured, thereby measuring the resistance value of the measurement object based on the current value and the voltage value (for example, refer to Patent Document 1). [Prior Art Literature] [Patent Literature]

[專利文獻1]日本專利特開2012-117991號公報[Patent Document 1] Japanese Patent Laid-Open No. 2012-117991

[發明所欲解決之課題][Problems to be solved by the invention]

此外,於在內部包括擴展成面狀的導體(以下,稱為面狀導體)的基板中,存在基板表面的焊墊、凸塊、配線等導電部與面狀導體於基板的厚度方向上電性連接的結構的基板。In addition, in a substrate including a conductor that expands into a plane (hereinafter, referred to as a plane conductor), conductive parts such as pads, bumps, and wiring on the surface of the substrate and the plane conductor are electrically charged in the thickness direction of the substrate The structure of the substrate is connected.

圖22是表示作為於基板內層包括作為擴展成面狀的導體圖案的面狀導體IP的基板的一例的多層基板WB的概念性示意圖。圖22中所示的多層基板WB於其基板面BS設置有焊墊或配線圖案等導電部PA、導電部PB。導電部PA、導電部PB藉由通孔RA、通孔RB而與面狀導體IP電性連接。於多層基板WB的例子中,面狀導體IP相當於面狀導體。FIG. 22 is a conceptual schematic diagram showing a multilayer substrate WB as an example of a substrate including a planar conductor IP as a conductor pattern expanded into a planar inner layer. The multilayer substrate WB shown in FIG. 22 is provided with conductive portions PA and conductive portions PB such as pads or wiring patterns on its substrate surface BS. The conductive portion PA and the conductive portion PB are electrically connected to the planar conductor IP through the through hole RA and the through hole RB. In the example of the multilayer substrate WB, the planar conductor IP corresponds to the planar conductor.

另外,作為基板的製造方法,有如下的方法:將導電性的金屬板作為基底,於該金屬板的兩面積層形成印刷配線基板,並將已形成的基板自基底的金屬板剝離,藉此形成兩塊印刷配線基板。於此種基板的製造方法中,自基底的金屬板剝離基板之前的狀態的基板(以下,稱為中間基板)具有金屬板被兩塊基板包夾的形態。此種中間基板亦被稱為承載基板。In addition, as a method of manufacturing a substrate, there is a method of forming a printed wiring board on both area layers of the metal plate using a conductive metal plate as a base, and peeling the formed substrate from the base metal plate to form Two printed circuit boards. In this method of manufacturing a substrate, the substrate (hereinafter referred to as an intermediate substrate) in a state before the substrate is peeled off from the underlying metal plate has a form in which the metal plate is sandwiched between two substrates. Such an intermediate substrate is also called a carrier substrate.

圖23是表示此種中間基板MB的一例的概念性示意圖。圖23中所示的中間基板MB於金屬板MP的一側的面設置有基板WB1,於金屬板MP的另一側的面設置有基板WB2。於基板WB1的基板面BS1設置有焊墊或配線圖案等導電部PA1、導電部PB1、…、導電部PF1。於基板WB1的與金屬板MP的接觸面BS2設置有焊墊或配線圖案等導電部PA2、導電部PB2、…、導電部PF2。金屬板MP例如是厚度為1 mm~10 mm左右的具有導電性的金屬板。FIG. 23 is a conceptual schematic diagram showing an example of such an intermediate substrate MB. The intermediate substrate MB shown in FIG. 23 is provided with the substrate WB1 on one side of the metal plate MP, and the substrate WB2 is provided on the other side of the metal plate MP. On the substrate surface BS1 of the substrate WB1, conductive portions PA1, conductive portions PB1, ..., and conductive portions PF1 such as pads or wiring patterns are provided. On the contact surface BS2 of the substrate WB1 with the metal plate MP, a conductive portion PA2 such as a pad or a wiring pattern, a conductive portion PB2,..., A conductive portion PF2 are provided. The metal plate MP is, for example, a conductive metal plate having a thickness of about 1 mm to 10 mm.

導電部PA1~導電部PF1藉由通孔RA~通孔RF而與導電部PA2~導電部PF2電性連接。導電部PA2~導電部PF2與金屬板MP密接、導通,因此導電部PA1~導電部PF1藉由通孔RA~通孔RF而與金屬板MP電性連接。導電部PA1與通孔RA成對,導電部PB1與通孔RB成對,導電部與通孔分別成對。基板WB2與基板WB1同樣地構成,因此省略其說明。於中間基板MB的例子中,金屬板MP相當於面狀導體。The conductive portions PA1 to PF1 are electrically connected to the conductive portions PA2 to PF2 through the through holes RA to RF. Since the conductive parts PA2 to PF2 are in close contact with the metal plate MP, the conductive parts PA1 to PF1 are electrically connected to the metal plate MP through the through holes RA to RF. The conductive portion PA1 is paired with the through hole RA, the conductive portion PB1 is paired with the through hole RB, and the conductive portion is paired with the through hole, respectively. The substrate WB2 is configured in the same manner as the substrate WB1, so its description is omitted. In the example of the intermediate substrate MB, the metal plate MP corresponds to a planar conductor.

作為多層基板WB或中間基板MB等的檢查,存在測定通孔RA、通孔RB的電阻值Ra、電阻值Rb的情況。As an inspection of the multilayer substrate WB, the intermediate substrate MB, and the like, the resistance values Ra and Rb of the through holes RA and RB may be measured.

圖24中,利用R1~R4表示面狀導體IP的等效電阻的電阻。為了測定通孔RA、通孔RB的電阻值Ra、電阻值Rb,可考慮使測定用的電流I流入導電部PA1與導電部PB1之間,並測定導電部PA1與導電部PB1之間所產生的電壓V,將電阻值作為V/I來算出。藉此,藉由V/I,可獲得自導電部PA1至導電部PB1的電流路徑上的兩個部位的通孔RA、通孔RB的電阻值Ra、電阻值Rb與面狀導體IP的電阻R1的電阻值R1 的合計。In FIG. 24, R1 to R4 represent the resistance of the equivalent resistance of the planar conductor IP. In order to measure the resistance value Ra and the resistance value Rb of the through hole RA and the through hole RB, it may be considered to cause the measurement current I to flow between the conductive portion PA1 and the conductive portion PB1, and to measure the generation between the conductive portion PA1 and the conductive portion PB1 The voltage V is calculated using the resistance value as V/I. Thereby, through V/I, the resistance values Ra, Rb and resistance of the planar conductor IP of the through-hole RA and the through-hole RB at two locations on the current path from the conductive portion PA1 to the conductive portion PB1 can be obtained The sum of the resistance value R 1 of R1.

此處,於圖24中,因紙面的關係而將導電部PA1~導電部PE1排列於一直線上來記載。但是,於實際的基板中,導電部PA1~導電部PE1二維地分散配置於基板面。因此,若為了測定電阻而選擇一對導電部PA1、PC1並流入電流I1 ,選擇另一對導電部PB1、PD1並流入電流I2 ,則存在於電流I1 、電流I2 的電流路徑中產生重覆的情況。Here, in FIG. 24, the conductive portions PA1 to PE1 are arranged on a straight line due to the relationship of the paper surface. However, in an actual substrate, the conductive portion PA1 to the conductive portion PE1 are two-dimensionally distributed on the substrate surface. Therefore, if a pair of conductive portions PA1 and PC1 are selected to flow into the current I 1 and another pair of conductive portions PB1 and PD1 are selected to flow into the current I 2 for resistance measurement, they exist in the current path of the current I 1 and the current I 2 . Repeated situation.

於圖24中所示的例子中,於電阻R2中產生電流的重覆。於此情況下,導電部PA1、導電部PC1間的電壓V=I1 (Ra+R1 +R2 +Rc)+I2 R2 。若設為I1 =I2 ,則V/I1 =(Ra+R1 +R2 +Rc)+R2 ,因此獲得欲測定的電阻值(Ra+R1 +R2 +Rc)與電阻值R2 相加所得的電阻值,其結果,電阻測定精度下降。In the example shown in FIG. 24, a repetition of current occurs in the resistor R2. In this case, the voltage V between the conductive portion PA1 and the conductive portion PC1 = I 1 (Ra + R 1 + R 2 + Rc) + I 2 R 2 . If I 1 = I 2 , V/I 1 = (Ra + R 1 + R 2 + Rc) + R 2 , so the resistance value (Ra + R 1 + R 2 + Rc) to be measured is added to the resistance value R 2 As a result, the accuracy of resistance measurement decreases.

因此,為了不產生測定用電流的重覆,必須於一對導電部間,一個部位一個部位地依次執行檢查,而存在基板整體的檢查時間增大這一不良情況。Therefore, in order not to repeat the measurement current, it is necessary to sequentially perform inspections one by one between the pair of conductive portions, and there is a problem that the inspection time of the entire substrate increases.

本發明的目的在於提供一種產生表示容易縮短基板的檢查時間的檢查部位的檢查指示資訊的檢查指示資訊產生裝置、包含該檢查指示資訊產生裝置的基板檢查系統、檢查指示資訊產生方法以及檢查指示資訊產生程式。An object of the present invention is to provide an inspection instruction information generating device that generates inspection instruction information indicating an inspection site that is easy to shorten the inspection time of a substrate, a substrate inspection system including the inspection instruction information generating device, an inspection instruction information generation method, and inspection instruction information Generate programs.

本發明的一例的檢查指示資訊產生裝置包括:儲存部,儲存表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔;以及檢查指示資訊產生部,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,根據所述導電結構資訊,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來記錄。An inspection instruction information generating device according to an example of the present invention includes a storage section that stores conductive structure information indicating how a planar conductor, a conductive section, a wiring, and a via of a substrate are electrically connected. The substrate includes: The conductive layer of the layer of the conductive planar conductor, the substrate surface provided with the plurality of conductive portions, the wiring layer as a layer laminated between the conductor layer and the substrate surface, A through hole connecting the wiring of the wiring layer to the plurality of conductive portions, and a through hole connecting the wiring of the wiring layer to the planar conductor of the conductor layer; and the inspection instruction information generating portion, when there are a plurality of When the groups of the conductive parts that are connected to each other through the wiring of the wiring layer, based on the conductive structure information, perform the following inspection instruction information generation process: select a pair of the conductive parts from each group The part serves as a first selection conductive part, and records information indicating the selected pairs of first selection conductive parts as inspection instruction information.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, inspect the through holes and wiring of the current path between the first selected conductive portions of each pair.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線;以及(c2)與所述第一電流供給處理不同時地執行使電流流入由所述檢查指示資訊表示的成對的第二選擇導電部間的第二電流供給處理,並檢測所述成對的第二選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述成對的第二選擇導電部間的電流路徑的通孔與配線。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, checking the through-holes and wiring of the current path between the first selection conductive portions of each pair; and (c2) performing the execution differently from the first current supply process Current flows into the second current supply process between the pair of second selection conductive parts indicated by the inspection instruction information, and detects the voltage between the pair of second selection conductive parts, based on the current and the voltage To inspect the through holes and wiring of the current path between the paired second selection conductive portions.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部按照由所述檢查指示資訊表示的順序,針對所述各配線層執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,於所述(c1)工序的檢查的結果為不良的情況下,不執行對於所述順序為下一個以後的配線層的所述(c1)工序。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, and the inspection processing unit according to the inspection instruction information In sequence, the following steps are performed for each wiring layer: (c1) For a plurality of pairs of first selection conductive portions indicated by the inspection instruction information, a first flow of current between the paired first selection conductive portions is performed at the same time Current supply processing, and detecting the voltage between the pair of first selection conductive parts, and checking the through holes and wiring of the current path between the pair of first selection conductive parts based on the current and the voltage, When the result of the inspection of the (c1) step is defective, the (c1) step for the wiring layer whose sequence is next to the following is not executed.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,且於所述(c1)工序中,同時執行對於藉由所述檢查指示資訊而與所述導體層的一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理、及對於與所述導體層的另一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, check the through holes and wiring of the current path between the first selected conductive portions of each pair, and in the step (c1), simultaneously execute The instruction information is checked to determine the first current supply process of the plurality of pairs of first selection conductive portions corresponding to one side of the conductor layer, and to the corresponding position of the other side of the conductor layer The first current supply process of the plurality of pairs of first selection conductive parts.

另外,本發明的一例的檢查指示資訊產生方法包括檢查指示資訊產生工序,所述檢查指示資訊產生工序根據表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的所述配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來產生。In addition, the inspection instruction information generation method of an example of the present invention includes an inspection instruction information generation process based on conductive structure information indicating how the planar conductors, conductive portions, wirings, and vias of the substrate are electrically connected, The substrate includes a conductor layer as a layer provided with the planar conductor expanded into a planar conductivity, a substrate surface provided with a plurality of the conductive portions, and a layer laminated on the conductor layer and the substrate The wiring layer of the layer between the surfaces, the through-hole connecting the wiring of the wiring layer to the plurality of conductive portions, and the through-hole connecting the wiring of the wiring layer to the planar conductor of the conductor layer Hole, when there are a plurality of groups of the conductive parts that are connected to each other via the wiring of the wiring layer, the following inspection instruction information generation process is performed: a pair of the conductive parts is selected from each group As the first selection conductive part, information representing the selected pairs of first selection conductive parts is generated as the inspection instruction information.

以下,根據圖式對本發明的實施方式進行說明。再者,於各圖中賦予了相同的符號的構成表示相同的構成,並省略其說明。圖1中所示的基板檢查系統1包括檢查指示資訊產生裝置3與基板檢查裝置2。Hereinafter, embodiments of the present invention will be described based on the drawings. In addition, the configuration given the same symbol in each figure shows the same configuration, and the description thereof is omitted. The substrate inspection system 1 shown in FIG. 1 includes an inspection instruction information generating device 3 and a substrate inspection device 2.

圖1中所示的檢查指示資訊產生裝置3包括檢查指示資訊產生部31與儲存部32。檢查指示資訊產生裝置3例如使用個人電腦等電腦來構成,包括:執行規定的運算處理的中央處理單元(Central Processing Unit,CPU)、暫時地儲存資料的隨機存取記憶體(Random Access Memory,RAM)、硬磁碟驅動機(Hard Disk Drive,HDD)及/或快閃記憶體等非揮發性的儲存裝置、通信電路、以及該些的周邊電路等。The inspection instruction information generating device 3 shown in FIG. 1 includes an inspection instruction information generating section 31 and a storage section 32. The inspection instruction information generating device 3 is constituted by using a computer such as a personal computer, for example, including: a central processing unit (CPU) that performs prescribed arithmetic processing, and a random access memory (RAM) that temporarily stores data ), non-volatile storage devices such as Hard Disk Drive (HDD) and/or flash memory, communication circuits, and peripheral circuits of these.

而且,檢查指示資訊產生裝置3藉由執行例如已被儲存於非揮發性的儲存裝置的本發明一實施方式的檢查指示資訊產生程式,而作為檢查指示資訊產生部31發揮功能。儲存部32例如使用所述非揮發性的儲存裝置來構成。Furthermore, the inspection instruction information generating device 3 functions as the inspection instruction information generating section 31 by executing, for example, an inspection instruction information generating program of an embodiment of the present invention that has been stored in a non-volatile storage device. The storage unit 32 is configured using, for example, the non-volatile storage device.

於儲存部32儲存導電結構資訊D1。可自外部經由例如省略圖示的通信電路而朝檢查指示資訊產生裝置3發送導電結構資訊D1,藉此將該經發送的導電結構資訊D1儲存於儲存部32,亦可藉由檢查指示資訊產生裝置3讀取已被儲存於例如通用串列匯流排(Universal Serial Bus,USB)記憶體等儲存媒體的導電結構資訊D1,而將導電結構資訊D1儲存於儲存部32,可利用各種方法將導電結構資訊D1儲存於儲存部32。The storage structure 32 stores the conductive structure information D1. The conductive structure information D1 can be sent to the inspection instruction information generating device 3 from the outside through, for example, a communication circuit that is not shown, thereby storing the transmitted conductive structure information D1 in the storage section 32, or can be generated by the inspection instruction information The device 3 reads the conductive structure information D1 that has been stored in a storage medium such as a Universal Serial Bus (USB) memory, etc., and stores the conductive structure information D1 in the storage portion 32, and various methods can be used to conduct The structure information D1 is stored in the storage unit 32.

導電結構資訊D1是表示後述的基板B的面狀導體IP、導電部P、各配線層L的配線W、以及通孔V如何導通連接的資訊。作為導電結構資訊D1,例如可使用基板的製造中所使用的所謂的格伯資料(gerber data)、及/或網路連線表(netlist)等。The conductive structure information D1 is information indicating how the planar conductor IP of the substrate B, the conductive portion P, the wiring W of each wiring layer L, and the via hole V described later are electrically connected. As the conductive structure information D1, for example, so-called gerber data (net data) and/or a netlist (netlist) used in the manufacture of a substrate can be used.

檢查指示資訊產生部31根據導電結構資訊D1,針對基板檢查裝置2產生檢查指示資訊D2,所述檢查指示資訊D2用於指示為了檢查而應流入電流的導電部P的對。檢查指示資訊產生部31亦可經由例如省略圖示的通信電路而朝基板檢查裝置2發送檢查指示資訊D2。或者,檢查指示資訊產生部31亦可將檢查指示資訊D2寫入儲存媒體。而且,使用者亦可使基板檢查裝置2自所述儲存媒體讀入檢查指示資訊D2。檢查指示資訊產生部31的運作的詳細情況將後述。The inspection instruction information generating section 31 generates inspection instruction information D2 for the substrate inspection apparatus 2 based on the conductive structure information D1, and the inspection instruction information D2 is used to indicate the pair of the conductive portion P that should flow current for inspection. The inspection instruction information generating unit 31 may also transmit the inspection instruction information D2 to the substrate inspection apparatus 2 via, for example, a communication circuit not shown. Alternatively, the inspection instruction information generating unit 31 may write the inspection instruction information D2 into the storage medium. Moreover, the user can also cause the substrate inspection device 2 to read the inspection instruction information D2 from the storage medium. The details of the operation of the inspection instruction information generating unit 31 will be described later.

圖1中所示的基板檢查裝置2是用於檢查作為檢查對象的被檢查基板的基板B的裝置。The substrate inspection apparatus 2 shown in FIG. 1 is an apparatus for inspecting the substrate B of the inspection target substrate.

基板B例如為中間基板或多層基板,亦可為印刷配線基板、膜形載體(film carrier)、可撓性基板、陶瓷多層配線基板、半導體晶片及半導體晶圓等半導體基板、半導體封裝用的封裝基板、液晶顯示器或電漿顯示器用的電極板、及製造該些基板的過程的中間基板、或所謂的承載基板。圖22中所示的多層基板WB、及圖23中所示的中間基板MB相當於作為被檢查基板的基板B的一例。The substrate B is, for example, an intermediate substrate or a multilayer substrate, and may also be a printed wiring substrate, a film carrier, a flexible substrate, a ceramic multilayer wiring substrate, a semiconductor substrate such as a semiconductor wafer and a semiconductor wafer, and a package for semiconductor packaging Substrates, electrode plates for liquid crystal displays or plasma displays, and intermediate substrates in the process of manufacturing these substrates, or so-called carrier substrates. The multilayer substrate WB shown in FIG. 22 and the intermediate substrate MB shown in FIG. 23 correspond to an example of the substrate B as the substrate to be inspected.

圖1中所示的基板檢查裝置2具有框體112。於框體112的內部空間,主要設置有基板固定裝置110、測定部121、測定部122、移動機構125、以及控制部20。基板固定裝置110以將基板B固定於規定的位置的方式構成。The substrate inspection apparatus 2 shown in FIG. 1 has a frame 112. In the internal space of the frame body 112, a substrate fixing device 110, a measurement unit 121, a measurement unit 122, a moving mechanism 125, and a control unit 20 are mainly provided. The substrate fixing device 110 is configured to fix the substrate B at a predetermined position.

測定部121位於固定於基板固定裝置110的基板B的上方。測定部122位於固定於基板固定裝置110的基板B的下方。測定部121、測定部122包括用於使探針接觸設置於基板B的多個導電部的測定治具4U、測定治具4L。The measurement unit 121 is located above the substrate B fixed to the substrate fixing device 110. The measurement unit 122 is located below the substrate B fixed to the substrate fixing device 110. The measurement unit 121 and the measurement unit 122 include a measurement jig 4U and a measurement jig 4L for contacting a probe with a plurality of conductive parts provided on the substrate B.

於測定治具4U、測定治具4L安裝有多個探針Pr。測定治具4U、測定治具4L以與設置於基板B的表面的測定對象的導電部的配置對應的方式配置、保持多個探針Pr。移動機構125對應於來自控制部20的控制訊號來使測定部121、測定部122於框體112內適宜移動,而使測定治具4U、測定治具4L的探針Pr接觸基板B的各導電部。A plurality of probes Pr are attached to the measuring jig 4U and the measuring jig 4L. The measuring jig 4U and the measuring jig 4L are arranged and held so as to correspond to the arrangement of the conductive portion of the measurement object provided on the surface of the substrate B. The moving mechanism 125 appropriately moves the measuring unit 121 and the measuring unit 122 within the housing 112 in response to the control signal from the control unit 20, and causes the probe Pr of the measuring jig 4U and the measuring jig 4L to contact the respective conductors of the substrate B unit.

再者,基板檢查裝置2亦可僅包括測定部121、測定部122中的任一者,基板B亦可僅於一面設置有導電部。另外,基板檢查裝置2亦可使被檢查基板進行表背反轉,而藉由任一個測定部來進行其兩面的測定。In addition, the substrate inspection apparatus 2 may include only one of the measurement unit 121 and the measurement unit 122, and the substrate B may be provided with a conductive portion on only one surface. In addition, the substrate inspection apparatus 2 may reverse the front and back of the substrate to be inspected, and the measurement on both sides thereof may be performed by any one measurement section.

控制部20例如包括如下構件來構成:執行規定的運算處理的CPU(Central Processing Unit)、暫時地儲存資料的RAM(Random Access Memory)、儲存規定的控制程式的唯讀記憶體(Read Only Memory,ROM)、HDD(Hard Disk Drive)等非揮發性的儲存部22,以及該些的周邊電路等。而且,控制部20藉由執行例如已被儲存於儲存部22的控制程式,而作為檢查處理部21發揮功能。The control unit 20 includes, for example, the following components: a CPU (Central Processing Unit) that performs predetermined arithmetic processing, a RAM (Random Access Memory) that temporarily stores data, and a read-only memory (Read Only Memory, which stores a predetermined control program) ROM), HDD (Hard Disk Drive) and other non-volatile storage units 22, and these peripheral circuits. Furthermore, the control unit 20 functions as the inspection processing unit 21 by executing, for example, a control program that has been stored in the storage unit 22.

圖2中所示的測定部121包括:掃描器部13、多個測定塊12、以及多個探針Pr。再者,測定部122與測定部121同樣地構成,因此省略其說明。The measurement unit 121 shown in FIG. 2 includes a scanner unit 13, a plurality of measurement blocks 12, and a plurality of probes Pr. In addition, the measurement unit 122 has the same configuration as the measurement unit 121, and therefore its description is omitted.

測定塊12包括電源部CS、電源部CM及電壓檢測部VM。電源部CS、電源部CM是輸出對應於來自控制部20的控制訊號的電流I的定電流電路。電源部CS使電流I於朝掃描器部13供給的方向上流動,電源部CM使電流I於自掃描器部13引入的方向上流動。電壓檢測部VM是測定電壓,並朝控制部20中發送所述電壓值的電壓檢測電路。The measurement block 12 includes a power supply section CS, a power supply section CM, and a voltage detection section VM. The power supply unit CS and the power supply unit CM are constant current circuits that output a current I corresponding to the control signal from the control unit 20. The power supply unit CS causes the current I to flow in the direction supplied to the scanner unit 13, and the power supply unit CM causes the current I to flow in the direction introduced from the scanner unit 13. The voltage detection unit VM is a voltage detection circuit that measures the voltage and transmits the voltage value to the control unit 20.

掃描器部13例如為使用電晶體或繼電器開關等開關元件來構成的切換電路。掃描器部13對應於多個測定塊12,包括多個用於對基板B供給電阻測定用的電流I的電流端子+F、電流端子-F,及用於檢測藉由電流I而於基板B的導電部間產生的電壓的電壓檢測端子+S、電壓檢測端子-S。另外,於掃描器部13電性連接有多個探針Pr。掃描器部13對應於來自控制部20的控制訊號,切換電流端子+F、電流端子-F及電壓檢測端子+S、電壓檢測端子-S與多個探針Pr之間的連接關係。The scanner unit 13 is, for example, a switching circuit configured using switching elements such as transistors or relay switches. The scanner unit 13 corresponds to a plurality of measurement blocks 12 and includes a plurality of current terminals +F and current terminals -F for supplying the current I for resistance measurement to the substrate B, and for detecting that the current I is applied to the substrate B The voltage detection terminal +S and the voltage detection terminal -S of the voltage generated between the conductive parts of. In addition, a plurality of probes Pr are electrically connected to the scanner unit 13. The scanner unit 13 switches the connection relationship between the current terminal +F, the current terminal -F, the voltage detection terminal +S, and the voltage detection terminal -S and the plurality of probes Pr in response to the control signal from the control unit 20.

電源部CS的輸出端子的一端與電路接地(circuit ground)連接,另一端與電流端子+F連接。電源部CM的輸出端子的一端與電路接地連接,另一端與電流端子-F連接。電壓檢測部VM的一端與電壓檢測端子+S連接,另一端與電壓檢測端子-S連接。One end of the output terminal of the power supply CS is connected to circuit ground, and the other end is connected to the current terminal +F. One end of the output terminal of the power supply unit CM is connected to the circuit ground, and the other end is connected to the current terminal -F. One end of the voltage detection part VM is connected to the voltage detection terminal +S, and the other end is connected to the voltage detection terminal -S.

而且,掃描器部13可對應於來自控制部20的控制訊號,將電流端子+F、電流端子-F及電壓檢測端子+S、電壓檢測端子-S與任意的探針Pr導通連接。藉此,掃描器部13可對應於來自控制部20的控制訊號,使電流I流入探針Pr所接觸的任意的導電部間,並利用電壓檢測部VM來測定於所述導電部間產生的電壓V。In addition, the scanner unit 13 can electrically connect the current terminal +F, the current terminal -F, the voltage detection terminal +S, and the voltage detection terminal -S to any probe Pr in response to the control signal from the control unit 20. In this way, the scanner unit 13 can make the current I flow between any conductive parts contacted by the probe Pr in response to the control signal from the control unit 20, and use the voltage detection unit VM to measure the generated between the conductive parts Voltage V.

由於設置有多個測定塊12,因此可對多個導電部間同時執行電流供給與電壓測定。Since a plurality of measurement blocks 12 are provided, current supply and voltage measurement can be simultaneously performed between a plurality of conductive parts.

再者,電源部CS、電源部CM只要可使電流I經由掃描器部13而流入基板B即可,並不限定於電源部CS、電源部CM的一端與電路接地連接的例子。例如,亦可為將電源部CS的一端與電源部CM的一端連接來形成電流迴路(current loop)的構成。In addition, the power supply unit CS and the power supply unit CM only need to allow the current I to flow into the substrate B via the scanner unit 13, and it is not limited to an example in which one end of the power supply unit CS and the power supply unit CM is connected to circuit ground. For example, the current loop may be formed by connecting one end of the power supply CS and one end of the power supply CM.

藉此,控制部20可藉由朝掃描器部13輸出控制訊號,而利用多個電源部CS、電源部CM來使電流I流入任意的多對探針Pr間,並利用多個電壓檢測部VM來檢測任意的多對探針Pr間的電壓。In this way, the control unit 20 can output the control signal to the scanner unit 13 and use the plurality of power supply units CS and CM to make the current I flow between arbitrary pairs of probes Pr and use the plurality of voltage detection units VM to detect the voltage between any pair of probes Pr.

圖3兼作圖示基板B的導電結構資訊D1的說明圖。導電結構資訊D1未必是由圖像表示的資料,但於以下的說明中,為了容易理解,利用圖式來表示並說明由導電結構資訊D1表示的結構。FIG. 3 also serves as an explanatory diagram illustrating the conductive structure information D1 of the substrate B. The conductive structure information D1 is not necessarily data represented by an image, but in the following description, for ease of understanding, the structure represented by the conductive structure information D1 is represented and explained using a diagram.

圖3中所示的基板B是將五塊基板B1~B5積層而成的多層基板。將基板B的一側的表面設為基板面F1,將另一側的表面設為基板面F2。將基板B1、基板B2的邊界設為配線層L1,將基板B2、基板B3的邊界設為配線層L2,將基板B3、基板B4的邊界設為導體層Lc,將基板B4、基板5的邊界設為配線層L4。The substrate B shown in FIG. 3 is a multilayer substrate formed by stacking five substrates B1 to B5. Let one surface of the substrate B be the substrate surface F1 and the other surface be the substrate surface F2. The boundary between the substrate B1 and the substrate B2 is the wiring layer L1, the boundary between the substrate B2 and the substrate B3 is the wiring layer L2, the boundary between the substrate B3 and the substrate B4 is the conductor layer Lc, and the boundary between the substrate B4 and the substrate 5 Let the wiring layer L4.

於基板面F1設置有導電部P1~導電部P7,於基板面F2設置有導電部P11~導電部P17。導電部P1~導電部P7、導電部P11~導電部P17成為焊墊、凸塊、配線、電極等被探針Pr抵接的檢查點。Conductive portions P1 to P7 are provided on the substrate surface F1, and conductive portions P11 to P17 are provided on the substrate surface F2. The conductive portion P1 to the conductive portion P7 and the conductive portion P11 to the conductive portion P17 serve as inspection points where pads, bumps, wiring, electrodes, and the like are contacted by the probe Pr.

於導體層Lc設置有作為擴展成面狀或網狀的導體的面狀導體IP。於配線層L1設置有配線W11、配線W12,於配線層L2設置有配線W21、配線W22,於配線層L4設置有配線W41、配線W42、配線W43與配線W44、配線W45。面狀導體IP可為擴展成一塊片材狀,即面狀的形狀,亦可為具有如下的形狀的導體:將配線等導體圖案組合成規則或無規則的網狀(網眼狀),於同一層內作為整體而擴展成面狀。The conductor layer Lc is provided with a planar conductor IP that is a conductor expanded into a planar or mesh shape. The wiring layer L1 is provided with wiring W11 and wiring W12, the wiring layer L2 is provided with wiring W21 and wiring W22, and the wiring layer L4 is provided with wiring W41, wiring W42, wiring W43 and wiring W44, and wiring W45. The planar conductor IP can be expanded into a sheet shape, that is, a planar shape, or a conductor having the following shape: combining conductor patterns such as wiring into a regular or irregular mesh shape (mesh shape), in The same layer as a whole expands into a plane.

再者,於圖3中,表示了面狀導體IP擴展至基板B的大致整個區域的例子,但面狀導體IP未必限定於擴展至基板B的大致整個區域的例子。面狀導體IP亦可僅設置於基板B的一部分的區域。例如,於導體層Lc的基板B的未設置面狀導體IP的區域,亦可設置配線W。In addition, FIG. 3 shows an example in which the planar conductor IP extends to substantially the entire area of the substrate B, but the planar conductor IP is not necessarily limited to an example extending to substantially the entire area of the substrate B. The planar conductor IP may be provided only in a part of the substrate B. For example, the wiring W may be provided in a region of the substrate B of the conductor layer Lc where the planar conductor IP is not provided.

圖4中所示的基板B包括相互電性分離的面狀導體IPa與面狀導體IPd。面狀導體IPa例如可用作類比接地(analog ground),面狀導體IPd例如可用作數位接地(digital ground)。如圖4所示,基板B亦可包括相互絕緣的多個面狀導體IP。The substrate B shown in FIG. 4 includes a planar conductor IPa and a planar conductor IPd that are electrically separated from each other. The planar conductor IPa can be used as an analog ground, for example, and the planar conductor IPd can be used as a digital ground, for example. As shown in FIG. 4, the substrate B may also include a plurality of planar conductors IP insulated from each other.

配線W41、配線W42、配線W43是配線層L4的配線W41、配線W42、及配線W43相連而成的一根配線,但為了便於說明,將一根配線W41、W42、W43的各部分稱為配線W41、配線W42、及配線W43。同樣地,配線W44、配線W45是配線W44與配線W45相連而成的一根配線,配線W44及配線W45分別為一根配線W44、W45的一部分。The wiring W41, the wiring W42, and the wiring W43 are one wiring in which the wiring W41, the wiring W42, and the wiring W43 of the wiring layer L4 are connected, but for convenience of description, each part of the one wiring W41, W42, W43 is called wiring W41, wiring W42, and wiring W43. Similarly, the wiring W44 and the wiring W45 are one wiring formed by connecting the wiring W44 and the wiring W45, and the wiring W44 and the wiring W45 are a part of the one wiring W44 and W45, respectively.

另外,於基板B設置有貫穿基板B1的通孔V11~通孔V17,設置有貫穿基板B2的通孔V21~通孔V27,設置有貫穿基板B3的通孔V31~通孔V36,設置有貫穿基板B4的通孔V41~通孔V45,設置有貫穿基板B5的通孔V51~通孔V57。In addition, the substrate B is provided with a through hole V11 to a through hole V17 penetrating the substrate B1, a through hole V21 to a through hole V27 penetrating the substrate B2, a through hole V31 to a through hole V36 penetrating the substrate B3, and a through hole The through-holes V41 to V45 of the substrate B4 are provided with the through-holes V51 to V57 penetrating the substrate B5.

於已被儲存於儲存部22的導電結構資訊,包含表示該些導電部P1~導電部P7、導電部P11~導電部P17,配線W11、配線W12、配線W21、配線W22、配線W41~配線W45,通孔V11~通孔V17、通孔V21~通孔V27、通孔V31~通孔V36、通孔V41~通孔V45、通孔V51~通孔V57,以及面狀導體IP如何導通連接的資訊,例如表示圖3中所圖示的連接關係的資訊。The conductive structure information stored in the storage section 22 includes information indicating the conductive sections P1 to P7, the conductive section P11 to the conductive section P17, the wiring W11, the wiring W12, the wiring W21, the wiring W22, the wiring W41 to the wiring W45 , Through-hole V11 to through-hole V17, through-hole V21 to through-hole V27, through-hole V31 to through-hole V36, through-hole V41 to through-hole V45, through-hole V51 to through-hole V57, and how the planar conductor IP is connected Information, for example, information indicating the connection relationship illustrated in FIG. 3.

以下,將導電部P1~導電部P7、導電部P11~導電部P17等導電部總稱為導電部P,將配線W11、配線W12、配線W21、配線W22、配線W41~配線W45等配線總稱為配線W,將通孔V11~通孔V17、通孔V21~通孔V27、通孔V31~通孔V36、通孔V41~通孔V45、通孔V51~通孔V57等總稱為通孔V,將配線層L1、配線層L2、配線層L4總稱為配線層L。Hereinafter, the conductive parts such as the conductive part P1 to the conductive part P7, the conductive part P11 to the conductive part P17 are collectively referred to as the conductive part P, and the wirings such as the wiring W11, wiring W12, wiring W21, wiring W22, wiring W41 to wiring W45 are collectively referred to as wiring W, collectively referred to as vias V11 to vias V17, vias V21 to vias V27, vias V31 to vias V36, vias V41 to vias V45, vias V51 to vias V57, etc. The wiring layer L1, the wiring layer L2, and the wiring layer L4 are collectively referred to as a wiring layer L.

各導電部P經由通孔V或配線W而與面狀導體IP導通連接。如此,各導電部P與面狀導體IP導通連接的配線結構通常用於電路接地或電源圖案的連接用途。再者,基板B當然亦可包含未與電路接地或電源圖案連接的配線或焊墊等。Each conductive portion P is conductively connected to the planar conductor IP via the via hole V or the wiring W. In this way, the wiring structure where each conductive portion P is conductively connected to the planar conductor IP is generally used for circuit ground or power pattern connection purposes. Furthermore, the substrate B may of course also include wiring or pads that are not connected to the circuit ground or the power supply pattern.

若將基板B安裝於基板固定裝置110,則藉由移動機構125,使測定部121的各探針Pr抵接於導電部P1~導電部P7,並使測定部122的各探針Pr抵接於導電部P11~導電部P17。藉此,測定部121、測定部122可使電流I流入任意的一對導電部P間,而檢測所述一對導電部P間的電壓。When the substrate B is mounted on the substrate fixing device 110, the probe Pr of the measuring unit 121 is brought into contact with the conductive parts P1 to P7 by the moving mechanism 125, and the probe Pr of the measuring unit 122 is brought into contact with each other The conductive part P11 to the conductive part P17. As a result, the measurement unit 121 and the measurement unit 122 can cause the current I to flow between any pair of conductive portions P, and detect the voltage between the pair of conductive portions P.

測定部121、測定部122為了利用所謂的四端子電阻測定法的電阻測定,亦可使電流供給用的探針Pr與電壓測定用的探針Pr接觸一個導電部P,為了利用所謂的二端子電阻測定法的電阻測定,亦可使兼任電流供給與電壓測定的一個探針P接觸一個導電部P。In order to use the so-called four-terminal resistance measurement method for the resistance measurement, the measurement unit 121 and the measurement unit 122 may contact the probe Pr for current supply and the probe Pr for voltage measurement with one conductive portion P, in order to use the so-called two-terminal In the resistance measurement by the resistance measurement method, one probe P serving as both current supply and voltage measurement may be brought into contact with one conductive portion P.

檢查處理部21對測定部121、測定部122進行控制,將來自電源部CS(參照圖2)的電流I供給至如後述般選擇的一對導電部P中的一者,並藉由電源部CM(參照圖2)而自另一者中抽出電流I,藉此將電流I供給至導電部P間,並檢測所述導電部P間的電壓,且根據所述電流與所述電壓來檢查基板B。檢查處理部21例如可根據所述電流與所述電壓,利用四端子電阻測定法或二端子電阻測定法進行電阻測定,並根據其電阻值,進行基板B的檢查。The inspection processing section 21 controls the measurement section 121 and the measurement section 122 to supply the current I from the power supply section CS (see FIG. 2) to one of the pair of conductive sections P selected as described later, and the power supply section CM (refer to FIG. 2) and draw a current I from the other, thereby supplying the current I between the conductive parts P, and detecting the voltage between the conductive parts P, and checking based on the current and the voltage Substrate B. The inspection processing unit 21 may perform resistance measurement using the four-terminal resistance measurement method or the two-terminal resistance measurement method based on the current and the voltage, and perform inspection of the substrate B based on the resistance value.

以下,將檢查處理部21藉由控制測定部121、測定部122來進行電流供給及電壓檢測的情況僅如檢查處理部21供給電流、檢測電壓般記載。檢查處理部21的運作的詳細情況將後述。Hereinafter, the case where the inspection processing unit 21 performs the current supply and voltage detection by controlling the measurement unit 121 and the measurement unit 122 will be described as if the inspection processing unit 21 supplies the current and the detection voltage. The details of the operation of the inspection processing unit 21 will be described later.

繼而,對所述檢查指示資訊產生裝置3的運作進行說明。以產生對應於圖3中所示的基板B的檢查指示資訊的情況為例進行說明。圖5、圖6是圖示於產生對應於圖3中所示的基板B的檢查指示資訊時的檢查指示資訊產生方法的執行過程中經變更的導電結構資訊D1的一例的說明圖。以下,一面參照圖5~圖14,一面對根據本發明一實施方式的檢查指示資訊產生程式來執行檢查指示資訊產生方法的檢查指示資訊產生裝置3的運作進行說明。Next, the operation of the inspection instruction information generating device 3 will be described. The case where the inspection instruction information corresponding to the substrate B shown in FIG. 3 is generated will be described as an example. 5 and 6 are explanatory diagrams illustrating an example of the changed conductive structure information D1 during the execution of the inspection instruction information generation method when generating the inspection instruction information corresponding to the substrate B shown in FIG. 3. Hereinafter, referring to FIGS. 5 to 14, the operation of the inspection instruction information generation device 3 that executes the inspection instruction information generation method according to the inspection instruction information generation program according to an embodiment of the present invention will be described.

再者,於以下的流程圖中,對相同的處理賦予相同的步驟編號並省略其說明。In the following flowchart, the same process is given the same step number and its description is omitted.

首先,檢查指示資訊產生部31於將基板B的各導電部P群組化時,進行將由導電結構資訊D1表示的連接結構簡單化的處理作為前處理。具體而言,檢查指示資訊產生部31於多個配線層L的配線W並聯連接的情況下,以將該經並聯連接的配線W替換成所述各配線W之中最接近基板面F1的配線W的方式,複製、變更導電結構資訊D1,而產生導電結構資訊D1'(步驟S1:(d)工序)。First, the inspection instruction information generating unit 31 performs a process of simplifying the connection structure represented by the conductive structure information D1 as a pre-process when grouping the conductive parts P of the substrate B. Specifically, when the inspection instruction information generating section 31 is connected in parallel to the wiring W of the plurality of wiring layers L, the wiring W connected in parallel is replaced with the wiring closest to the substrate surface F1 among the wirings W In the manner of W, the conductive structure information D1 is copied and changed to generate the conductive structure information D1' (step S1: (d) process).

具體而言,於圖3中所示的基板B中,多個配線層L1、配線層L2的配線W11、配線W21藉由通孔V21、通孔V22而並聯連接。於此情況下,針對導電結構資訊D1,如圖5所示,將兩根配線W11、W21替換成配線W11、配線W21之中最接近基板面F1的一根配線W11,而產生導電結構資訊D1'。此時,通孔V22的一端變成打開,因此於資料上,亦可作為不存在通孔V22的處理。藉此,將基板B的配線結構簡單化,因此以後的處理變得容易。Specifically, in the substrate B shown in FIG. 3, the wiring W11 and the wiring W21 of the plurality of wiring layers L1 and the wiring layer L2 are connected in parallel through the via holes V21 and the via holes V22. In this case, for the conductive structure information D1, as shown in FIG. 5, the two wires W11 and W21 are replaced with the one wire W11 among the wires W11 and W21 that is closest to the substrate surface F1 to generate the conductive structure information D1 '. At this time, one end of the through-hole V22 becomes open, so it can also be treated as the absence of the through-hole V22 on the document. This simplifies the wiring structure of the substrate B, and hence the subsequent processing becomes easy.

繼而,檢查指示資訊產生部31於藉由配線W與面狀導體IP,而將通孔V或通孔V的行並聯連接的情況下,以將該經並聯連接的通孔V或通孔V的行替換成一個通孔或一行通孔的方式,變更導電結構資訊D1'(步驟S2:(e)工序)。Then, when the inspection instruction information generating section 31 connects the through holes V or the rows of the through holes V in parallel through the wiring W and the planar conductor IP, the through holes V or the through holes V connected in parallel Replace the row with a through hole or a row of through holes, and change the conductive structure information D1' (step S2: (e) process).

具體而言,於圖3中所示的基板B中,將通孔V24、通孔V33串聯連接而形成行,將通孔V25、通孔V34串聯連接而形成行。而且,藉由配線W12與面狀導體IP,而將通孔V24、通孔V33的行與通孔V25、通孔V34的行並聯連接。另外,藉由配線W22與面狀導體IP,而將通孔V32與通孔V33並聯連接。Specifically, in the substrate B shown in FIG. 3, the via holes V24 and the via holes V33 are connected in series to form a row, and the via holes V25 and the via holes V34 are connected in series to form a row. Furthermore, the rows of the vias V24 and V33 and the rows of the vias V25 and V34 are connected in parallel by the wiring W12 and the planar conductor IP. In addition, through the wiring W22 and the planar conductor IP, the via hole V32 and the via hole V33 are connected in parallel.

於此情況下,例如如圖5所示,針對導電結構資訊D1',將通孔V24、通孔V33的行與通孔V25、通孔V34的行替換成任一行,例如替換成通孔V24、通孔V33的行,將通孔V32與通孔V33替換成一個通孔V,例如替換成通孔V32。In this case, for example, as shown in FIG. 5, for the conductive structure information D1 ′, the rows of the through-holes V24 and V33 and the rows of the through-holes V25 and V34 are replaced with any row, for example, through-hole V24 In the row of the through holes V33, the through holes V32 and the through holes V33 are replaced with one through hole V, for example, through holes V32.

另外,藉由配線W41、配線W42、配線W43的串聯配線與面狀導體IP,而將通孔V41與通孔V42並聯連接。於此情況下,例如如圖5所示,於導電結構資訊D1上,將通孔V41、通孔V42替換成一個通孔V,例如替換成通孔V41。另外,藉由配線W44、配線W45與面狀導體IP,而將通孔V43、通孔V44、通孔V45並聯連接。於此情況下,例如如圖5所示,針對導電結構資訊D1',將通孔V43、通孔V44、通孔V45替換成一個通孔V,例如替換成通孔V43。藉此,將基板B的配線結構簡單化,因此以後的處理變得容易。In addition, the through-hole V41 and the through-hole V42 are connected in parallel by the series wiring of the wiring W41, the wiring W42, and the wiring W43 and the planar conductor IP. In this case, for example, as shown in FIG. 5, on the conductive structure information D1, the via holes V41 and V42 are replaced by one via hole V, for example, the via hole V41. In addition, the via hole V43, the via hole V44, and the via hole V45 are connected in parallel by the wiring W44, the wiring W45, and the planar conductor IP. In this case, for example, as shown in FIG. 5, for the conductive structure information D1 ′, the via hole V43, the via hole V44, and the via hole V45 are replaced by one via hole V, for example, the via hole V43. This simplifies the wiring structure of the substrate B, and hence the subsequent processing becomes easy.

再者,檢查指示資訊產生部31未必需要執行步驟S1、步驟S2,亦可將表示圖3中所示的基板B的實際的配線結構的資料形式的導電結構資訊D1作為導電結構資訊D1',執行以後的處理。Furthermore, the inspection instruction information generating section 31 does not necessarily need to perform steps S1 and S2, and the conductive structure information D1 representing the actual wiring structure of the substrate B shown in FIG. 3 may be used as the conductive structure information D1′. Perform subsequent processing.

繼而,檢查指示資訊產生部31將導電結構資訊D1'的資料結構轉換成樹狀結構(tree structure)(步驟S3:(m)工序)。將已被轉換成樹狀結構的導電結構資訊D1'稱為導電結構資訊D1''。如圖6所示,於導電結構資訊D1''中,一個配線W由一個節點N表達,面狀導體IP由根節點NR表達,通孔V作為將導電部P與節點間連接的分支M、或將節點相互間連接的分支M來表達。Then, the inspection instruction information generating section 31 converts the data structure of the conductive structure information D1' into a tree structure (step S3: (m) process). The conductive structure information D1' that has been converted into a tree structure is called conductive structure information D1''. As shown in FIG. 6, in the conductive structure information D1'', one wiring W is expressed by a node N, the planar conductor IP is expressed by a root node NR, and the through hole V serves as a branch M, which connects the conductive portion P and the node Or the branch M that connects the nodes to each other is expressed.

再者,檢查指示資訊產生部31未必需要執行步驟S3,亦可使用表示基板B的配線結構的資料形式的導電結構資訊D1、導電結構資訊D1'執行以後的處理。於以下的說明中,對於節點N的處理與對於對應於所述節點N的配線W的處理相同,對於根節點NR的處理與對於面狀導體IP的處理相同,對於分支M的處理與對於對應於所述節點N的配線W的處理相同。In addition, the inspection instruction information generating section 31 does not necessarily need to perform step S3, and may use the conductive structure information D1, the conductive structure information D1' representing the wiring structure data of the substrate B to perform subsequent processing. In the following description, the processing for the node N is the same as the processing for the wiring W corresponding to the node N, the processing for the root node NR is the same as the processing for the planar conductor IP, and the processing for the branch M corresponds to The processing of the wiring W at the node N is the same.

於圖6中所示的樹狀結構的導電結構資訊D1''的例子中,節點N11對應於配線W11(W21),節點N12對應於配線W12,節點N21對應於配線W22,節點N41對應於配線W41、配線W42、配線W43,節點N42對應於配線W44、配線W45。另外,分支M11對應於通孔V11(V21),分支M12對應於通孔V12(V22),分支M13對應於通孔V14,分支M14對應於通孔V15,分支M22對應於通孔V24(V25),分支Mr1對應於通孔V21、通孔V31,分支Mr2對應於通孔V32(V33),分支Mr3對應於通孔V16、通孔V26、通孔V35,分支Mr4對應於通孔V17、通孔V27、通孔V36,分支M41對應於通孔V51,分支M42對應於通孔V52,分支M43對應於通孔V53,分支M44對應於通孔V54,分支M45對應於通孔V55,分支M46對應於通孔V56,分支M47對應於通孔V57,分支Mr5對應於通孔V41(V42),分支Mr6對應於通孔V43(V44、V45)。In the example of the conductive structure information D1'' of the tree structure shown in FIG. 6, the node N11 corresponds to the wiring W11 (W21), the node N12 corresponds to the wiring W12, the node N21 corresponds to the wiring W22, and the node N41 corresponds to the wiring W41, wiring W42, wiring W43, and node N42 correspond to wiring W44 and wiring W45. In addition, the branch M11 corresponds to the through-hole V11 (V21), the branch M12 corresponds to the through-hole V12 (V22), the branch M13 corresponds to the through-hole V14, the branch M14 corresponds to the through-hole V15, and the branch M22 corresponds to the through-hole V24 (V25) , Branch Mr1 corresponds to through-hole V21, through-hole V31, branch Mr2 corresponds to through-hole V32 (V33), branch Mr3 corresponds to through-hole V16, through-hole V26, through-hole V35, branch Mr4 corresponds to through-hole V17, through-hole V27, through hole V36, branch M41 corresponds to through hole V51, branch M42 corresponds to through hole V52, branch M43 corresponds to through hole V53, branch M44 corresponds to through hole V54, branch M45 corresponds to through hole V55, branch M46 corresponds to Through hole V56, branch M47 corresponds to through hole V57, branch Mr5 corresponds to through hole V41 (V42), and branch Mr6 corresponds to through hole V43 (V44, V45).

繼而,檢查指示資訊產生部31選擇最接近基板面F1的配線層L1作為第一選擇層LL1,選擇最接近基板面F2的配線層L4作為第二選擇層LL2(步驟S4:(f)工序)。步驟S4~步驟S27、步驟S101~步驟S501的處理相當於檢查指示資訊產生處理的一例。Then, the inspection instruction information generating section 31 selects the wiring layer L1 closest to the substrate surface F1 as the first selection layer LL1, and selects the wiring layer L4 closest to the substrate surface F2 as the second selection layer LL2 (step S4: (f) step) . The processing from step S4 to step S27 and from step S101 to step S501 corresponds to an example of the inspection instruction information generation processing.

繼而,檢查指示資訊產生部31執行第一工序(步驟S5)。參照圖11,檢查指示資訊產生部31根據導電結構資訊D1'',將經由第一選擇層LL1的節點N(配線W)而相互導通的基板面F1的導電部P彼此群組化(步驟S101:(f)工序的(a)工序)。Then, the inspection instruction information generating section 31 executes the first process (step S5). Referring to FIG. 11, the inspection instruction information generating portion 31 groups the conductive portions P of the substrate surface F1 that are mutually connected via the node N (wiring W) of the first selection layer LL1 based on the conductive structure information D1″ (step S101 : (F) step (a) step).

此處,第一選擇層LL1為配線層L1,因此於圖6中所示的樹狀結構的導電結構資訊D1''中,將經由第一選擇層LL1的節點N11而導通的導電部P1、導電部P2群組化,將經由第一選擇層LL1的節點N12而導通的導電部P4、導電部P5群組化。Here, the first selection layer LL1 is the wiring layer L1, so in the conductive structure information D1'' of the tree structure shown in FIG. 6, the conductive portion P1 that is conducted through the node N11 of the first selection layer LL1 The conductive portion P2 is grouped, and the conductive portion P4 and the conductive portion P5 that are turned on via the node N12 of the first selection layer LL1 are grouped.

繼而,檢查指示資訊產生部31針對藉由步驟S101而群組化的各群組,自該各群組中所包含的導電部P中選擇兩個導電部作為一對第一選擇導電部,並與第一選擇層LL1建立對應而記錄於檢查指示資訊D2(步驟S102:(f)工序的(b)工序)。第一選擇導電部是表示可同時進行檢查的導電部(檢查部位)的資訊。Then, the inspection instruction information generating section 31 selects two conductive sections from the conductive sections P included in each group as a pair of first selection conductive sections for each group grouped in step S101, and Corresponding to the first selection layer LL1 and recorded in the inspection instruction information D2 (step S102: (b) process of (f) process). The first selected conductive part is information indicating a conductive part (inspection part) that can be inspected at the same time.

於圖6的例子中,自對應於配線層L1的導電部P1、導電部P2的群組中選擇導電部P1、導電部P2作為第一選擇導電部,自導電部P4、導電部P5的群組中選擇導電部P4、導電部P5作為第一選擇導電部。以下,將導電部P1與導電部P2的對如導電部對P1、P2般表述。In the example of FIG. 6, the conductive portion P1 and the conductive portion P2 are selected as the first selected conductive portion from the group of the conductive portion P1 and the conductive portion P2 corresponding to the wiring layer L1, and the group of the conductive portion P4 and the conductive portion P5 The conductive part P4 and the conductive part P5 in the group are selected as the first selected conductive part. Hereinafter, the pair of the conductive portion P1 and the conductive portion P2 is expressed as the conductive portion pairs P1 and P2.

繼而,當於藉由步驟S101而群組化的各群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與第一選擇層LL1建立對應而記錄於檢查指示資訊D2(步驟S103:(f)工序的(b)工序)。第二選擇導電部是表示應與第一選擇導電部不同時地被檢查的導電部(檢查部位)的資訊。Then, when among the groups grouped by step S101, there is a group having the conductive part P that is not selected as the first selection conductive part, the check instruction information generating part 31 is directed to the group, Select two conductive parts P including the conductive part P that is not selected as the first selected conductive part as a pair of second selected conductive parts, and correspond to the first selected layer LL1 and record in the inspection instruction information D2 (step S103: (f) step (b) step). The second selected conductive portion is information indicating a conductive portion (inspected portion) that should be inspected at different times than the first selected conductive portion.

於圖6的例子中,於導電部P1、導電部P2的群組,及導電部P4、導電部P5的群組中,不存在具有未被選擇為第一選擇導電部的導電部P的群組,因此檢查指示資訊產生部31將處理朝接下來的步驟S104轉移。In the example of FIG. 6, in the group of the conductive part P1, the conductive part P2, and the group of the conductive part P4, the conductive part P5, there is no group having the conductive part P not selected as the first selected conductive part Therefore, the inspection instruction information generating unit 31 shifts the processing to the next step S104.

繼而,檢查指示資訊產生部31根據導電結構資訊D1'',將經由第二選擇層LL2的節點N(配線W)而相互導通的基板面F2的導電部P彼此群組化(步驟S104:(f)工序的(a)工序)。Then, based on the conductive structure information D1'', the inspection instruction information generating section 31 groups the conductive sections P of the substrate surface F2 that are mutually connected via the node N (wiring W) of the second selection layer LL2 (step S104: ( f) Process (a) process).

此處,第二選擇層LL2為配線層L4,因此於圖6中所示的樹狀結構的導電結構資訊D1''中,將經由第二選擇層LL2的節點N41而導通的導電部P11、導電部P12、導電部P13、導電部P14群組化,將經由第二選擇層LL2的節點N42而導通的導電部P15、導電部P16、導電部P17群組化。Here, the second selection layer LL2 is the wiring layer L4, so in the conductive structure information D1'' of the tree structure shown in FIG. 6, the conductive portion P11, which is conducted through the node N41 of the second selection layer LL2, The conductive portion P12, the conductive portion P13, and the conductive portion P14 are grouped, and the conductive portion P15, the conductive portion P16, and the conductive portion P17 turned on via the node N42 of the second selection layer LL2 are grouped.

繼而,檢查指示資訊產生部31針對藉由步驟S104而群組化的各群組,自該各群組中所包含的導電部P中選擇二個導電部作為一對第一選擇導電部,並與第二選擇層LL2建立對應而記錄於檢查指示資訊D2(步驟S105:(f)工序的(b)工序)。Then, the inspection instruction information generating section 31 selects two conductive sections from the conductive sections P included in each group as a pair of first selection conductive sections for each group grouped in step S104, and Corresponding to the second selection layer LL2 and recorded in the inspection instruction information D2 (step S105: (b) process of (f) process).

於圖6的例子中,自導電部P11、導電部P12、導電部P13、導電部P14的群組中選擇任意的例如導電部P11、導電部P12作為第一選擇導電部,自導電部P15、導電部P16、導電部P17的群組中選擇任意的例如導電部P15、導電部P16作為第一選擇導電部。In the example of FIG. 6, any group of conductive parts P11, P12, P13, and P14 is selected as the first selected conductive part from the group of conductive part P11, conductive part P12, conductive part P13, and conductive part P14. In the group of the conductive portion P16 and the conductive portion P17, for example, any one of the conductive portion P15 and the conductive portion P16 is selected as the first selected conductive portion.

繼而,當於藉由步驟S104而群組化的各群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與第二選擇層LL2建立對應而記錄於檢查指示資訊D2(步驟S106:(f)工序的(b)工序),然後結束第一工序而將處理朝步驟S7(圖7)轉移。Then, when among the groups grouped by step S104, there is a group having the conductive part P that is not selected as the first selection conductive part, the check instruction information generating part 31 is directed to the group, The two conductive parts P including the conductive part P that is not selected as the first selected conductive part are selected as a pair of second selected conductive parts, and are associated with the second selected layer LL2 and recorded in the inspection instruction information D2 (step S106: (f) step (b) step), and then ends the first step and shifts the process to step S7 (FIG. 7).

於圖6的例子中,於導電部P11、導電部P12、導電部P13、導電部P14的群組,及導電部P15、導電部P16、導電部P17的群組,具有未被選擇為第一選擇導電部的導電部P13、導電部P14,及導電部P17。於此情況下,檢查指示資訊產生部31選擇導電部對P13、P14,及導電部對P16、P17作為第二選擇導電部。In the example of FIG. 6, among the groups of the conductive portion P11, the conductive portion P12, the conductive portion P13, and the conductive portion P14, and the group of the conductive portion P15, the conductive portion P16, and the conductive portion P17, have not been selected as the first The conductive portion P13, the conductive portion P14, and the conductive portion P17 of the conductive portion are selected. In this case, the inspection instruction information generating section 31 selects the pair of conductive sections P13, P14, and the pair of conductive sections P16, P17 as the second selection conductive section.

返回至圖7,檢查指示資訊產生部31對作為用於控制處理的控制旗標的旗標Fip1進行核查(步驟S7)。Returning to FIG. 7, the inspection instruction information generating unit 31 checks the flag Fip1 that is the control flag used for the control process (step S7 ).

當旗標Fip1是1時(步驟S7中為是(YES)),表示於後述的步驟S12中已將旗標Fip1設為1,與導體層Lc的基板面F1側、及較導體層Lc更靠近基板面F1側的各配線層L對應的檢查指示資訊D2的產生已結束。因此,檢查指示資訊產生部31不執行步驟S11~步驟S16,而朝步驟S17(圖9)轉移。When the flag Fip1 is 1 (YES in step S7), it means that the flag Fip1 has been set to 1 in step S12 to be described later, which is more on the substrate surface F1 side of the conductor layer Lc than the conductor layer Lc The generation of the inspection instruction information D2 corresponding to each wiring layer L close to the substrate surface F1 side has ended. Therefore, the inspection instruction information generating unit 31 does not execute steps S11 to S16, but shifts to step S17 (FIG. 9 ).

當旗標Fip1不是1時(步驟S7中為否(NO)),檢查指示資訊產生部31朝步驟S11(圖8)轉移,並對導體層Lc是否鄰接於第一選擇層LL1的遠離基板面F1之側進行核查(步驟S11)。When the flag Fip1 is not 1 (NO in step S7), it is checked that the instruction information generating section 31 shifts to step S11 (FIG. 8), and whether the conductor layer Lc is adjacent to the surface of the first selection layer LL1 away from the substrate Check on the side of F1 (step S11).

當導體層Lc鄰接於第一選擇層LL1的遠離基板面F1之側時(步驟S11中為是),檢查指示資訊產生部31將旗標Fip1設為1(步驟S12),且為了選擇用於與面狀導體IP的基板面F1側連接的通孔V的檢查的導電部P,而將處理朝步驟S301(圖12)轉移。When the conductor layer Lc is adjacent to the side of the first selection layer LL1 away from the substrate surface F1 (Yes in step S11), the inspection instruction information generating section 31 sets the flag Fip1 to 1 (step S12), and in order to select The conductive part P of the inspection of the through hole V connected to the substrate surface F1 side of the planar conductor IP shifts the process to step S301 (FIG. 12 ).

另一方面,當導體層Lc未鄰接於第一選擇層LL1的遠離基板面F1之側時(步驟S11中為否),檢查指示資訊產生部31選擇鄰接於第一選擇層LL1的遠離基板面F1之側的配線層L作為新的第一選擇層LL1(步驟S13:(g)工序)。藉此,將新的第一選擇層LL1作為處理對象來執行步驟S14~步驟S16。On the other hand, when the conductor layer Lc is not adjacent to the side of the first selection layer LL1 away from the substrate surface F1 (No in step S11), the inspection instruction information generating section 31 selects the surface away from the substrate surface adjacent to the first selection layer LL1 The wiring layer L on the side of F1 serves as a new first selection layer LL1 (step S13: (g) step). With this, steps S14 to S16 are executed with the new first selection layer LL1 as the processing target.

例如,於圖6中所示的例子中,目前第一選擇層LL1為配線層L1。導體層Lc未鄰接於配線層L1的遠離基板面F1之側(步驟S11中為否),鄰接於配線層L1的遠離基板面F1之側的配線層L2成為新的第一選擇層LL1(步驟S13)。For example, in the example shown in FIG. 6, the first selection layer LL1 is currently the wiring layer L1. The conductor layer Lc is not adjacent to the side of the wiring layer L1 away from the substrate surface F1 (No in step S11), and the wiring layer L2 adjacent to the side of the wiring layer L1 away from the substrate surface F1 becomes a new first selection layer LL1 (step S13).

繼而,檢查指示資訊產生部31根據導電結構資訊D1'',對應於第一選擇層LL1的各節點N,針對與其中一個節點N的遠離根節點NR之側連接的一個分支M(通孔V),選擇一個在與所述節點N相反側進行電性連接,即導通的基板面F1的導電部P。檢查指示資訊產生部31針對對應的各節點N,將經選擇的導電部P群組化(步驟S14:(g1)工序)。Then, the inspection instruction information generating section 31 corresponds to each node N of the first selection layer LL1 according to the conductive structure information D1'', and for a branch M (through hole V) connected to the side of one of the nodes N away from the root node NR ), select a conductive portion P on the substrate surface F1 that is electrically connected to the opposite side of the node N, that is, conductive. The inspection instruction information generating unit 31 groups the selected conductive parts P for each corresponding node N (step S14: (g1) process).

於圖6中所示的例子中,於作為第一選擇層LL1的配線層L2有節點N21。於節點N21連接有分支M21與分支M22。作為與分支M21的與節點N21相反側直接或間接地導通的基板面F1的導電部P,有導電部P3。因此,選擇對應於分支M21的導電部P3。作為與分支M22的與節點N21相反側直接或間接地導通的基板面F1的導電部P,有導電部P4、導電部P5。自所述導電部P4、導電部P5中選擇任意的一個,例如導電部P4作為對應於分支M22的導電部P。藉此,對應於節點N21而將導電部P3、導電部P4群組化。In the example shown in FIG. 6, the wiring layer L2 as the first selection layer LL1 has the node N21. The branch M21 and the branch M22 are connected to the node N21. As the conductive portion P of the substrate surface F1 that directly or indirectly conducts to the side opposite to the node N21 of the branch M21, there is a conductive portion P3. Therefore, the conductive portion P3 corresponding to the branch M21 is selected. As the conductive portion P of the substrate surface F1 that directly or indirectly conducts to the side opposite to the node N21 of the branch M22, there are a conductive portion P4 and a conductive portion P5. Select any one of the conductive portion P4 and the conductive portion P5, for example, the conductive portion P4 is the conductive portion P corresponding to the branch M22. With this, the conductive portion P3 and the conductive portion P4 are grouped corresponding to the node N21.

繼而,檢查指示資訊產生部31針對藉由步驟S14而群組化的各群組,自該各群組中所包含的導電部P中選擇任意的兩個導電部作為一對第一選擇導電部,並與第一選擇層LL1建立對應而記錄於檢查指示資訊D2(步驟S15:(g2)工序的(b)工序)。Then, the inspection instruction information generating section 31 selects any two conductive sections from the conductive sections P included in each group as a pair of first selection conductive sections for each group grouped in step S14 , And corresponding to the first selection layer LL1 and recorded in the inspection instruction information D2 (step S15: (g2) process (b) process).

於圖6中所示的例子中,自藉由步驟S14而群組化的導電部P3、導電部P4中選擇兩個導電部P3、P4作為一對第一選擇導電部。In the example shown in FIG. 6, two conductive portions P3 and P4 are selected from the conductive portions P3 and P4 grouped in step S14 as a pair of first selected conductive portions.

例如,如圖16中所示的樹狀結構的導電結構資訊D1''般,於節點N11未與根節點NR連接而藉由分支M23與節點N21連接的情況下,於步驟S14中,作為與分支M23的與節點N21相反側直接或間接地導通的基板面F1的導電部P,有導電部P1、導電部P2。自所述導電部P1、導電部P2中選擇任意的一個,例如導電部P1作為對應於分支M23的導電部P。於是,將於所述導電部P3、導電部P4加入了導電部P1的導電部P1、導電部P3、導電部P4對應於節點N21而群組化。For example, as shown in the conductive structure information D1'' of the tree structure shown in FIG. 16, when the node N11 is not connected to the root node NR but is connected to the node N21 through the branch M23, in step S14, as The conductive portion P of the substrate surface F1 that is directly or indirectly connected to the opposite side of the node N21 of the branch M23 has a conductive portion P1 and a conductive portion P2. Select any one of the conductive portion P1 and the conductive portion P2, for example, the conductive portion P1 as the conductive portion P corresponding to the branch M23. Then, the conductive portion P1, the conductive portion P3, and the conductive portion P4, to which the conductive portion P3 and the conductive portion P4 are added to the conductive portion P1, are grouped corresponding to the node N21.

進而,於步驟S15中,自導電部P1、導電部P3、導電部P4中選擇兩個導電部,例如導電部P1、導電部P3作為一對第一選擇導電部。Furthermore, in step S15, two conductive parts are selected from the conductive part P1, the conductive part P3, and the conductive part P4, for example, the conductive part P1, the conductive part P3 as a pair of first selected conductive parts.

繼而,當於藉由步驟S14而群組化的群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與第一選擇層LL1建立對應而記錄於檢查指示資訊D2(步驟S16:(g2)工序的(b)工序),然後朝步驟S17(圖9)轉移。Then, when there is a group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S14, the check instruction information generating part 31 selects for the group The two conductive portions P including the conductive portion P that is not selected as the first selected conductive portion serve as a pair of second selected conductive portions and are associated with the first selected layer LL1 and recorded in the inspection instruction information D2 (step S16 : (G2) step (b) step), and then move to step S17 (FIG. 9).

另一方面,當於藉由步驟S14而群組化的群組中,不存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31直接朝步驟S17轉移。On the other hand, when there is no group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S14, the inspection instruction information generating part 31 directly proceeds to step S17 Transfer.

繼而,檢查指示資訊產生部31對作為用於控制處理的控制旗標的旗標Fip2進行核查(步驟S17)。Then, the inspection instruction information generating section 31 checks the flag Fip2 which is a control flag used for control processing (step S17).

當旗標Fip2是1時(步驟S17中為是),表示於後述的步驟S19中已將旗標Fip2設為1,對於導體層Lc的基板面F2側、及較導體層Lc更靠近基板面F2側的各配線層L的檢查指示資訊D2的產生已結束。因此,檢查指示資訊產生部31不執行步驟S18~步驟S24,而朝步驟S26(圖10)轉移。When the flag Fip2 is 1 (YES in step S17), it means that the flag Fip2 has been set to 1 in step S19 to be described later, and the substrate surface F2 side of the conductor layer Lc is closer to the substrate surface than the conductor layer Lc The inspection of each wiring layer L on the F2 side indicates that the generation of information D2 has ended. Therefore, the inspection instruction information generating unit 31 does not execute steps S18 to S24, but shifts to step S26 (FIG. 10).

當旗標Fip2不是1當(步驟S17中為否),檢查指示資訊產生部31朝步驟S18轉移,並對導體層Lc是否鄰接於第二選擇層LL2的遠離基板面F2之側進行核查(步驟S18)。When the flag Fip2 is not 1 (No in step S17), the check instruction information generating section 31 shifts to step S18, and checks whether the conductor layer Lc is adjacent to the side of the second selection layer LL2 away from the substrate surface F2 (step S18).

當導體層Lc鄰接於第二選擇層LL2的遠離基板面F2之側當(步驟S18中為是),檢查指示資訊產生部31將旗標Fip2設為1(步驟S19),且為了選擇用於與面狀導體IP的基板面F2側連接的通孔V的檢查的導電部P,而將處理朝步驟S401(圖13)轉移。When the conductor layer Lc is adjacent to the side of the second selection layer LL2 away from the substrate surface F2 (Yes in step S18), the inspection instruction information generating section 31 sets the flag Fip2 to 1 (step S19), and in order to select The inspected conductive portion P of the through hole V connected to the substrate surface F2 side of the planar conductor IP shifts the process to step S401 (FIG. 13 ).

例如,於圖6中所示的例子中,若目前第二選擇層LL2為配線層L4,則導體層Lc鄰接於配線層L4的遠離基板面F2之側(步驟S18中為是),因此將旗標Fip2設為1(步驟S19),並朝步驟S401(圖13)轉移。For example, in the example shown in FIG. 6, if the current second selection layer LL2 is the wiring layer L4, the conductor layer Lc is adjacent to the side of the wiring layer L4 away from the substrate surface F2 (Yes in step S18), so the The flag Fip2 is set to 1 (step S19) and moves to step S401 (FIG. 13).

參照圖13,於步驟S401中,檢查指示資訊產生部31針對與根節點NR(面狀導體IP)的基板面F2側連接的各分支M(通孔V),選擇一個在與根節點NR相反側進行電性連接,即導通的導電部P,藉此將該經選擇的導電部P作為與根節點NR的基板面F2側對應的導電部而群組化(步驟S401:(h)工序)。Referring to FIG. 13, in step S401, the inspection instruction information generating section 31 selects one of the branches M (through holes V) connected to the substrate surface F2 side of the root node NR (planar conductor IP) opposite to the root node NR Side is electrically connected, that is, the conductive portion P is turned on, thereby grouping the selected conductive portion P as the conductive portion corresponding to the substrate surface F2 side of the root node NR (step S401: (h) step) .

於圖6中所示的例子中,於根節點NR的基板面F2側連接有分支Mr5、分支Mr6。作為與分支Mr5導通的導電部P,有導電部P11、導電部P12、導電部P13、導電部P14。作為與分支Mr6導通的導電部P,有導電部P15、導電部P16、導電部P17。因此,於步驟S401中,自導電部P11、導電部P12、導電部P13、導電部P14中選擇任意的一個,例如導電部P11,自導電部P15、導電部P16、導電部P17中選擇任意的一個,例如導電部P15。藉此,將導電部P11、導電部P15群組化。In the example shown in FIG. 6, the branch Mr5 and the branch Mr6 are connected to the substrate surface F2 side of the root node NR. As the conductive portion P that is in conduction with the branch Mr5, there are a conductive portion P11, a conductive portion P12, a conductive portion P13, and a conductive portion P14. As the conductive portion P that is in conduction with the branch Mr6, there are a conductive portion P15, a conductive portion P16, and a conductive portion P17. Therefore, in step S401, any one of the conductive part P11, the conductive part P12, the conductive part P13, and the conductive part P14 is selected, for example, the conductive part P11, the arbitrary one from the conductive part P15, the conductive part P16, the conductive part P17 One, for example, the conductive portion P15. With this, the conductive portion P11 and the conductive portion P15 are grouped.

繼而,檢查指示資訊產生部31自藉由步驟S401而群組化的導電部P中選擇兩個導電部P作為一對第一選擇導電部,並與根節點NR的基板面F2側建立對應而記錄於檢查指示資訊D2(步驟S402:(h)工序)。Then, the inspection instruction information generating section 31 selects two conductive sections P from the conductive sections P grouped in step S401 as a pair of first selection conductive sections, and corresponds to the substrate surface F2 side of the root node NR Recorded in the inspection instruction information D2 (step S402: (h) process).

於步驟S402中,自藉由步驟S401而群組化的導電部P11、導電部P15中選擇兩個導電部P作為一對第一選擇導電部。於此情況下,藉由步驟S401而群組化的導電部P僅為導電部P11、導電部P15這兩個導電部,因此選擇所述兩個導電部P11、P15作為一對第一選擇導電部。In step S402, two conductive portions P are selected from the conductive portions P11 and P15 grouped in step S401 as a pair of first selected conductive portions. In this case, the conductive parts P grouped by step S401 are only the conductive parts P11 and P15, so the two conductive parts P11 and P15 are selected as a pair of first selected conductive unit.

繼而,當於藉由步驟S401而群組化的群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與根節點NR的基板面F2側建立對應而記錄於檢查指示資訊D2(步驟S403),然後將處理朝步驟S26(圖10)轉移。Then, when there is a group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S401, the check instruction information generating part 31 selects for the group The two conductive portions P including the conductive portion P that is not selected as the first selected conductive portion serve as a pair of second selected conductive portions and are associated with the substrate surface F2 side of the root node NR and recorded in the inspection instruction information D2 (Step S403), and then the process shifts to step S26 (FIG. 10).

目前,於藉由步驟S401而群組化的群組中,不存在具有未被選擇為第一選擇導電部的導電部P的群組,因此檢查指示資訊產生部31直接將處理朝步驟S26(圖10)轉移。At present, among the groups grouped by step S401, there is no group having the conductive part P that is not selected as the first selected conductive part, so the inspection instruction information generating part 31 directly proceeds to step S26 ( Figure 10) Transfer.

再者,檢查指示資訊產生部31亦能夠以包含於步驟S401中所選擇的所有導電部P的方式選擇多對導電部P,並作為多對第一選擇導電部與根節點NR的基板面F2側建立對應而記錄於檢查指示資訊D2,而代替執行步驟S402、步驟S403。Furthermore, the inspection instruction information generating section 31 can also select multiple pairs of conductive sections P in such a manner as to include all the conductive sections P selected in step S401, and serve as multiple pairs of first selected conductive sections and the substrate surface F2 of the root node NR The side establishes a correspondence and records it in the inspection instruction information D2, instead of performing steps S402 and S403.

於此情況下,於後述的利用檢查處理部21的檢查中,同時朝與根節點NR的基板面F2側建立了對應的多對第一選擇導電部供給電流,並進行檢查。若同時朝多對導電部P供給電流,則產生電流路徑的重覆。但是,根節點NR即面狀導體IP的電阻與配線W相比非常小,因此即便是於面狀導體IP中產生了電流路徑的重覆的情況,對電壓的測定結果造成的影響亦小。In this case, in the inspection by the inspection processing unit 21 described later, a plurality of pairs of first selection conductive portions corresponding to the substrate surface F2 side of the root node NR are simultaneously supplied with current, and the inspection is performed. If current is supplied to the plurality of pairs of conductive portions P at the same time, a repeat of the current path occurs. However, the root node NR, that is, the resistance of the planar conductor IP is very small compared to the wiring W. Therefore, even if the current path overlaps in the planar conductor IP, the influence on the voltage measurement result is small.

因此,以包含於步驟S401中所選擇的所有導電部P的方式選擇多對導電部P,並作為多對第一選擇導電部與根節點NR的基板面F2側建立對應而記錄於檢查指示資訊D2,而代替執行步驟S402、步驟S403,藉此於後述的利用檢查處理部21的檢查中,可同時朝多對第一選擇導電部供給電流,而縮短檢查時間。Therefore, a plurality of pairs of conductive portions P are selected in such a manner as to include all the conductive portions P selected in step S401, and are recorded in the inspection instruction information as a plurality of pairs of the first selected conductive portions are associated with the substrate surface F2 side of the root node NR D2, instead of performing Steps S402 and S403, during the inspection by the inspection processing section 21 described later, current can be supplied to a plurality of pairs of first selection conductive portions at the same time, thereby shortening the inspection time.

另一方面,當導體層Lc未鄰接於第二選擇層LL2的遠離基板面F2之側時(步驟S18中為否),檢查指示資訊產生部31選擇鄰接於第二選擇層LL2的遠離基板面F2之側的配線層L作為新的第二選擇層LL2(步驟S21:(g)工序)。藉此,將新的第二選擇層LL2作為處理對象而執行步驟S22~步驟S24。On the other hand, when the conductor layer Lc is not adjacent to the side of the second selection layer LL2 far away from the substrate surface F2 (No in step S18), the inspection instruction information generating section 31 selects the surface far away from the substrate surface adjacent to the second selection layer LL2 The wiring layer L on the side of F2 serves as a new second selection layer LL2 (step S21: (g) step). With this, steps S22 to S24 are executed with the new second selection layer LL2 as the processing target.

繼而,檢查指示資訊產生部31根據導電結構資訊D1'',對應於第二選擇層LL2的各節點N,針對與其中一個節點N的遠離根節點NR之側連接的一個分支M(通孔V),選擇一個在與所述節點N相反側進行電性連接,即導通的基板面F2的導電部P。而且,檢查指示資訊產生部31針對對應的各節點N,將經選擇的導電部P群組化(步驟S22:(g1)工序)。Then, the inspection instruction information generating section 31 corresponds to each node N of the second selection layer LL2 according to the conductive structure information D1'', for a branch M (through hole V) connected to the side of one of the nodes N away from the root node NR ), select a conductive portion P on the substrate surface F2 that is electrically connected to the opposite side of the node N, that is, to conduct. Then, the inspection instruction information generating unit 31 groups the selected conductive parts P for each corresponding node N (step S22: (g1) process).

繼而,檢查指示資訊產生部31針對藉由步驟S22而群組化的各群組,自該各群組中所包含的導電部P中選擇任意的兩個導電部作為一對第一選擇導電部,並與第二選擇層LL2建立對應而記錄於檢查指示資訊D2(步驟S23:(g2)工序的(b)工序)。Then, the inspection instruction information generating section 31 selects any two conductive sections from the conductive sections P included in each group as a pair of first selection conductive sections for each group grouped in step S22 , And corresponding to the second selection layer LL2 and recorded in the inspection instruction information D2 (step S23: (g2) process (b) process).

繼而,當於藉由步驟S22而群組化的群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與第二選擇層LL2建立對應而記錄於檢查指示資訊D2(步驟S24:(g2)工序的(b)工序),然後朝步驟S26(圖10)轉移。Then, when there is a group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S22, the check instruction information generating part 31 selects for the group The two conductive portions P including the conductive portion P that is not selected as the first selected conductive portion serve as a pair of second selected conductive portions and are associated with the second selected layer LL2 and recorded in the inspection instruction information D2 (step S24 : (G2) step (b) step), and then move to step S26 (FIG. 10).

另一方面,當於藉由步驟S22而群組化的群組中,不存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31直接自步驟S23朝步驟S26(圖10)轉移。On the other hand, when there is no group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S22, the check instruction information generating part 31 directly from step S23 Move to step S26 (FIG. 10).

於圖6中所示的例子中,目前,即於對應於配線層L2與面狀導體IP的基板面F2側的處理中,不存在具有未被選擇為第一選擇導電部的導電部P的群組,因此檢查指示資訊產生部31不進行檢查指示資訊D2的記錄而將處理自步驟S23朝步驟S26(圖10)轉移。In the example shown in FIG. 6, at present, there is no conductive portion P having the conductive portion P that is not selected as the first selected conductive portion in the processing corresponding to the wiring layer L2 and the substrate surface F2 side of the planar conductor IP For the group, the inspection instruction information generating unit 31 does not record the inspection instruction information D2 and shifts the process from step S23 to step S26 (FIG. 10 ).

繼而,檢查指示資訊產生部31對是否已產生對應於所有配線層L與面狀導體IP的基板面F1、基板面F2側的檢查指示資訊D2進行核查(步驟S26)。Then, the inspection instruction information generating unit 31 checks whether inspection instruction information D2 corresponding to the substrate surface F1 and the substrate surface F2 side of all the wiring layers L and the planar conductor IP has been generated (step S26).

當已產生對應於所有配線層L與面狀導體IP的基板面F1、基板面F2側的檢查指示資訊D2時(步驟S26中為是),將處理朝步驟S27轉移。另一方面,當仍然殘存未產生對應的檢查指示資訊D2的配線層L或面狀導體IP的基板面F1、基板面F2側時(步驟S26中為否),將處理朝步驟S11(圖8)轉移。When the inspection instruction information D2 corresponding to the substrate surface F1 and the substrate surface F2 side of all the wiring layers L and the planar conductor IP has been generated (YES in step S26), the process is shifted to step S27. On the other hand, when the wiring layer L or the substrate surface F1 of the planar conductor IP that does not produce the corresponding inspection instruction information D2 still remains (NO in step S26), the process proceeds to step S11 (FIG. 8 ) Transfer.

於步驟S11中,檢查指示資訊產生部31對導體層Lc是否鄰接於第一選擇層LL1的遠離基板面F1之側進行核查(步驟S11)。於圖6中所示的例子中,目前,第一選擇層LL1為配線層L2。導體層Lc鄰接於配線層L2的遠離基板面F1之側(步驟S11中為是),因此檢查指示資訊產生部31將旗標Fip1設為1(步驟S12),並將處理朝步驟S301(圖12)轉移。In step S11, the inspection instruction information generating section 31 checks whether the conductor layer Lc is adjacent to the side of the first selection layer LL1 away from the substrate surface F1 (step S11). In the example shown in FIG. 6, at present, the first selection layer LL1 is the wiring layer L2. The conductor layer Lc is adjacent to the side of the wiring layer L2 away from the substrate surface F1 (YES in step S11), so the inspection instruction information generating section 31 sets the flag Fip1 to 1 (step S12), and moves the processing to step S301 (FIG. 12) Transfer.

於步驟S301中,檢查指示資訊產生部31針對與根節點NR(面狀導體IP)的基板面F1側連接的各分支M(通孔V),選擇一個在與根節點NR相反側進行導通的導電部P,藉此將該經選擇的導電部P作為與根節點NR的基板面F1側對應的導電部而群組化(步驟S301:(h)工序)。In step S301, the inspection instruction information generating section 31 selects one of the branches M (through holes V) connected to the substrate surface F1 side of the root node NR (planar conductor IP) to conduct on the side opposite to the root node NR The conductive portion P thereby groups the selected conductive portion P as a conductive portion corresponding to the substrate surface F1 side of the root node NR (step S301: (h) step).

於圖6中所示的例子中,於根節點NR的基板面F1側連接有分支Mr1、分支Mr2、分支Mr3、分支Mr4。作為與分支Mr1導通的導電部P,有導電部P1、導電部P2。作為與分支Mr2導通的導電部P,有導電部P3、導電部P4、導電部P5。作為與分支Mr3導通的導電部P,有導電部P6。作為與分支Mr4導通的導電部P,有導電部P7。In the example shown in FIG. 6, the branch Mr1, the branch Mr2, the branch Mr3, and the branch Mr4 are connected to the substrate surface F1 side of the root node NR. As the conductive portion P that is in conduction with the branch Mr1, there are a conductive portion P1 and a conductive portion P2. As the conductive portion P that is in conduction with the branch Mr2, there are a conductive portion P3, a conductive portion P4, and a conductive portion P5. As the conductive portion P that is in conduction with the branch Mr3, there is a conductive portion P6. As the conductive portion P that is in conduction with the branch Mr4, there is a conductive portion P7.

因此,於步驟S301中,自導電部P1、導電部P2中選擇任意的一個,例如導電部P1,自導電部P3、導電部P4、導電部P5中選擇任意的一個,例如導電部P3,進而選擇導電部P6、導電部P7。藉此,將導電部P1、導電部P3、導電部P6、導電部P7群組化。Therefore, in step S301, any one of the conductive part P1 and the conductive part P2 is selected, for example, the conductive part P1, and any one of the conductive part P3, the conductive part P4, and the conductive part P5 is selected, for example, the conductive part P3, and The conductive part P6 and the conductive part P7 are selected. Thereby, the conductive portion P1, the conductive portion P3, the conductive portion P6, and the conductive portion P7 are grouped.

繼而,檢查指示資訊產生部31自藉由步驟S301而群組化的導電部P中選擇任意的兩個導電部P作為一對第一選擇導電部,並與根節點NR的基板面F1側建立對應而記錄於檢查指示資訊D2(步驟S302:(h)工序)。Then, the inspection instruction information generating section 31 selects any two conductive sections P from the conductive sections P grouped in step S301 as a pair of first selection conductive sections, and establishes it with the substrate surface F1 side of the root node NR Correspondingly, it is recorded in the inspection instruction information D2 (step S302: (h) process).

於圖6中所示的例子中,自藉由步驟S301而群組化的導電部P1、導電部P3、導電部P6、導電部P7中選擇任意的兩個導電部P,例如導電部P1、導電部P3作為一對第一選擇導電部。In the example shown in FIG. 6, any two conductive portions P are selected from the conductive portion P1, the conductive portion P3, the conductive portion P6, and the conductive portion P7 grouped by step S301, for example, the conductive portion P1 The conductive portion P3 serves as a pair of first selective conductive portions.

繼而,當於藉由步驟S301而群組化的群組中,存在具有未被選擇為第一選擇導電部的導電部P的群組時,檢查指示資訊產生部31針對所述群組,選擇包含所述未被選擇為第一選擇導電部的導電部P的兩個導電部P作為一對第二選擇導電部,並與根節點NR的基板面F1側建立對應而記錄於檢查指示資訊D2(步驟S303),然後將處理朝步驟S17(圖9)轉移。Then, when there is a group having the conductive part P that is not selected as the first selection conductive part in the group grouped by step S301, the check instruction information generating part 31 selects for the group The two conductive portions P including the conductive portion P that is not selected as the first selected conductive portion serve as a pair of second selected conductive portions and are associated with the substrate surface F1 side of the root node NR and recorded in the inspection instruction information D2 (Step S303), and then the process shifts to step S17 (FIG. 9).

於步驟S302中,藉由步驟S301而群組化的導電部P1、導電部P3、導電部P6、導電部P7之中,導電部P6、導電部P7未被選擇為第一選擇導電部,因此檢查指示資訊產生部31針對具有未被選擇為第一選擇導電部的導電部P的導電部P1、導電部P3、導電部P6、導電部P7的群組,選擇包含所述未被選擇為第一選擇導電部的導電部P6、導電部P7的兩個導電部P作為一對第二選擇導電部,於此情況下,選擇導電部P6、導電部P7作為一對第二選擇導電部(步驟S303)。In step S302, among the conductive portion P1, the conductive portion P3, the conductive portion P6, and the conductive portion P7 grouped by the step S301, the conductive portion P6 and the conductive portion P7 are not selected as the first selection conductive portion, so The inspection instruction information generating section 31 selects the group including the conductive section P1, the conductive section P3, the conductive section P6, and the conductive section P7 having the conductive section P not selected as the first selection conductive section, A conductive part P6 of the selective conductive part and two conductive parts P of the conductive part P7 serve as a pair of second selective conductive parts. In this case, the conductive part P6 and the conductive part P7 are selected as a pair of second selective conductive parts (step S303).

於步驟S303中,例如於群組中所包含的導電部為導電部P1、導電部P3、導電部P6這三個導電部,未被選擇為第一選擇導電部的導電部僅導電部P6這一個的情況下,選擇導電部P6與導電部P1、導電部P3中的任一個作為一對第二選擇導電部。In step S303, for example, the conductive parts included in the group are the conductive part P1, the conductive part P3, and the conductive part P6, and the conductive part not selected as the first selected conductive part is only the conductive part P6. In the case of one, any one of the conductive portion P6, the conductive portion P1, and the conductive portion P3 is selected as a pair of second selected conductive portions.

再者,與所述步驟S402、步驟S403同樣地,檢查指示資訊產生部31亦能夠以包含於步驟S301中所選擇的所有導電部P的方式選擇多對導電部P,並作為多對第一選擇導電部與根節點NR的基板面F1側建立對應而記錄於檢查指示資訊D2,而代替執行步驟S302、步驟S303工序。例如,檢查指示資訊產生部31亦可自藉由步驟S301而群組化的導電部P1、導電部P3、導電部P6、導電部P7中,使導電部P1、導電部P3與導電部P6、導電部P7分別成對,並將導電部P1、導電部P3與導電部P6、導電部P7作為多對第一選擇導電部與根節點NR的基板面F1側建立對應而記錄於檢查指示資訊D2。In addition, similar to the above steps S402 and S403, the inspection instruction information generating unit 31 can also select multiple pairs of conductive parts P in a manner including all the conductive parts P selected in step S301, and serve as the first Instead of performing steps S302 and S303, the selected conductive portion is associated with the substrate surface F1 side of the root node NR and recorded in the inspection instruction information D2. For example, the inspection instruction information generating section 31 may also make the conductive section P1, the conductive section P3, and the conductive section P6 from the conductive section P1, the conductive section P3, the conductive section P6, and the conductive section P7 grouped in step S301. The conductive portions P7 are paired, and the conductive portion P1, the conductive portions P3 and the conductive portions P6, and the conductive portion P7 are associated with the plurality of pairs of first selected conductive portions and the substrate surface F1 side of the root node NR and recorded in the inspection instruction information D2 .

繼而,於步驟S17(圖9)中,目前旗標Fip2為1,因此檢查指示資訊產生部31將處理朝步驟S26(圖10)轉移。Then, in step S17 (FIG. 9 ), the current flag Fip2 is 1, so the inspection instruction information generating unit 31 shifts the process to step S26 (FIG. 10 ).

於步驟S26中,針對所有配線層L與面狀導體IP的基板面F1、基板面F2側,已執行步驟S5~步驟S403的處理(步驟S26中為是),因此進而為了防止檢查部位的遺漏而執行第二工序(步驟S27)。In step S26, the processes from step S5 to step S403 have been performed on all the wiring layers L and the substrate surface F1 and the substrate surface F2 side of the planar conductor IP (Yes in step S26), so in order to prevent the omission of the inspection site Instead, the second process is performed (step S27).

參照圖14,檢查指示資訊產生部31探索未被於步驟S1~步驟S403中所選擇的第一選擇導電部的對及第二選擇導電部的對的任一對包夾的配線W(步驟S501:(j)工序)。Referring to FIG. 14, the inspection instruction information generating unit 31 searches for any pair of wires W sandwiched between the pair of the first selection conductive part and the pair of the second selection conductive part that are not selected in steps S1 to S403 (step S501 : (J) Process).

於圖6中所示的例子中,於步驟S1~步驟S403中,選擇導電部對P1、P2,導電部對P1、P3,導電部對P3、P4,導電部對P4、P5,導電部對P11、P12,導電部對P11、P15,導電部對P15、P16作為第一選擇導電部的對,並選擇導電部對P6、P7,導電部對P13、P14,導電部對P16、P17作為第二選擇導電部的對。In the example shown in FIG. 6, in steps S1 to S403, the pair of conductive parts P1, P2, the pair of conductive parts P1, P3, the pair of conductive parts P3, P4, the pair of conductive parts P4, P5, the pair of conductive parts P11, P12, conductive part pair P11, P15, conductive part pair P15, P16 as the first selected conductive part pair, and select conductive part pair P6, P7, conductive part pair P13, P14, conductive part pair P16, P17 as the first Second, select the pair of conductive parts.

於是,於基板面F1側,連成一串地連續選擇導電部P1~導電部P7作為第一選擇導電部及第二選擇導電部,因此不存在未被第一選擇導電部的對及第二選擇導電部的對的任一對包夾的配線W。另一方面,於基板面F2側,導電部對P11、P12與導電部對P13、P14之間變得不連續。Therefore, on the substrate surface F1 side, the conductive portions P1 to P7 are continuously selected as a first selection conductive portion and a second selection conductive portion in series, so there is no pair and second selection that are not the first selection conductive portion Wiring W sandwiched between any pair of pairs of conductive portions. On the other hand, on the substrate surface F2 side, the pair of conductive portions P11 and P12 and the pair of conductive portions P13 and P14 become discontinuous.

圖15是用於說明第二工序的說明圖。圖15將圖5的導電部P11~導電部P14附近部分地放大表示。15 is an explanatory diagram for explaining the second step. FIG. 15 is a partially enlarged view of the vicinity of the conductive portion P11 to the conductive portion P14 of FIG. 5.

於圖6、圖15中所示的例子中,於步驟S1~步驟S403中,選擇導電部對P11、P12與導電部對P13、P14作為第一選擇導電部的對及第二選擇導電部的對,但未選擇導電部對P12、P13。其結果,圖15中所示的配線W42未被第一選擇導電部的對及第二選擇導電部的對的任一對包夾。In the examples shown in FIGS. 6 and 15, in steps S1 to S403, the pair of conductive portions P11, P12 and the pair of conductive portions P13, P14 are selected as the pair of the first selected conductive portion and the pair of the second selected conductive portion Yes, but the conductive part pairs P12 and P13 are not selected. As a result, the wiring W42 shown in FIG. 15 is not sandwiched by any of the pair of the first selection conductive portion and the pair of the second selection conductive portion.

繼而,檢查指示資訊產生部31對有無符合的配線W進行核查(步驟S503),若存在符合的配線W(步驟S503中為是),則朝步驟S504轉移。另一方面,若不存在符合的配線W(步驟S503中為否),則檢查指示資訊產生部31結束處理。於圖6中所示的例子中,配線W42符合。Then, the inspection instruction information generating unit 31 checks whether or not there is a matching wire W (step S503), and if there is a matching wire W (YES in step S503), the process moves to step S504. On the other hand, if there is no matching wire W (NO in step S503), the inspection instruction information generating section 31 ends the processing. In the example shown in FIG. 6, the wiring W42 matches.

於步驟S504中,檢查指示資訊產生部31將與符合的配線W的一端不經由該配線W而導通的導電部P、及與該配線W的另一端不經由該配線W而導通的導電部P作為應與第一選擇導電部不同時地進行檢查的一對第三選擇導電部,記錄於檢查指示資訊D2(步驟S504:(k)工序)。In step S504, the inspection instruction information generating section 31 connects one end of the matching wire W without conducting through the wire W, and the other end with the conducting wire P without conducting through the wire W As a pair of third selection conductive portions that should be inspected at different times from the first selection conductive portion, it is recorded in the inspection instruction information D2 (step S504: (k) step).

於圖15中所示的例子中,例如選擇與符合的配線W42的一端T1不經由配線W42而導通的導電部P12、及與配線W42的另一端T2不經由配線W42而導通的導電部P13作為一對第三選擇導電部(步驟S504)。In the example shown in FIG. 15, for example, a conductive portion P12 that matches one end T1 of the wiring W42 without conducting through the wiring W42, and a conductive portion P13 that does not conduct with the other end T2 of the wiring W42 through the wiring W42 are selected as A pair of third selection conductive portions (step S504).

繼而,檢查指示資訊產生部31對基板B是否包括多個導體層Lc進行核查(步驟S505),當存在多個導體層Lc時(步驟S505中為是),朝步驟S506轉移。另一方面,若不存在多個導體層Lc(步驟S505中為否),則檢查指示資訊產生部31結束處理。Then, the check instruction information generating section 31 checks whether the substrate B includes a plurality of conductor layers Lc (step S505), and when there are a plurality of conductor layers Lc (YES in step S505), the process moves to step S506. On the other hand, if there are no multiple conductor layers Lc (NO in step S505), the inspection instruction information generating unit 31 ends the process.

於步驟S506中,檢查指示資訊產生部31對有無將多個導體層Lc的面狀導體IP彼此連接的通孔V進行核查(步驟S506)。而且,若存在該通孔V(步驟S506中為是),則朝步驟S507轉移。另一方面,若不存在該通孔V(步驟S506中為否),則檢查指示資訊產生部31結束處理。In step S506, the inspection instruction information generating section 31 checks whether there is a through-hole V connecting the planar conductors IP of the plurality of conductor layers Lc to each other (step S506). And if there is this through-hole V (YES in step S506), it will transfer to step S507. On the other hand, if the through hole V does not exist (NO in step S506), the inspection instruction information generating unit 31 ends the processing.

圖17中所示的基板B包括兩個導體層Lc,且設置有將兩個導體層Lc的面狀導體IP彼此連接的通孔Vc。為了檢查通孔Vc的導通,必須使電流流入基板面F1的導電部P與基板面F2的導電部P之間。The substrate B shown in FIG. 17 includes two conductor layers Lc, and is provided with a through hole Vc that connects the planar conductors IP of the two conductor layers Lc to each other. In order to check the conduction of the via hole Vc, it is necessary to allow current to flow between the conductive portion P of the substrate surface F1 and the conductive portion P of the substrate surface F2.

因此,於步驟S507中,檢查指示資訊產生部31將基板面F1的導電部P中的一個、及基板面F2的導電部P中的一個作為應與第一選擇導電部不同時地進行檢查的一對第四選擇導電部,記錄於檢查指示資訊D2(步驟S507:(l)工序),並結束處理。Therefore, in step S507, the inspection instruction information generating section 31 regards one of the conductive portions P of the substrate surface F1 and one of the conductive portions P of the substrate surface F2 as the inspection that should not be performed at the same time as the first selected conductive portion A pair of fourth selection conductive parts are recorded in the inspection instruction information D2 (step S507: (1) process), and the process is ended.

將一對第四選擇導電部記錄於檢查指示資訊D2,其結果,基板檢查裝置2可藉由基於檢查指示資訊D2的檢查,而檢查通孔Vc。A pair of fourth selected conductive portions is recorded in the inspection instruction information D2. As a result, the substrate inspection device 2 can inspect the through hole Vc by inspection based on the inspection instruction information D2.

另外,藉由步驟S1~步驟S507所選擇的第一選擇導電部、第二選擇導電部、第三選擇導電部、及第四選擇導電部之中,只有用於檢查通孔Vc的第四選擇導電部選擇基板面F1的導電部P與基板面F2的導電部P作為檢查對象的一對導電部P,將自基板B的兩面選擇一對導電部P設為必要最小限度。In addition, among the first selection conductive portion, the second selection conductive portion, the third selection conductive portion, and the fourth selection conductive portion selected in step S1 to step S507, only the fourth selection for inspecting the via Vc The conductive portion selects the conductive portion P of the substrate surface F1 and the conductive portion P of the substrate surface F2 as the pair of conductive portions P to be inspected, and the selection of the pair of conductive portions P from both sides of the substrate B is set to the minimum necessary.

於使電流流入基板B的一對導電部P之間並測定其電壓,藉此進行檢查的情況下,外來電磁場作為雜訊而與檢測電壓重疊。於基板B的一側的面內,以大致相同的方式施加外來電磁場,因此於基板B的一側的面側,由外來電磁場所引起的雜訊電壓變得大致固定。因此,於測定基板B的一側的面內的一對導電部P之間的電壓的情況下,與所述測定電壓重疊的雜訊變成共同模式(common mode),其結果,雜訊對測定電壓造成的影響減少。When an electric current flows between the pair of conductive portions P of the substrate B and the voltage is measured for inspection, the external electromagnetic field overlaps the detection voltage as noise. In the surface on one side of the substrate B, an external electromagnetic field is applied in substantially the same manner, so on the surface side on the side of the substrate B, the noise voltage caused by the external electromagnetic field becomes substantially fixed. Therefore, when measuring the voltage between the pair of conductive portions P on one side of the substrate B, the noise overlapping the measurement voltage becomes a common mode, and as a result, the noise The effect of voltage is reduced.

另一方面,於基板B的兩面間,在基板B的表背所施加的電磁場強度產生差,於基板B的一側的面與另一側的面,由外來電磁場所引起的雜訊電壓產生差。因此,於橫跨基板B的兩面測定一對導電部P之間的電壓的情況下,與所述測定電壓重疊的雜訊變成正常模式(normal mode),其結果,雜訊電壓直接與測定電壓重疊。其結果,與測定基板B的一側的面內的一對導電部P之間的電壓的情況相比,橫跨基板B的兩面測定一對導電部P之間的電壓時雜訊的影響變大。On the other hand, between the two surfaces of the substrate B, the intensity of the electromagnetic field applied to the front and back of the substrate B is poor, and the noise voltage caused by the external electromagnetic field is generated on one side and the other side of the substrate B difference. Therefore, when the voltage between the pair of conductive portions P is measured across both sides of the substrate B, the noise overlapping the measured voltage becomes a normal mode, and as a result, the noise voltage directly matches the measured voltage overlapping. As a result, the influence of noise changes when the voltage between the pair of conductive portions P is measured across both sides of the substrate B compared to the case of measuring the voltage between the pair of conductive portions P on the side of the substrate B Big.

根據步驟S1~步驟S507,將橫跨基板B的兩面間的導電部P設為為了檢查通孔Vc而需要的最小限度的第四選擇導電部,除此以外,將基板B的一側的面內的導電部P設為第一選擇導電部的對、第二選擇導電部的對、及第三選擇導電部的對,因此進行了基於檢查指示資訊D2的檢查的情況下的雜訊的影響減少。According to step S1 to step S507, the conductive portion P across the two sides of the substrate B is set as the minimum fourth selected conductive portion required for inspection of the through-hole Vc, and besides that, the surface on the side of the substrate B The inner conductive part P is set as the pair of the first selection conductive part, the pair of the second selection conductive part, and the pair of the third selection conductive part, so the influence of noise when the inspection based on the inspection instruction information D2 is performed cut back.

另外,當於基板B的兩面間檢查通孔時,必須使測定治具4U的探針Pr接觸基板B的基板面F1的導電部P,使測定治具4L的探針Pr接觸基板B的基板面F2的導電部P。此時,於測定治具4U的探針Pr與測定治具4L的探針Pr的任一者產生了接觸不良的情況下,無法確定於哪一個探針Pr中產生了接觸不良。In addition, when inspecting the through holes between the two surfaces of the substrate B, the probe Pr of the measuring jig 4U must be in contact with the conductive portion P of the substrate surface F1 of the substrate B, and the probe Pr of the measuring jig 4L can be in contact with the substrate of the substrate B The conductive portion P of the surface F2. At this time, when any of the probe Pr of the measuring jig 4U and the probe Pr of the measuring jig 4L has poor contact, it is not possible to determine in which probe Pr the poor contact has occurred.

因此,使兩個測定治具的探針Pr暫時自基板B分離,然後再次使兩個測定治具的探針Pr接觸基板B,進行再檢查。必須於接觸基板B的兩面的兩個測定治具的探針Pr均正常地接觸導電部P之前,將此種再檢查重覆多次。若如此重覆相對於導電部P的探針Pr的分離、接觸,則檢查時間延長,且容易對導電部P造成損傷。Therefore, the probes Pr of the two measuring jigs are temporarily separated from the substrate B, and then the probes Pr of the two measuring jigs are brought into contact with the substrate B again to perform re-inspection. It is necessary to repeat this re-inspection multiple times before the probes Pr of the two measuring jigs contacting both sides of the substrate B normally contact the conductive portion P. If the separation and contact of the probe Pr with respect to the conductive portion P are repeated in this manner, the inspection time is prolonged, and the conductive portion P is easily damaged.

根據步驟S1~步驟S507,將橫跨基板B的兩面間的導電部P的檢查設為最小限度,大部分變成設置於基板B的一面的導電部P彼此的檢查,因此減少由接觸不良所導致的再檢查,容易減少對導電部P造成損傷之虞。According to steps S1 to S507, the inspection of the conductive portion P across the two sides of the substrate B is minimized, and most of them become the inspection of the conductive portions P provided on one side of the substrate B, thereby reducing the cause of poor contact The re-inspection of is easy to reduce the risk of damage to the conductive part P.

以上,檢查指示資訊產生裝置3可藉由步驟S1~步驟S507的處理,而產生檢查指示資訊D2。另外,根據步驟S1~步驟S507,針對對應的各基板面,已被記錄於檢查指示資訊D2的順序與應使基板檢查裝置2執行檢查的導電部對的順序對應。具體而言,自與接近基板面F1、基板面F2的層對應者起,依次記錄於檢查指示資訊D2。As described above, the inspection instruction information generating device 3 can generate inspection instruction information D2 through the processes of steps S1 to S507. In addition, according to step S1 to step S507, the order in which the inspection instruction information D2 has been recorded for each corresponding substrate surface corresponds to the order of the pair of conductive parts that should cause the substrate inspection apparatus 2 to perform inspection. Specifically, the inspection instruction information D2 is sequentially recorded from the layer corresponding to the substrate surface F1 and the substrate surface F2.

藉由利用檢查指示資訊產生部31所進行的步驟S15、步驟S16、步驟S23、步驟S24、步驟S102、步驟S103、步驟S105、步驟S106、步驟S302、步驟S303、步驟S402、步驟S403、步驟S504、步驟S507的處理,而將作為檢查對象的各導電部對與基板面,層,及第一選擇導電部、第二選擇導電部、第三選擇導電部、第四選擇導電部的類別建立對應,產生圖18中所示的檢查指示資訊D2。此處,「層」表示配線層L及導體層Lc的各層。Step S15, Step S16, Step S23, Step S24, Step S102, Step S103, Step S105, Step S106, Step S302, Step S303, Step S402, Step S403, Step S504 by the inspection instruction information generating unit 31 , The process of step S507, and each conductive part pair to be inspected is associated with the substrate surface, the layer, and the types of the first selection conductive part, the second selection conductive part, the third selection conductive part, and the fourth selection conductive part , The inspection instruction information D2 shown in FIG. 18 is generated. Here, "layer" means each layer of the wiring layer L and the conductor layer Lc.

於圖18中,將基板面F1與五個導電部對建立對應,以自上而下的順序,表示應執行檢查的順序。同樣地,將基板面F2與六個導電部對建立對應,以自上而下的順序,表示應執行檢查的順序。In FIG. 18, the substrate surface F1 is associated with the five conductive portion pairs, and the order in which the inspection should be performed is indicated in the order of top-down. Similarly, the substrate surface F2 is associated with the six conductive portion pairs, and the order in which the inspection should be performed is indicated in a top-down order.

藉由例如省略圖示的通信電路來將以所述方式獲得的檢查指示資訊D2發送至基板檢查裝置2,或者將檢查指示資訊D2儲存於USB記憶體等儲存媒體,並使基板檢查裝置2讀入該儲存媒體,藉此將檢查指示資訊D2儲存於儲存部22。The inspection instruction information D2 obtained in the above manner is sent to the substrate inspection device 2 by, for example, a communication circuit omitting the illustration, or the inspection instruction information D2 is stored in a storage medium such as a USB memory, and the substrate inspection device 2 is read This storage medium is inserted to store the inspection instruction information D2 in the storage unit 22.

繼而,對所述基板檢查裝置2的運作進行說明。以下,以於儲存部22中儲存有圖18中所示的檢查指示資訊D2的情況為例進行說明。Next, the operation of the substrate inspection device 2 will be described. Hereinafter, the case where the inspection instruction information D2 shown in FIG. 18 is stored in the storage unit 22 will be described as an example.

參照圖19,檢查處理部21根據檢查指示資訊D2,選擇基板面F1側的各層之中,順序最前的層作為檢查層LT1(步驟S51)。於圖18中所示的例子中,與基板面F1建立了對應的順序最前(最上方)的層為配線層L1,因此將配線層L1作為檢查層LT1。Referring to FIG. 19, based on the inspection instruction information D2, the inspection processing unit 21 selects the layer with the highest order among the layers on the substrate surface F1 side as the inspection layer LT1 (step S51 ). In the example shown in FIG. 18, the first (topmost) layer in the order corresponding to the substrate surface F1 is the wiring layer L1, and therefore the wiring layer L1 is used as the inspection layer LT1.

繼而,檢查處理部21根據檢查指示資訊D2,選擇基板面F2側的各層之中,順序最前的層作為檢查層LT2(步驟S52)。於圖18中所示的例子中,與基板面F2建立了對應的順序最前(最上方)的層為配線層L4,因此將配線層L4作為檢查層LT2。Then, based on the inspection instruction information D2, the inspection processing unit 21 selects the layer with the highest order among the layers on the substrate surface F2 side as the inspection layer LT2 (step S52). In the example shown in FIG. 18, the first (uppermost) layer in the order corresponding to the substrate surface F2 is the wiring layer L4, so the wiring layer L4 is used as the inspection layer LT2.

繼而,檢查處理部21針對檢查層LT1、檢查層LT2的第一選擇導電部的導電部對,執行使測定用電流同時流入成對的導電部間的第一電流供給處理(步驟S53:(c1)工序)。於圖18中所示的例子中,目前檢查層LT1為配線層L1,檢查層LT2為配線層L4,因此檢查處理部21針對作為配線層L1、配線層L4的第一選擇導電部的導電部對P1、P2,導電部對P4、P5,導電部對P11、P12,導電部對P15、P16,同時流入測定用電流。Then, the inspection processing unit 21 executes a first current supply process that simultaneously causes the measurement current to flow between the paired conductive portions for the conductive portion pair of the first selection conductive portion of the inspection layer LT1 and the inspection layer LT2 (step S53: (c1 ) Process). In the example shown in FIG. 18, the inspection layer LT1 is currently the wiring layer L1, and the inspection layer LT2 is the wiring layer L4. Therefore, the inspection processing section 21 is directed to the conductive portion that is the first selective conductive portion of the wiring layer L1 and the wiring layer L4. For P1 and P2, the pair of conductive parts P4 and P5, the pair of conductive parts P11 and P12, and the pair of conductive parts P15 and P16 flow simultaneously with the measurement current.

繼而,檢查處理部21檢測檢查層LT1、檢查層LT2的第一選擇導電部的導電部對間的電壓,並根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S54:(c1)工序)。Then, the inspection processing section 21 detects the voltage between the pair of conductive sections of the first selection conductive section of the inspection layer LT1 and the inspection layer LT2, and checks the through-hole V of the current path between the conductive sections based on the voltage and the measurement current And wiring W (step S54: (c1) process).

於圖18的例子中,檢查處理部21使電流分別流入導電部對P1、P2,導電部對P4、P5,導電部對P11、P12,導電部對P15、P16的各對間,並檢測各對間的電壓。而且,檢查處理部21例如使所述各對間的電壓除以流入各對間的電流,藉此算出各對間的電阻值。檢查處理部21將已算出的各電阻值與例如事先儲存於儲存部22的基準值進行比較,若各電阻值為基準值以下,則將基板B判定為良好,若各電阻值超過基準值,則將基板B判定為不良。In the example of FIG. 18, the inspection processing unit 21 causes current to flow into the pair of conductive parts P1, P2, the pair of conductive parts P4, P5, the pair of conductive parts P11, P12, the pair of conductive parts P15, P16, and detects each Pair voltage. Further, the inspection processing unit 21 divides the voltage between the pairs by the current flowing into the pairs, for example, thereby calculating the resistance value between the pairs. The inspection processing unit 21 compares each calculated resistance value with, for example, a reference value previously stored in the storage unit 22, and if each resistance value is less than the reference value, the substrate B is judged to be good, and if each resistance value exceeds the reference value, Then, the substrate B is judged to be defective.

於步驟S54中,檢查處理部21藉由顯示於例如省略圖示的顯示裝置等報告部等方法,對使用者報告其判定結果。再者,檢查處理部21亦可不必對使用者報告判定結果。In step S54, the inspection processing unit 21 reports the determination result to the user by a method such as a display unit such as a display device (not shown). Furthermore, the inspection processing unit 21 does not need to report the determination result to the user.

於步驟S54中,檢查通孔V及配線W,所述通孔V與成為已被選擇為第一選擇導電部的導電部對P1、P2,導電部對P4、P5,導電部對P11、P12,及導電部對P15、P16的各對間的電流路徑的分支M11、分支M12、分支M13、分支M14、分支M41、分支M42、分支M45、分支M46對應,所述配線W與節點N11、節點N12、節點N41、節點N42對應。In step S54, the through-hole V and the wiring W are inspected, the through-hole V and the conductive part pair P1, P2, the conductive part pair P4, P5, and the conductive part pair P11, P12 that have been selected as the first selection conductive part , And the branch M11, branch M12, branch M13, branch M14, branch M41, branch M42, branch M45, branch M46 of the current path between the pair of conductive parts P15, P16, the wiring W corresponds to the node N11, node N12, node N41, and node N42 correspond.

於步驟S53中,可使電流同時流入已被選擇為第一選擇導電部的導電部對P1、P2,導電部對P4、P5,導電部對P11、P12,及導電部對P15、P16的各對間,並測定各對間的電壓,因此容易縮短基板的檢查時間。In step S53, current can be simultaneously flowed into the pair of conductive parts P1, P2, the pair of conductive parts P4, P5, the pair of conductive parts P11, P12, and the pair of conductive parts P15, P16 that have been selected as the first selection conductive part The voltage between each pair is measured, so it is easy to shorten the inspection time of the substrate.

另外,假設於已使電流同時流入經由同一個節點N(配線W)而導通的多對導電部對P間的情況下,存在產生測定用電流重覆流動的配線W之虞。 於此情況下,因電流的重覆而產生的電壓成為測定誤差,因此存在檢查精度下降之虞。In addition, it is assumed that when a current has simultaneously flowed into a plurality of pairs of conductive portion pairs P that are turned on via the same node N (wiring W), there is a possibility that the wiring W that repeatedly flows in the current for measurement may occur. In this case, the voltage due to the repetition of the current becomes a measurement error, so there is a possibility that the inspection accuracy will be lowered.

另一方面,於檢查指示資訊D2中,以於各層中,即便同時流入測定用電流亦不產生電流重覆的方式,選擇第一選擇導電部的導電部對P。因此,於步驟S51~步驟S54中,根據檢查指示資訊D2來決定同時流入測定用電流的導電部對P,藉此可減少檢查精度下降之虞,並縮短基板的檢查時間。On the other hand, in the inspection instruction information D2, the conductive part pair P of the first selection conductive part is selected so that the current does not overlap even if the measurement current flows into each layer at the same time. Therefore, in steps S51 to S54, the pair of conductive portions P that simultaneously flow into the measurement current is determined based on the inspection instruction information D2, thereby reducing the risk of lowering the inspection accuracy and shortening the inspection time of the substrate.

繼而,當於步驟S54中將基板B判定為不良時(步驟S55中為是),檢查處理部21不執行其以後的處理而結束處理。另一方面,當於步驟S54中未將基板B判定為不良時(步驟S55中為否),檢查處理部21將處理朝步驟S61(圖20)轉移。Then, when the substrate B is determined to be defective in step S54 (YES in step S55), the inspection processing unit 21 ends the processing without executing the subsequent processing. On the other hand, when the substrate B is not determined to be defective in step S54 (NO in step S55), the inspection processing unit 21 shifts the process to step S61 (FIG. 20 ).

於步驟S61中,檢查處理部21針對檢查層LT1、檢查層LT2的第二選擇導電部的導電部對,與第一電流供給處理不同時地執行使測定用電流流入成對的導電部間的第二電流供給處理(步驟S61:(c2)工序)。In step S61, the inspection processing unit 21 executes the pair of conductive portions of the second selection conductive portion of the inspection layer LT1 and the inspection layer LT2 differently from the first current supply process and causes the measurement current to flow between the pair of conductive portions Second current supply process (step S61: (c2) step).

繼而,檢查處理部21檢測檢查層LT1、檢查層LT2的第二選擇導電部的導電部對間的電壓,並根據所述電壓與測定用電流,檢查成對的第二選擇導電部間的電流路徑的通孔V與配線W(步驟S62:(c2)工序)。檢查處理部21利用與步驟S54的情況相同的方法,進行檢查、及其判定結果的報告。Then, the inspection processing section 21 detects the voltage between the pair of conductive sections of the second selection conductive section of the inspection layer LT1 and the inspection layer LT2, and checks the current between the paired second selection conductive sections based on the voltage and the measurement current Via hole V and wiring W of the path (step S62: (c2) process). The inspection processing unit 21 uses the same method as in the case of step S54 to perform inspection and report of its judgment result.

步驟S61、步驟S62的測定用電流的供給及檢查與步驟S53不同時地執行,即於步驟S53的測定用電流未流入的時機執行。The supply and inspection of the measurement current in step S61 and step S62 are not performed at the same time as step S53, that is, when the measurement current in step S53 does not flow.

於步驟S61、步驟S62中,與對於第一選擇導電部的檢查不同時地執行對於第二選擇導電部的檢查,藉此防止測定用電流的重覆。對於檢查層LT1的第二選擇導電部的導電部對、及檢查層LT2的第二選擇導電部的導電部對的步驟S61、步驟S62的處理亦可同時執行。In step S61 and step S62, the inspection of the second selection conductive portion is not performed simultaneously with the inspection of the first selection conductive portion, thereby preventing the repetition of the measurement current. The processes of step S61 and step S62 for the conductive part pair of the second selection conductive part of the inspection layer LT1 and the conductive part pair of the second selection conductive part of the inspection layer LT2 may also be performed simultaneously.

於圖18的例子中,目前檢查層LT1為配線層L1,檢查層LT2為配線層L4,因此不存在檢查層LT1(配線層L1)的第二選擇導電部的導電部對,因此不執行對於檢查層LT1(配線層L1)的第二選擇導電部的導電部對的第二電流供給處理。檢查處理部21針對作為配線層L1、配線層L4的第二選擇導電部的導電部對P13、P14,及導電部對P16、P17,與步驟S53、步驟S54不同時地執行步驟S61、步驟S62。In the example of FIG. 18, the inspection layer LT1 is currently the wiring layer L1, and the inspection layer LT2 is the wiring layer L4, so there is no conductive portion pair of the second selection conductive portion of the inspection layer LT1 (wiring layer L1), so the The second current supply process of the conductive part pair of the second selective conductive part of the inspection layer LT1 (wiring layer L1). The inspection processing section 21 executes step S61 and step S62 for the pair of conductive portions P13 and P14 and the pair of conductive portions P16 and P17 that are the second selection conductive portions of the wiring layer L1 and the wiring layer L4 differently from step S53 and step S54 .

繼而,當於步驟S62的檢查中將基板B判定為不良時(步驟S63中為是),檢查處理部21不執行其以後的處理而結束處理。另一方面,當於步驟S62的檢查中未將基板B判定為不良時(步驟S63中為否),檢查處理部21將處理朝步驟S64轉移。Then, when the substrate B is determined to be defective in the inspection of step S62 (YES in step S63), the inspection processing unit 21 ends the processing without executing the subsequent processing. On the other hand, when the substrate B is not determined to be defective in the inspection of step S62 (NO in step S63), the inspection processing unit 21 shifts the processing to step S64.

於步驟S64中,檢查處理部21對是否符合檢查層LT1、檢查層LT2均為導體層Lc的情況,及一者為導體層Lc且無另一者的情況的任一種情況進行核查(步驟S64)。當不符合檢查層LT1、檢查層LT2均為導體層Lc的情況,及一者為導體層Lc且無另一者的情況的任一種情況時(步驟S64中為否),檢查處理部21朝步驟S65轉移,當符合檢查層LT1、檢查層LT2均為導體層Lc的情況,或一者為導體層Lc且另一者無後述的檢查層的情況的任一種情況時(步驟S64中為是),檢查處理部21朝步驟S71(圖21)轉移。目前,檢查層LT1、檢查層LT2均不是導體層Lc(步驟S64中為否),因此朝步驟S65轉移。In step S64, the inspection processing unit 21 checks whether any of the cases where the inspection layer LT1 and the inspection layer LT2 are the conductor layer Lc, and one is the conductor layer Lc and the other is not (step S64 ). When both the inspection layer LT1 and the inspection layer LT2 are not the conductor layer Lc, and either one is the conductor layer Lc and the other is not the case (NO in step S64), the inspection processing section 21 Step S65 transitions, when either the inspection layer LT1 or the inspection layer LT2 is the conductor layer Lc, or either one is the conductor layer Lc and the other does not have the inspection layer described later (YES in step S64) ), the inspection processing unit 21 moves to step S71 (FIG. 21 ). At present, since neither the inspection layer LT1 nor the inspection layer LT2 is the conductor layer Lc (NO in step S64), the process moves to step S65.

於步驟S65中,若檢查層LT1不是導體層Lc,則檢查處理部21根據檢查指示資訊D2,將基板面F1側的各層之中,下一順序的層設為檢查層LT1(步驟S65)。於當前的檢查層LT1為導體層Lc的情況下,檢查處理部21不設定新的檢查層LT1。繼而,若檢查層LT2不是導體層Lc,則檢查處理部21根據檢查指示資訊D2,將基板面F2側的各層之中,下一順序的層設為檢查層LT2(步驟S66),並朝步驟S53(圖19)轉移。於當前的檢查層LT2為導體層Lc的情況下,檢查處理部21不設定新的檢查層LT2。In step S65, if the inspection layer LT1 is not the conductor layer Lc, the inspection processing unit 21 sets the next layer among the layers on the substrate surface F1 side as the inspection layer LT1 based on the inspection instruction information D2 (step S65). When the current inspection layer LT1 is the conductor layer Lc, the inspection processing unit 21 does not set a new inspection layer LT1. Then, if the inspection layer LT2 is not the conductor layer Lc, the inspection processing unit 21 sets the next layer among the layers on the substrate surface F2 side to the inspection layer LT2 based on the inspection instruction information D2 (step S66), and proceeds to the step S53 (Figure 19) transfer. When the current inspection layer LT2 is the conductor layer Lc, the inspection processing unit 21 does not set a new inspection layer LT2.

目前,檢查層LT1為配線層L1,檢查層LT2為配線層L4,因此檢查處理部21將新的檢查層LT1設為配線層L2,將新的檢查層LT2設為導體層Lc,並朝步驟S53(圖19)轉移。At present, the inspection layer LT1 is the wiring layer L1, and the inspection layer LT2 is the wiring layer L4. Therefore, the inspection processing unit 21 sets the new inspection layer LT1 as the wiring layer L2 and sets the new inspection layer LT2 as the conductor layer Lc. S53 (Figure 19) transfer.

於步驟S53中,檢查處理部21針對作為配線層L2的第一選擇導電部的導電部對P3、P4,及作為基板面F2的導體層Lc的第一選擇導電部的導電部對P11、P15,同時流入測定用電流,並檢測導電部對P3、P4間的電壓與導電部對P11、P15間的電壓,根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S53、步驟S54:(c1)工序)。In step S53, the inspection processing unit 21 performs the pair of conductive portions P3 and P4 as the first selected conductive portion of the wiring layer L2 and the pair of conductive portions P11 and P15 of the first selected conductive portion as the conductive layer Lc of the substrate surface F2 At the same time, the current for measurement flows at the same time, and the voltage between the pair of conductive parts P3 and P4 and the voltage between the pair of conductive parts P11 and P15 are detected, and the through hole V of the current path between the conductive parts is checked based on the voltage and the current for measurement And wiring W (step S53, step S54: (c1) process).

以下,若於步驟S55中為否,則檢查處理部21朝步驟S61轉移。根據圖18中所示的檢查指示資訊D2,不存在與配線層L2及基板面F2的導體層Lc對應的第二選擇導電部,因此不執行步驟S61~步驟S63而朝步驟S64轉移。Hereinafter, if NO in step S55, the inspection processing unit 21 moves to step S61. According to the inspection instruction information D2 shown in FIG. 18, since there is no second selection conductive portion corresponding to the wiring layer L2 and the conductor layer Lc of the substrate surface F2, steps S61 to S63 are not executed and the process moves to step S64.

於步驟S64中,由於不符合檢查層LT1、檢查層LT2均為導體層Lc的情況,及一者為導體層Lc且另一者無檢查層的情況的任一種情況,因此朝步驟S65轉移,檢查處理部21將檢查指示資訊D2的作為基板面F1側的配線層L2的下一順序的層的導體層Lc設為檢查層LT1(步驟S65)。於步驟S66中,由於檢查層LT2為導體層Lc,因此檢查處理部21不設定新的檢查層LT2,再此朝步驟S53轉移。In step S64, since it does not correspond to either the case where the inspection layer LT1 and the inspection layer LT2 are both the conductor layer Lc, and either one is the conductor layer Lc and the other does not have the inspection layer, the process moves to step S65, The inspection processing unit 21 sets the conductor layer Lc, which is the next layer of the wiring layer L2 on the substrate surface F1 side of the inspection instruction information D2, to the inspection layer LT1 (step S65). In step S66, since the inspection layer LT2 is the conductor layer Lc, the inspection processing unit 21 does not set a new inspection layer LT2, and then moves to step S53.

於步驟S53中,檢查處理部21針對作為基板面F1側的導體層Lc的第一選擇導電部的導電部對P1、P3流入測定用電流,並檢測導電部對P1、P3間的電壓,根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S53、步驟S54:(c1)工序)。In step S53, the inspection processing unit 21 flows a measurement current to the conductive pair pairs P1 and P3 that are the first selected conductive parts of the conductor layer Lc on the substrate surface F1 side, and detects the voltage between the conductive pair pairs P1 and P3 according to The voltage and the measurement current are used to inspect the through-hole V and the wiring W of the current path between the conductive parts (step S53, step S54: (c1) step).

以下,若於步驟S55中為否,則檢查處理部21朝步驟S61轉移。根據圖18中所示的檢查指示資訊D2,基板面F1側的導體層Lc的第二選擇導電部為導電部對P6、P7。因此,檢查處理部21對導電部對P6、P7執行步驟S61、工序62。Hereinafter, if NO in step S55, the inspection processing unit 21 moves to step S61. According to the inspection instruction information D2 shown in FIG. 18, the second selected conductive portion of the conductor layer Lc on the substrate surface F1 side is a pair of conductive portions P6, P7. Therefore, the inspection processing section 21 performs step S61 and step 62 on the conductive section pairs P6 and P7.

以下,若於步驟S63中為否,則檢查處理部21朝步驟S64轉移。目前,檢查層LT1於所述步驟S65中被設為導體層Lc,檢查層LT2於所述步驟S66中被設為無(步驟S64中為是),因此朝步驟S71(圖21)轉移。Hereinafter, if NO in step S63, the inspection processing unit 21 moves to step S64. At present, the inspection layer LT1 is set to the conductor layer Lc in the step S65, and the inspection layer LT2 is set to none in the step S66 (YES in step S64), so the process moves to step S71 (FIG. 21).

於步驟S71中,檢查處理部21針對第三選擇導電部的導電部對,與第一電流供給處理、第二電流供給處理不同時地執行使測定用電流流入成對的導電部間的第三電流供給處理(步驟S71)。In step S71, the inspection processing unit 21 executes the third of the conductive portions of the third selected conductive portion differently from the first current supply processing and the second current supply processing, and causes the measurement current to flow into the third conductive portion between the pair of conductive portions. Current supply processing (step S71).

繼而,檢查處理部21檢測第三選擇導電部的導電部對間的電壓,並根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S72)。檢查處理部21利用與步驟S54的情況相同的方法,進行檢查、及其判定結果的報告。Then, the inspection processing section 21 detects the voltage between the pair of conductive sections of the third selection conductive section, and checks the via hole V and the wiring W of the current path between the conductive sections based on the voltage and the measurement current (step S72). The inspection processing unit 21 uses the same method as in the case of step S54 to perform inspection and report of its judgment result.

於圖18的例子中,不存在對應於基板面F1的第三選擇導電部,對應於基板面F2的第三選擇導電部為導電部對P12、P13。因此,檢查處理部21與第一電流供給處理、第二電流供給處理不同時地執行使測定用電流流入導電部對P12、P13的導電部間的第三電流供給處理(步驟S71),並檢測導電部對P12、P13的導電部間的電壓,根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S72)。In the example of FIG. 18, there is no third selection conductive portion corresponding to the substrate surface F1, and the third selection conductive portion corresponding to the substrate surface F2 is the pair of conductive portions P12, P13. Therefore, the inspection processing unit 21 and the first current supply process and the second current supply process do not execute the third current supply process (step S71) in which the measurement current flows into the conductive part pair between the conductive parts of P12 and P13 at different times (step S71 ). The conductive portion checks the voltage between the conductive portions of P12 and P13 based on the voltage and the measurement current, and checks the via V and the wiring W of the current path between the conductive portions (step S72).

於圖18的例子中,檢查圖15中所示的導電部對P12、P13間的電流路徑的配線W42。藉此,可減少產生配線W的檢查遺漏之虞,並提昇基板B的檢查精度。In the example of FIG. 18, the wiring W42 of the current path between the pair of conductive portions P12 and P13 shown in FIG. 15 is inspected. As a result, the risk of inspection leakage of the wiring W can be reduced, and the inspection accuracy of the substrate B can be improved.

繼而,檢查處理部21針對第四選擇導電部的導電部對,與第一電流供給處理~第三電流供給處理不同時地執行使測定用電流流入成對的導電部間的第四電流供給處理(步驟S73)。Then, the inspection processing unit 21 executes the fourth current supply process for causing the current for measurement to flow between the paired conductive parts differently from the first current supply process to the third current supply process for the conductive part pair of the fourth selected conductive part (Step S73).

繼而,檢查處理部21檢測第四選擇導電部的導電部對間的電壓,並根據所述電壓與測定用電流,檢查該導電部間的電流路徑的通孔V與配線W(步驟S74),然後結束處理。檢查處理部21利用與步驟S54的情況相同的方法,進行檢查、及其判定結果的報告。Then, the inspection processing section 21 detects the voltage between the pair of conductive sections of the fourth selected conductive section, and checks the via V and the wiring W of the current path between the conductive sections based on the voltage and the measurement current (step S74), Then end the process. The inspection processing unit 21 uses the same method as in the case of step S54 to perform inspection and report of its judgment result.

於圖18的例子中,由於不存在第四選擇導電部,因此檢查處理部21不執行步驟S73、步驟S74而結束處理。In the example of FIG. 18, since there is no fourth selection conductive portion, the inspection processing portion 21 ends the processing without performing steps S73 and S74.

根據步驟S73、步驟S74,例如可檢查如圖17所示的基板B的通孔Vc,所述基板B包括兩個導體層Lc,且設置有將兩個導體層Lc的面狀導體IP彼此連接的通孔Vc。According to steps S73 and S74, for example, the through-hole Vc of the substrate B shown in FIG. 17 can be inspected, the substrate B includes two conductor layers Lc, and the planar conductors IP connecting the two conductor layers Lc are provided to each other Through hole Vc.

另外,藉由檢查指示資訊產生裝置3,針對各基板面,自與接近基板面F1、基板面F2的層對應者起,依次對檢查指示資訊D2進行排序。其結果,基板檢查裝置2藉由步驟S51、步驟S52、步驟S65、步驟S66來規定檢查順序,藉此可自接近基板面F1、基板面F2者起,依次將配線層L設為依次檢查對象。In addition, the inspection instruction information generating device 3 sorts the inspection instruction information D2 in order from the layer corresponding to the substrate surface F1 and the substrate surface F2 for each substrate surface. As a result, the substrate inspection apparatus 2 defines the inspection sequence by step S51, step S52, step S65, and step S66, whereby the wiring layer L can be sequentially inspected from the substrate surface F1 or the substrate surface F2 .

通常,基板B存在越接近基板面F1、基板面F2,設置於配線層L的配線W的數量越多的傾向。設置於配線層L的配線W的數量越多,對應於一個層的第一選擇導電部的導電部對的數量越增加。第一選擇導電部的導電部對的數量越多,於步驟S53中可同時進行檢查的導電部對的數量越增加。In general, the closer the substrate B is to the substrate surface F1 and the substrate surface F2, the greater the number of wires W provided in the wiring layer L. The greater the number of wires W provided in the wiring layer L, the greater the number of pairs of conductive portions corresponding to the first selection conductive portion of one layer. The greater the number of pairs of conductive parts of the first selection conductive part, the greater the number of pairs of conductive parts that can be simultaneously inspected in step S53.

因此,藉由自接近基板面F1、基板面F2者起,依次將配線層L設為檢查對象,可增加檢查的早期的同時檢查數。若可增加檢查的初期的同時檢查數,則可於檢查的早期檢測到基板B的不良。因此,於如步驟S55、步驟S63般,當檢測到不良時結束檢查的情況下,藉由自接近基板面F1、基板面F2者起,依次將配線層L設為檢查對象,可縮短檢測到不良之前的時間,並提高可縮短檢查時間的可能性。Therefore, the number of simultaneous inspections in the early stage of the inspection can be increased by sequentially setting the wiring layer L as the inspection target since it approaches the substrate surface F1 and the substrate surface F2. If the number of simultaneous inspections in the initial stage of the inspection can be increased, the defect of the substrate B can be detected in the early stage of the inspection. Therefore, in the case where the inspection is terminated when a defect is detected as in steps S55 and S63, by sequentially approaching the substrate surface F1 and the substrate surface F2, by sequentially setting the wiring layer L as the inspection object, the detection can be shortened The time before the defect and increase the possibility of shortening the inspection time.

再者,表示了檢查指示資訊產生裝置3與基板檢查裝置2作為個別的裝置來構成的例子,但檢查指示資訊產生裝置3與基板檢查裝置2亦可作為單一的裝置來構成。例如,亦可為如下的構成:基板檢查裝置2包括檢查指示資訊產生部31與儲存部32,藉此基板檢查裝置2兼作檢查指示資訊產生裝置。於此情況下,藉由兼作檢查指示資訊產生裝置的一台基板檢查裝置來構成基板檢查系統。In addition, the example in which the inspection instruction information generating device 3 and the substrate inspection device 2 are configured as separate devices is shown, but the inspection instruction information generating device 3 and the substrate inspection device 2 may be configured as a single device. For example, the configuration may be such that the substrate inspection device 2 includes an inspection instruction information generating unit 31 and a storage unit 32, whereby the substrate inspection device 2 also serves as an inspection instruction information generating device. In this case, a substrate inspection system is constituted by a substrate inspection device that also serves as an inspection instruction information generating device.

另外,檢查指示資訊產生裝置3及檢查指示資訊產生方法未必需要執行圖7~圖14中記載的所有流程,檢查處理部21未必需要執行圖19~圖21中記載的所有流程。In addition, the inspection instruction information generation device 3 and the inspection instruction information generation method do not necessarily need to execute all the processes shown in FIGS. 7 to 14, and the inspection processing unit 21 does not necessarily need to execute all the processes shown in FIGS. 19 to 21.

檢查指示資訊產生裝置3及檢查指示資訊產生方法即便於例如僅執行了步驟S101、步驟S102的情況下,亦可產生如下的檢查指示資訊D2:可容易地縮短與基板面F1鄰接的配線層L1的配線W、及將和基板面F1鄰接的配線層L1與導電部P連接的通孔V的檢查時間。於此情況下,檢查處理部21只要執行步驟S53、步驟S54即可。The inspection instruction information generating device 3 and the inspection instruction information generation method can generate the following inspection instruction information D2 even when only steps S101 and S102 are executed, for example: the wiring layer L1 adjacent to the substrate surface F1 can be easily shortened Inspection time of the wiring W and the through hole V connecting the wiring layer L1 adjacent to the substrate surface F1 and the conductive portion P. In this case, the inspection processing unit 21 only needs to execute step S53 and step S54.

另外,表示了於導體層Lc的兩面設置有配線層L與導電部P的例子,但配線層L與導電部P亦可僅設置於導體層Lc的一面。例如,基板B亦可不包括基板B4、基板B5。於此情況下,不需要執行與選擇層LL2相關的處理,例如不需要執行步驟S18~步驟S24、步驟S104~步驟S106、步驟S401~步驟S403、步驟S52、步驟S66等。In addition, an example in which the wiring layer L and the conductive portion P are provided on both surfaces of the conductor layer Lc is shown, but the wiring layer L and the conductive portion P may be provided on only one surface of the conductor layer Lc. For example, the substrate B may not include the substrate B4 and the substrate B5. In this case, there is no need to perform processing related to the selection layer LL2, for example, steps S18 to S24, steps S104 to S106, steps S401 to S403, step S52, step S66, etc. are not required.

另外,亦可將檢查處理部21設為如下的構成:即便於不執行步驟S55、步驟S63,而在檢查途中檢測到不良的情況下,亦繼續進行檢查。另外,檢查指示資訊產生裝置3及檢查指示資訊產生方法未必限定於藉由步驟S4、步驟S13、步驟S21,自與接近基板面F1、基板面F2的層對應者起,依次將導電部對記錄於檢查指示資訊D2的例子。檢查指示資訊產生裝置3及檢查指示資訊產生方法亦可按任意的順序將導電部對記錄於檢查指示資訊D2。In addition, the inspection processing unit 21 may be configured to continue inspection even if a defect is detected during the inspection without performing steps S55 and S63. In addition, the inspection instruction information generating device 3 and the inspection instruction information generation method are not necessarily limited to step S4, step S13, and step S21, and the conductive portions are sequentially recorded from the layer corresponding to the substrate surface F1 and the substrate surface F2. For example of checking instruction information D2. The inspection instruction information generating device 3 and the inspection instruction information generation method may also record the conductive portion pair in the inspection instruction information D2 in any order.

即,本發明的一例的檢查指示資訊產生裝置是用於檢查基板的檢查指示資訊產生裝置,所述基板包括:作為設置有擴展成面狀或網狀的導電性的面狀導體的層的導體層、設置有多個導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔,所述檢查指示資訊產生裝置包括:儲存部,儲存表示所述基板的所述面狀導體、所述導電部、所述配線、及所述通孔如何導通連接的導電結構資訊;以及檢查指示資訊產生部,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,根據所述導電結構資訊,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來記錄。That is, the inspection instruction information generating device of an example of the present invention is an inspection instruction information generating device for inspecting a substrate including a conductor as a layer provided with a conductive planar conductor expanded into a planar or mesh shape A layer, a substrate surface provided with a plurality of conductive portions, a wiring layer as a layer laminated between the conductor layer and the substrate surface, a via hole connecting the wiring of the wiring layer to the conductive portion, and A through-hole that connects the wiring of the wiring layer to the planar conductor of the conductor layer, the inspection instruction information generating device includes: a storage unit that stores the planar conductor representing the substrate, the conductive portion, Information on the conductive structure of the wiring and how the through-hole is connected; and an inspection instruction information generating section, when there are a plurality of groups of the conductive sections that are mutually connected through the wiring of the wiring layer, according to For the conductive structure information, the following inspection instruction information generation process is performed: a pair of the conductive parts is selected as the first selected conductive part from each group, and the selected pairs of the first selected conductive parts are represented. Is recorded as inspection instruction information.

另外,本發明的一例的檢查指示資訊產生方法包括檢查指示資訊產生工序,所述檢查指示資訊產生工序根據表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀或網狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來產生。In addition, the inspection instruction information generation method of an example of the present invention includes an inspection instruction information generation process based on conductive structure information indicating how the planar conductors, conductive portions, wirings, and vias of the substrate are electrically connected, The substrate includes a conductor layer as a layer provided with the planar conductor expanded into a planar or mesh shape, a substrate surface provided with a plurality of the conductive portions, and a layer laminated on the conductor layer and A wiring layer of the layer between the substrate surfaces, a via hole connecting the wiring of the wiring layer to the plurality of conductive portions, and a connection between the wiring of the wiring layer and the planar conductor of the conductor layer Through holes, when there are a plurality of groups of the conductive parts that are mutually connected via the wiring of the wiring layer, execute the following inspection instruction information generation process: select a pair of the conductive from each of the groups The part serves as a first selection conductive part, and information representing the selected pairs of first selection conductive parts is generated as inspection instruction information.

另外,本發明的一例的檢查指示資訊產生程式使電腦根據表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀或網狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,執行如下的檢查指示資訊產生處理:自該各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來產生。In addition, the inspection instruction information generation program of an example of the present invention causes the computer to conduct electrical connection information indicating how the planar conductors, conductive portions, wirings, and vias of the substrate are electrically connected. The substrate includes: Or a mesh-like conductive conductor layer of the planar conductor layer, a substrate surface provided with the plurality of conductive portions, a wiring layer as a layer laminated between the conductor layer and the substrate surface, Through holes connecting the wiring of the wiring layer to the plurality of conductive portions, and through holes connecting the wiring of the wiring layer to the planar conductor of the conductor layer, when there are a plurality of When the group of the conductive parts that are connected to each other is connected to each other, the following inspection instruction information generation process is performed: a pair of the conductive parts from each group is selected as the first selected conductive part, and the The information of the selected pairs of first selection conductive parts is generated as inspection instruction information.

當存在多個經由配線層的配線而相互導通的導電部彼此的群組時,即便使電流流入某個群組的導電部間,所述電流亦不會流入其他群組。因此,根據所述構成,當存在多個經由配線層的配線而相互導通的導電部彼此的群組時,藉由檢查指示資訊產生處理,根據導電結構資訊,自該各群組中各選擇一對導電部作為第一選擇導電部,並將表示該經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來記錄。於是,自一個群組中選擇一對第一選擇導電部,因此多對第一選擇導電部分別屬於不同的群組。於是,即便針對由檢查指示資訊表示的多對第一選擇導電部同時流入電流,亦不會產生電流的重覆。因此,將基於以所述方式獲得的檢查指示資訊的多對第一選擇導電部設為檢查部位,藉此可同時實施多個部位的檢查,其結果,容易縮短基板的檢查時間。When there is a group of a plurality of conductive parts that are electrically connected to each other via the wiring of the wiring layer, even if a current flows between the conductive parts of a certain group, the current does not flow into other groups. Therefore, according to the above-mentioned configuration, when there are a plurality of groups of conductive parts that are mutually connected through the wiring of the wiring layer, by inspection instruction information generation processing, one of each group is selected from the groups according to the conductive structure information The pair of conductive parts serves as the first selection conductive part, and the information indicating the selected pairs of the first selection conductive parts is recorded as the inspection instruction information. Therefore, a pair of first selection conductive parts is selected from one group, and thus a plurality of pairs of first selection conductive parts belong to different groups. Therefore, even if a current flows into a plurality of pairs of the first selection conductive portions indicated by the inspection instruction information at the same time, the current will not be repeated. Therefore, a plurality of pairs of first selection conductive portions based on the inspection instruction information obtained in the above manner are used as inspection sites, whereby inspection of multiple locations can be performed at the same time, and as a result, it is easy to shorten the inspection time of the substrate.

另外,較佳為所述檢查指示資訊產生處理包括如下的工序:(a)根據所述導電結構資訊,將經由所述配線層的配線而相互導通的所述導電部彼此群組化;以及(b)針對所述經群組化的多個群組,自該各群組中所包含的導電部中選擇兩個導電部作為所述一對第一選擇導電部,並將該經選擇的多對第一選擇導電部設為可同時進行檢查的檢查部位而記錄於所述檢查指示資訊。In addition, it is preferable that the inspection instruction information generating process includes the following steps: (a) based on the conductive structure information, grouping the conductive portions that are mutually connected via the wiring of the wiring layer into groups with each other; and ( b) For the plurality of grouped groups, select two conductive parts from the conductive parts included in each group as the pair of first selection conductive parts, and The first selection conductive portion is set as an inspection site that can be inspected at the same time, and is recorded in the inspection instruction information.

根據該構成,於(a)中,將經由配線層的配線而相互導通的導電部彼此群組化,即,將若使電流流入多個導電部對中,則存在相互產生電流路徑的重覆的可能性的導電部彼此群組化。另外,於(b)中,針對經群組化的多個群組,即,以處於即便使電流流入群組內的導電部對間,亦不會產生與其他群組的電流路徑的重覆的關係的多個群組為對象,自該各群組中所包含的導電部中選擇兩個導電部作為一對第一選擇導電部,並將該經選擇的多對第一選擇導電部設為可同時進行檢查的檢查部位而記錄於檢查指示資訊。於是,自一個群組中選擇一對第一選擇導電部,因此多對第一選擇導電部分別屬於不同的群組。因此,即便針對由檢查指示資訊表示的多對第一選擇導電部同時流入電流,亦不會產生電流的重覆。因此,將基於以所述方式獲得的檢查指示資訊的多對第一選擇導電部設為檢查部位,藉此可同時實施多個部位的檢查,其結果,容易縮短基板的檢查時間。According to this configuration, in (a), the conductive portions that are connected to each other via the wiring of the wiring layer are grouped with each other, that is, if a current is flowed into the plurality of conductive portion pairs, there is an overlap that generates a current path each other The possibility of conducting parts grouped with each other. In addition, in (b), for a plurality of grouped groups, that is, even if a current flows between pairs of conductive parts in the group, no overlap with the current paths of other groups will occur. A plurality of groups of the relationship are targeted, and two conductive parts are selected from the conductive parts included in each group as a pair of first selected conductive parts, and the selected pairs of first selected conductive parts are set It is recorded in the inspection instruction information for the inspection site that can be inspected at the same time. Therefore, a pair of first selection conductive parts is selected from one group, and thus a plurality of pairs of first selection conductive parts belong to different groups. Therefore, even if a current flows into a plurality of pairs of the first selection conductive portions indicated by the inspection instruction information at the same time, the current will not be repeated. Therefore, a plurality of pairs of first selection conductive portions based on the inspection instruction information obtained in the above manner are used as inspection sites, whereby inspection of multiple locations can be performed at the same time, and as a result, it is easy to shorten the inspection time of the substrate.

另外,較佳為所述(b)工序進而於存在具有未被選擇為所述第一選擇導電部的導電部的群組的情況下,針對所述群組,將包含所述未被選擇為第一選擇導電部的導電部的兩個導電部作為應與所述多對第一選擇導電部不同時地進行檢查的一對第二選擇導電部,記錄於所述檢查指示資訊。In addition, it is preferable that the step (b) further includes, when there is a group having a conductive portion that is not selected as the first selection conductive portion, for the group, the unselected The two conductive portions of the conductive portions of the first selection conductive portion are recorded as the pair of second selection conductive portions that should be inspected at different times from the pair of first selection conductive portions, and are recorded in the inspection instruction information.

根據該構成,可減少自檢查部位中遺漏未被選擇為第一選擇導電部的導電部之虞。According to this configuration, it is possible to reduce the risk of missing the conductive portion that is not selected as the first selection conductive portion from the inspection site.

另外,較佳為所述基板包括多層所述配線層,進而包括將所述多個配線層間連接的多個通孔,所述檢查指示資訊產生部進而執行如下的工序:(d)於多個所述配線層的配線並聯連接的情況下,於所述(a)工序之前,以將該經並聯連接的多個配線替換成所述各配線之中最接近所述基板面的一個配線的方式,變更所述導電結構資訊,且根據由所述(d)工序所變更的導電結構資訊,執行所述檢查指示資訊產生處理。In addition, it is preferable that the substrate includes multiple layers of the wiring layer, and further includes a plurality of through holes connecting the plurality of wiring layers, and the inspection instruction information generating section further performs the following steps: (d) In the case where the wires of the wiring layer are connected in parallel, before the step (a), the plurality of wires connected in parallel are replaced with the one closest to the substrate surface among the wires , Change the conductive structure information, and execute the inspection instruction information generation process based on the conductive structure information changed by the step (d).

根據該構成,將導電結構資訊簡單化,因此根據經簡單化的導電結構資訊來執行檢查指示資訊產生處理。其結果,檢查指示資訊產生處理的執行變得容易。According to this configuration, the conductive structure information is simplified, so the inspection instruction information generation process is executed based on the simplified conductive structure information. As a result, the execution of the inspection instruction information generation process becomes easy.

另外,較佳為所述檢查指示資訊產生部進而執行如下的工序:(e)於藉由所述配線與所述面狀導體而將所述通孔或通孔的行並聯連接的情況下,於所述(a)工序之前,以將該經並聯連接的通孔或通孔的行替換成一個通孔或一行通孔的方式,變更由所述(d)工序所變更的導電結構資訊,且根據由所述(e)工序所變更的導電結構資訊,執行所述檢查指示資訊產生處理。In addition, it is preferable that the inspection instruction information generating section further executes the following steps: (e) when the wiring and the row of the through holes are connected in parallel by the wiring and the planar conductor, Before the step (a), the conductive structure information changed by the step (d) is changed in such a manner that the parallel-connected through-hole or through-hole row is replaced with a through-hole or a row of through-holes, And based on the conductive structure information changed by the step (e), the inspection instruction information generating process is executed.

根據該構成,將導電結構資訊簡單化,因此根據經簡單化的導電結構資訊來執行檢查指示資訊產生處理。其結果,檢查指示資訊產生處理的執行變得容易。According to this configuration, the conductive structure information is simplified, so the inspection instruction information generation process is executed based on the simplified conductive structure information. As a result, the execution of the inspection instruction information generation process becomes easy.

另外,較佳為所述基板包括多層所述配線層,進而包括將所述多個配線層間連接的多個通孔,所述檢查指示資訊產生部(f)將所述多個配線層之中,最接近所述基板面的配線層作為處理對象來執行所述(a)工序及(b)工序,(g)針對除所述最接近所述基板面的配線層以外的其他配線層,將該其他配線層分別作為處理對象,(g1)針對成為所述處理對象的所述配線層的各配線,對應於其中一個配線,對於與所述一個配線的遠離所述導體層之側連接的一個通孔,選擇一個在所述一個通孔的與所述配線相反側進行電性連接的所述導電部,藉此針對對應的所述各配線,將所述經選擇的導電部群組化,(g2)針對於所述(g1)工序中經群組化的群組,執行所述(b)工序,且所述(b)工序將所述各對的第一選擇導電部與所述處理對象的配線層建立對應而記錄於所述檢查指示資訊。In addition, it is preferable that the substrate includes multiple layers of the wiring layer, and further includes a plurality of through holes connecting the plurality of wiring layers, and the inspection instruction information generating section (f) divides the plurality of wiring layers , The wiring layer closest to the substrate surface as the processing target to perform the steps (a) and (b), (g) for the wiring layer other than the wiring layer closest to the substrate surface, the The other wiring layers are respectively processed. (g1) For each wiring of the wiring layer to be processed, corresponding to one of the wirings, the one connected to the side of the one wiring remote from the conductor layer A through hole, selecting one of the conductive parts electrically connected on the opposite side of the one through hole of the one through hole, thereby grouping the selected conductive parts for each corresponding wiring, (G2) For the grouped group in the step (g1), the step (b) is performed, and the step (b) combines the first selected conductive portion of each pair with the processing The object's wiring layer is correlated and recorded in the inspection instruction information.

根據該構成,可將成為用於檢查基板的檢查部位的導電部對記錄於檢查指示資訊,所述基板包括多個配線層、及將多個配線層間連接的多個通孔。According to this configuration, it is possible to record, in the inspection instruction information, the conductive portion pair that becomes the inspection site for inspecting the substrate including the plurality of wiring layers and the plurality of through holes connecting the plurality of wiring layers.

另外,較佳為所述(b)工序自於所述(f)工序及(g)工序中,將接近所述基板面的配線層選擇為處理對象者起,依次將所述多對第一選擇導電部針對所述各配線層進行排序後記錄於所述檢查指示資訊。In addition, it is preferable that the step (b) starts from selecting the wiring layer close to the substrate surface as the processing target in the steps (f) and (g), and sequentially selecting the plurality of pairs of first The selected conductive part is sorted for each wiring layer and recorded in the inspection instruction information.

通常,基板存在越接近基板面,設置於配線層的配線的數量越多的傾向。設置於配線層的配線的數量越多,相對於處理對象的配線層的第一選擇導電部的對的數量,即於檢查時可同時流入測定用電流的導電部的對越增加。因此,若自將接近基板面的配線層選擇為處理對象者起,依次將多對第一選擇導電部針對各配線層進行排序後記錄於檢查指示資訊,則於檢查時,可按由該檢查指示資訊進行了排序的順序選擇檢查對象的配線層,並使測定用電流流入對應於所述配線層的第一選擇導電部對來進行檢查。若如此進行檢查,則可增加檢查的早期的同時檢查數。若可增加檢查的初期的同時檢查數,則可於檢查的早期檢測到基板的不良。In general, the closer the substrate is to the substrate surface, the greater the number of wires provided in the wiring layer. The greater the number of wirings provided in the wiring layer, the greater the number of pairs of first selection conductive portions with respect to the wiring layer to be processed, that is, pairs of conductive portions that can simultaneously flow into the measurement current during inspection. Therefore, if the wiring layers close to the surface of the substrate are selected as the processing target, a plurality of pairs of first selection conductive parts are sequentially sorted for each wiring layer and recorded in the inspection instruction information, then the inspection can be carried out according to the inspection The order in which the instruction information is sorted selects the wiring layer to be inspected, and the measurement current flows into the first selection conductive portion pair corresponding to the wiring layer for inspection. If the inspection is performed in this way, the number of simultaneous inspections in the early stage of the inspection can be increased. If the number of simultaneous inspections at the initial stage of the inspection can be increased, defects in the substrate can be detected at the early stage of the inspection.

另外,較佳為(h)針對與所述面狀導體的一側連接的各通孔,選擇一個在與所述面狀導體相反側進行電性連接的所述導電部,藉此將該經選擇的導電部作為與所述面狀導體的一側對應的導電部而群組化,自該經群組化的導電部中選擇兩個導電部作為一對第一選擇導電部,並將該經選擇的一對第一選擇導電部記錄於所述檢查指示資訊。In addition, it is preferable that (h) for each through-hole connected to one side of the planar conductor, select one of the conductive portions electrically connected on the opposite side to the planar conductor, thereby applying this The selected conductive part is grouped as a conductive part corresponding to one side of the planar conductor, and two conductive parts are selected from the grouped conductive parts as a pair of first selected conductive parts, and the The selected pair of first selection conductive parts is recorded in the inspection instruction information.

根據該構成,可檢查與面狀導體連接的通孔。According to this configuration, the through hole connected to the planar conductor can be inspected.

另外,較佳為所述檢查指示資訊產生處理進而包括如下的工序:(j)探索被所述第一選擇導電部的對包夾、且不被所述第二選擇導電部的對包夾的所述配線;以及(k)將與所述經探索的配線的一端不經由該配線而導通的導電部、及與該配線的另一端不經由該配線而導通的導電部作為應與所述多對第一選擇導電部不同時地進行檢查的一對第三選擇導電部,記錄於所述檢查指示資訊。In addition, it is preferable that the inspection instruction information generating process further includes the following steps: (j) searching for the inclusion of the first selection conductive portion but not by the second selection conductive portion The wiring; and (k) a conductive portion that is connected to one end of the searched wiring without passing through the wiring, and a conductive portion that is connected to the other end of the wiring without passing through the wiring as the A pair of third selection conductive portions that are not simultaneously inspected for the first selection conductive portion are recorded in the inspection instruction information.

根據該構成,可減少產生朝檢查指示資訊的檢查對象部位的記錄遺漏之虞。According to this configuration, it is possible to reduce the risk of omission of the recording of the inspection target portion of the inspection instruction information.

另外,較佳為所述基板面及所述配線層分別設置於所述導體層的兩側,所述檢查指示資訊產生部對所述導體層的兩側執行所述檢查指示資訊產生處理。In addition, it is preferable that the substrate surface and the wiring layer are provided on both sides of the conductor layer, respectively, and the inspection instruction information generation unit performs the inspection instruction information generation process on both sides of the conductor layer.

根據該構成,可產生與在導體層的兩側分別設置有基板面與配線層的基板對應的檢查指示資訊。According to this configuration, it is possible to generate inspection instruction information corresponding to the substrates provided with the substrate surface and the wiring layer on both sides of the conductor layer, respectively.

另外,較佳為所述基板包括多個所述導體層、及將所述多個導體層的所述面狀導體彼此連接的通孔,且所述檢查指示資訊產生處理進而包括如下的工序:(l)將所述兩側的基板面的一側的基板面的導電部中的一個、及另一側的基板面的導電部中的一個作為應與所述多對第一選擇導電部不同時地進行檢查的一對第四選擇導電部,記錄於所述檢查指示資訊。In addition, it is preferable that the substrate includes a plurality of the conductor layers and a through hole that connects the planar conductors of the plurality of conductor layers to each other, and the inspection instruction information generation process further includes the following steps: (L) One of the conductive portions on the substrate surface on one side of the two substrate surfaces and one of the conductive portions on the substrate surface on the other side should be different from the pair of first selective conductive portions A pair of fourth selection conductive parts that are inspected from time to time are recorded in the inspection instruction information.

根據該構成,對於包括多個導體層、及將多個導體層的面狀導體彼此連接的通孔的基板,亦可將用於檢查將所述面狀導體彼此連接的通孔的一對第四選擇導電部記錄於檢查指示資訊。According to this configuration, for a substrate including a plurality of conductor layers and a through-hole connecting the planar conductors of the plurality of conductor layers to each other, a pair of first 4. The selected conductive part is recorded in the inspection instruction information.

另外,較佳為所述檢查指示資訊產生部進而執行如下的工序:(m)使所述通孔對應於節點,使所述配線對應於分支,使所述面狀導體對應於根節點,藉此將所述導電結構資訊轉換成樹狀結構的資料結構,且根據藉由所述(m)工序而轉換成樹狀結構的導電結構資訊,執行所述檢查指示資訊產生處理。In addition, it is preferable that the inspection instruction information generating section further executes the following steps: (m) The via hole corresponds to a node, the wiring corresponds to a branch, and the planar conductor corresponds to a root node. This converts the conductive structure information into a tree structure data structure, and executes the inspection instruction information generation processing based on the conductive structure information converted into a tree structure by the (m) process.

根據該構成,將導電結構資訊簡單化,因此根據經簡單化的導電結構資訊來執行檢查指示資訊產生處理。其結果,檢查指示資訊產生處理的執行變得容易。According to this configuration, the conductive structure information is simplified, so the inspection instruction information generation process is executed based on the simplified conductive structure information. As a result, the execution of the inspection instruction information generation process becomes easy.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, inspect the through holes and wiring of the current path between the first selected conductive portions of each pair.

根據該構成,對基於檢查指示資訊的多對第一選擇導電部同時執行第一電流供給處理,藉此可避免測定電流的重覆,並同時實施多個部位的檢查,其結果,容易縮短基板的檢查時間。According to this configuration, the first current supply process is simultaneously performed on a plurality of pairs of first selection conductive portions based on the inspection instruction information, thereby avoiding repetition of the measurement current, and simultaneously performing inspections at multiple locations, as a result, the substrate is easily shortened Inspection time.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線;以及(c2)與所述第一電流供給處理不同時地執行使電流流入由所述檢查指示資訊表示的成對的第二選擇導電部間的第二電流供給處理,並檢測所述成對的第二選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述成對的第二選擇導電部間的電流路徑的通孔與配線。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, checking the through-holes and wiring of the current path between the first selection conductive portions of each pair; and (c2) performing the execution differently from the first current supply process Current flows into the second current supply process between the pair of second selection conductive parts indicated by the inspection instruction information, and detects the voltage between the pair of second selection conductive parts, based on the current and the voltage To inspect the through holes and wiring of the current path between the paired second selection conductive portions.

根據該構成,可進行與未被選擇為第一選擇導電部的導電部連接的電流路徑上的通孔或配線的檢查。According to this configuration, it is possible to perform inspection of the through hole or the wiring on the current path connected to the conductive portion that is not selected as the first selection conductive portion.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部按照由所述檢查指示資訊表示的順序,針對所述各配線層執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,於所述(c1)工序的檢查的結果為不良的情況下,不執行對於所述順序為下一個以後的配線層的所述(c1)工序。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, and the inspection processing unit according to the inspection instruction information In sequence, the following steps are performed for each wiring layer: (c1) For a plurality of pairs of first selection conductive portions indicated by the inspection instruction information, a first flow of current between the paired first selection conductive portions is performed at the same time Current supply processing, and detecting the voltage between the pair of first selection conductive parts, and checking the through holes and wiring of the current path between the pair of first selection conductive parts based on the current and the voltage, When the result of the inspection of the (c1) step is defective, the (c1) step for the wiring layer whose sequence is next to the following is not executed.

根據該構成,自接近基板面者起,依次將配線層作為處理對象進行檢查,藉此可於檢查的早期檢測到基板的不良。而且,於檢查的結果為不良的情況下,不執行對於順序為下一個以後的配線層的檢查。其結果,迅速地檢測到不良,且於檢測到不良的時間點結束檢查,因此容易縮短檢查時間。According to this configuration, since the person approaching the surface of the substrate, the wiring layer is sequentially inspected as the processing target, whereby the defect of the substrate can be detected early in the inspection. In addition, in the case where the result of the inspection is bad, the inspection of the wiring layer in the next and subsequent order is not performed. As a result, the defect is quickly detected and the inspection is ended at the time when the defect is detected, so it is easy to shorten the inspection time.

另外,本發明的一例的基板檢查系統包括所述檢查指示資訊產生裝置、及根據所述檢查指示資訊來檢查所述基板的檢查處理部,所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,且於所述(c1)工序中,同時執行對於藉由所述檢查指示資訊而與所述導體層的一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理、及對於與所述導體層的另一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理。In addition, a substrate inspection system according to an example of the present invention includes the inspection instruction information generating device and an inspection processing unit that inspects the substrate based on the inspection instruction information. The inspection processing unit performs the following steps: (c1) A plurality of pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously performing a first current supply process that causes current to flow between the pair of first selection conductive portions, and detecting the pair of first selection conductive portions Voltage, based on the current and the voltage, check the through holes and wiring of the current path between the first selected conductive portions of each pair, and in the step (c1), simultaneously execute The instruction information is checked to determine the first current supply process of the plurality of pairs of first selection conductive portions corresponding to one side of the conductor layer, and to the corresponding position of the other side of the conductor layer The first current supply process of the plurality of pairs of first selection conductive parts.

根據該構成,當檢查於導體層的兩側分別設置有基板面與配線層的基板時,可同時執行對於導體層的一側的檢查與對於另一側的檢查,因此容易縮短檢查時間。According to this configuration, when inspecting the substrate provided with the substrate surface and the wiring layer on both sides of the conductor layer, the inspection on one side of the conductor layer and the inspection on the other side can be performed at the same time, so it is easy to shorten the inspection time.

即,此種構成的檢查指示資訊產生裝置、檢查指示資訊產生方法以及檢查指示資訊產生程式可產生如下的檢查指示資訊:表示容易縮短基板的檢查時間的檢查部位。另外,此種構成的基板檢查系統容易縮短基板的檢查時間。That is, the inspection instruction information generation device, inspection instruction information generation method, and inspection instruction information generation program of such a configuration can generate the inspection instruction information as follows: indicating an inspection site that is easy to shorten the inspection time of the substrate. In addition, the substrate inspection system of such a configuration is easy to shorten the inspection time of the substrate.

本申請案是以2018年9月14日所申請的日本專利申請特願2018-172302為基礎者,其內容包含於本申請案中。再者,用於實施方式一項中所進行的具體的實施形態或實施例始終是使本發明的技術內容變得明確者,本發明不應僅限定於此種具體例來狹義地進行解釋。This application is based on Japanese Patent Application No. 2018-172302 filed on September 14, 2018, and the contents thereof are included in this application. In addition, the specific embodiments or examples used in the first embodiment always clarify the technical content of the present invention, and the present invention should not be limited to such specific examples for narrow interpretation.

1:基板檢查系統 2:基板檢查裝置 3:檢查指示資訊產生裝置 4U、4L:測定治具 12:測定塊 13:掃描器部 20:控制部 21:檢查處理部 22、32:儲存部 31:檢查指示資訊產生部 110:基板固定裝置 112:框體 121、122:測定部 125:移動機構 B、B1~B5、WB1、WB2:基板 BS、BS1、F1、F2:基板面 BS2:接觸面 CS、CM:電源部 D1、D1'、D1'':導電結構資訊 D2:檢查指示資訊 +F、-F:電流端子 Fip1、Fip2:旗標 I、I1、I2:電流 IP、IPa、IPd:面狀導體 L、L1、L2、L4:配線層 Lc:導體層 LL1:第一選擇層 LL2:第二選擇層(選擇層) LT1、LT2:檢查層 M、M11~M14、M21~M23、M41~M47、Mr1~Mr6:分支 MB:中間基板 MP:金屬板 N、N11、N12、N21、N41、N42:節點 NR:根節點 P、P1~P7、P11~P17、PA、PB、PA1~PF1、PA2~PF2:導電部 Pr:探針 R1~R4:電阻 RA~RF、V、V11~V17、V21~V27、V31~V36、V41~V45、V51~V57、Vc:通孔 +S、-S:電壓檢測端子 T1:一端 T2:另一端 VM:電壓檢測部 W、W11、W12、W21、W22、W41~W45:配線 WB:多層基板 S1~S7、S11~S16、S17~S24、S26、S27、S51~S55、S61~S66、S71~S74、S101~S106、S301~S303、S401~S403、S501~S507:步驟1: substrate inspection system 2: substrate inspection device 3: inspection instruction information generating device 4U, 4L: measuring jig 12: measuring block 13: scanner unit 20: control unit 21: inspection processing unit 22, 32: storage unit 31: Inspection instruction information generating part 110: substrate fixing device 112: frame 121, 122: measuring part 125: moving mechanism B, B1 to B5, WB1, WB2: substrate BS, BS1, F1, F2: substrate surface BS2: contact surface CS , CM: power supply D1, D1', D1'': conductive structure information D2: inspection instruction information +F, -F: current terminals Fip1, Fip2: flags I, I 1 , I 2 : current IP, IPa, IPd : Planar conductors L, L1, L2, L4: wiring layer Lc: conductor layer LL1: first selection layer LL2: second selection layer (selection layer) LT1, LT2: inspection layers M, M11 to M14, M21 to M23, M41~M47, Mr1~Mr6: branch MB: intermediate substrate MP: metal plates N, N11, N12, N21, N41, N42: node NR: root node P, P1~P7, P11~P17, PA, PB, PA1~ PF1, PA2 to PF2: conductive parts Pr: probes R1 to R4: resistances RA to RF, V, V11 to V17, V21 to V27, V31 to V36, V41 to V45, V51 to V57, Vc: through hole +S, -S: Voltage detection terminal T1: One end T2: The other end VM: Voltage detection section W, W11, W12, W21, W22, W41 to W45: Wiring WB: Multilayer substrates S1 to S7, S11 to S16, S17 to S24, S26 , S27, S51 to S55, S61 to S66, S71 to S74, S101 to S106, S301 to S303, S401 to S403, S501 to S507: Steps

圖1是概念性地表示本發明一實施方式的基板檢查系統1的構成的示意圖。 圖2是表示圖1中所示的測定部的電氣構成的一例的方塊圖。 圖3是表示作為檢查對象的基板的一例的剖面圖。 圖4是表示作為檢查對象的基板的一例的平面圖。 圖5是圖示將圖3中所示的基板B的導電結構資訊D1簡單化而成的導電結構資訊D1'的一例的圖。 圖6是圖示利用樹狀結構來表達圖5中所示的導電結構資訊D1'的導電結構資訊D1''的圖。 圖7是表示本發明一實施方式的檢查指示資訊產生方法、及使用該檢查指示資訊產生方法的檢查指示資訊產生裝置的運作的一例的流程圖。 圖8是表示本發明一實施方式的檢查指示資訊產生方法、及使用該檢查指示資訊產生方法的檢查指示資訊產生裝置的運作的一例的流程圖。 圖9是表示本發明一實施方式的檢查指示資訊產生方法、及使用該檢查指示資訊產生方法的檢查指示資訊產生裝置的運作的一例的流程圖。 圖10是表示本發明一實施方式的基板檢查方法、及使用該基板檢查方法的基板檢查裝置的運作的一例的流程圖。 圖11是表示本發明一實施方式的檢查指示資訊產生方法的第一工序的一例的流程圖。 圖12是表示本發明一實施方式的檢查指示資訊產生方法的與連接於根節點(root node)的分支(branch)相關的處理的一例的流程圖。 圖13是表示本發明一實施方式的檢查指示資訊產生方法的與連接於根節點的分支相關的處理的一例的流程圖。 圖14是表示本發明一實施方式的檢查指示資訊產生方法的第二工序的一例的流程圖。 圖15是圖5的部分放大圖。 圖16是表示圖6中所示的導電結構資訊D1''的另一例的說明圖。 圖17是表示圖3中所示的基板的另一例的說明圖。 圖18是表示檢查指示資訊的一例的表形式的說明圖。 圖19是表示圖1中所示的基板檢查裝置的運作的一例的流程圖。 圖20是表示圖1中所示的基板檢查裝置的運作的一例的流程圖。 圖21是表示圖1中所示的基板檢查裝置的運作的一例的流程圖。 圖22是表示包括面狀導體的基板的一例的概念性示意圖。 圖23是表示包括面狀導體的基板的一例的概念性示意圖。 圖24是用於說明測定圖22中所示的多層基板WB的通孔及面狀導體IP的電阻值的測定方法的說明圖。FIG. 1 is a schematic diagram conceptually showing the configuration of a substrate inspection system 1 according to an embodiment of the present invention. FIG. 2 is a block diagram showing an example of the electrical configuration of the measurement unit shown in FIG. 1. 3 is a cross-sectional view showing an example of a substrate to be inspected. 4 is a plan view showing an example of a substrate to be inspected. FIG. 5 is a diagram illustrating an example of the conductive structure information D1′ obtained by simplifying the conductive structure information D1 of the substrate B shown in FIG. 3. FIG. 6 is a diagram illustrating the use of a tree structure to express the conductive structure information D1 ″ of the conductive structure information D1 ′ shown in FIG. 5. 7 is a flowchart showing an example of the operation of an inspection instruction information generation method and an inspection instruction information generation device using the inspection instruction information generation method according to an embodiment of the present invention. 8 is a flowchart showing an example of the operation of an inspection instruction information generation method and an inspection instruction information generation device using the inspection instruction information generation method according to an embodiment of the present invention. 9 is a flowchart showing an example of the operation of an inspection instruction information generation method and an inspection instruction information generation device using the inspection instruction information generation method according to an embodiment of the present invention. 10 is a flowchart showing an example of the operation of a substrate inspection method according to an embodiment of the present invention and a substrate inspection apparatus using the substrate inspection method. 11 is a flowchart showing an example of the first step of the inspection instruction information generating method according to an embodiment of the present invention. 12 is a flowchart showing an example of processing related to a branch connected to a root node in the method for generating inspection instruction information according to an embodiment of the present invention. 13 is a flowchart showing an example of processing related to a branch connected to a root node in the inspection instruction information generating method according to an embodiment of the present invention. 14 is a flowchart showing an example of a second step of the method for generating inspection instruction information according to an embodiment of the present invention. Fig. 15 is a partially enlarged view of Fig. 5. FIG. 16 is an explanatory diagram showing another example of the conductive structure information D1″ shown in FIG. 6. 17 is an explanatory diagram showing another example of the substrate shown in FIG. 3. 18 is an explanatory diagram showing a table format of an example of inspection instruction information. FIG. 19 is a flowchart showing an example of the operation of the substrate inspection apparatus shown in FIG. 1. 20 is a flowchart showing an example of the operation of the substrate inspection apparatus shown in FIG. 1. 21 is a flowchart showing an example of the operation of the substrate inspection apparatus shown in FIG. 1. 22 is a conceptual schematic diagram showing an example of a substrate including a planar conductor. 23 is a conceptual schematic diagram showing an example of a substrate including planar conductors. FIG. 24 is an explanatory diagram for explaining a measurement method of measuring the resistance values of the through holes and the planar conductor IP of the multilayer substrate WB shown in FIG. 22.

S101~S106:步驟 S101~S106: Steps

Claims (18)

一種檢查指示資訊產生裝置,是用於檢查基板的檢查指示資訊產生裝置,所述基板包括:作為設置有擴展成面狀或網狀的導電性的面狀導體的層的導體層、設置有多個導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔,所述檢查指示資訊產生裝置包括: 儲存部,儲存表示所述基板的所述面狀導體、所述導電部、所述配線、及所述通孔如何導通連接的導電結構資訊;以及 檢查指示資訊產生部,當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,根據所述導電結構資訊,執行如下的檢查指示資訊產生處理:自所述各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示所述經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來記錄。An inspection instruction information generating device is an inspection instruction information generating device for inspecting a substrate, the substrate including a conductor layer as a layer provided with a conductive planar conductor expanded into a planar or mesh shape, Substrate surface of each conductive portion, a wiring layer as a layer laminated between the conductor layer and the substrate surface, a via hole connecting the wiring of the wiring layer to the conductive portion, and the wiring layer The through hole of the wiring of the conductor and the planar conductor of the conductor layer, the inspection instruction information generating device includes: A storage part, storing conductive structure information indicating how the planar conductor, the conductive part, the wiring, and the through hole of the substrate are conductively connected; and The inspection instruction information generating section, when there are a plurality of groups of the conductive sections that are mutually connected via the wiring of the wiring layer, perform the following inspection instruction information generation processing based on the conductive structure information: Each group selects one pair of the conductive parts as the first selection conductive part, and records information indicating the selected pairs of the first selection conductive parts as inspection instruction information. 如申請專利範圍第1項所述的檢查指示資訊產生裝置,其中所述檢查指示資訊產生處理包括如下的工序: (a)根據所述導電結構資訊,將經由所述配線層的配線而相互導通的所述導電部彼此群組化;以及 (b)針對所述經群組化的多個群組,自所述各群組中所包含的導電部中選擇兩個導電部作為所述一對第一選擇導電部,並將所述經選擇的多對第一選擇導電部設為可同時進行檢查的檢查部位而記錄於所述檢查指示資訊。The inspection instruction information generation device as described in item 1 of the patent application scope, wherein the inspection instruction information generation processing includes the following steps: (A) grouping the conductive parts that are connected to each other via the wiring of the wiring layer based on the conductive structure information; and (B) For the plurality of grouped groups, select two conductive parts from the conductive parts included in each group as the pair of first selection conductive parts, and The selected multiple pairs of the first selection conductive portions are set as inspection sites that can be inspected simultaneously and recorded in the inspection instruction information. 如申請專利範圍第2項所述的檢查指示資訊產生裝置,其中所述(b)工序進而於存在具有未被選擇為所述第一選擇導電部的導電部的群組的情況下,針對所述群組,將包含所述未被選擇為第一選擇導電部的導電部的兩個導電部作為應與所述多對第一選擇導電部不同時地進行檢查的一對第二選擇導電部,記錄於所述檢查指示資訊。The inspection instruction information generating device as described in item 2 of the patent application scope, wherein the step (b) further proceeds in the case where there is a group of conductive parts not selected as the first selection conductive part In the group, two conductive portions including the conductive portion that is not selected as the first selected conductive portion are used as a pair of second selected conductive portions that should be inspected at different times from the multiple pairs of first selected conductive portions , Recorded in the inspection instruction information. 如申請專利範圍第2項或第3項所述的檢查指示資訊產生裝置,其中所述基板包括多層所述配線層,進而包括將所述多個配線層間連接的多個通孔, 所述檢查指示資訊產生部進而執行如下的工序:(d)於多個所述配線層的配線並聯連接的情況下,於所述(a)工序之前,以將所述經並聯連接的多個配線替換成所述各配線之中最接近所述基板面的一個配線的方式,變更所述導電結構資訊,且 根據由所述(d)工序所變更的導電結構資訊,執行所述檢查指示資訊產生處理。The inspection instruction information generating device according to item 2 or item 3 of the patent application scope, wherein the substrate includes a plurality of the wiring layers, and further includes a plurality of through holes connecting the plurality of wiring layers, The inspection instruction information generating unit further executes the following process: (d) in the case where the wirings of the plurality of wiring layers are connected in parallel, before the (a) process, to connect the plurality of parallel connected Replacing the wiring with the one closest to the substrate surface among the wirings, changing the conductive structure information, and Based on the conductive structure information changed by the step (d), the inspection instruction information generating process is executed. 如申請專利範圍第4項所述的檢查指示資訊產生裝置,其中所述檢查指示資訊產生部進而執行如下的工序:(e)於藉由所述配線與所述面狀導體而將所述通孔或通孔的行並聯連接的情況下,於所述(a)工序之前,以將所述經並聯連接的通孔或通孔的行替換成一個通孔或一行通孔的方式,變更由所述(d)工序所變更的導電結構資訊,且 根據由所述(e)工序所變更的導電結構資訊,執行所述檢查指示資訊產生處理。The inspection instruction information generating device as described in item 4 of the patent application scope, wherein the inspection instruction information generating section further performs the following steps: (e) by connecting the wiring and the planar conductor If the rows of holes or through-holes are connected in parallel, before the step (a), replace the rows of through-holes or through-holes connected in parallel with one through-hole or row of through-holes. Information of the conductive structure changed in the step (d), and Based on the conductive structure information changed by the step (e), the inspection instruction information generating process is executed. 如申請專利範圍第2項至第5項中任一項所述的檢查指示資訊產生裝置,其中所述基板包括多層所述配線層,進而包括將所述多個配線層間連接的多個通孔, 所述檢查指示資訊產生部(f)將所述多個配線層之中,最接近所述基板面的配線層作為處理對象來執行所述(a)工序及(b)工序, (g)針對除所述最接近所述基板面的配線層以外的其他配線層,將所述其他配線層分別作為處理對象, (g1)針對成為所述處理對象的所述配線層的各配線,對應於其中一個配線,對於與所述一個配線的遠離所述導體層之側連接的一個通孔,選擇一個在所述一個通孔的與所述配線相反側進行電性連接的所述導電部,藉此針對對應的所述各配線,將所述經選擇的導電部群組化, (g2)針對於所述(g1)工序中經群組化的群組,執行所述(b)工序,且 所述(b)工序將所述各對的第一選擇導電部與所述處理對象的配線層建立對應而記錄於所述檢查指示資訊。The inspection instruction information generating device according to any one of claims 2 to 5, wherein the substrate includes multiple layers of the wiring layer, and further includes a plurality of through holes connecting the plurality of wiring layers , The inspection instruction information generating unit (f) executes the steps (a) and (b) using the wiring layer closest to the substrate surface among the plurality of wiring layers as a processing target, (G) For other wiring layers other than the wiring layer closest to the substrate surface, the other wiring layers are respectively treated as objects, (G1) For each wiring of the wiring layer to be processed, corresponding to one of the wirings, for one through hole connected to the side of the one wiring away from the conductor layer, select one of the The conductive portions of the through holes electrically connected to the opposite side of the wiring, thereby grouping the selected conductive portions for each corresponding wiring, (G2) For the grouped group in the (g1) process, perform the (b) process, and In the step (b), the first selection conductive portion of each pair is associated with the wiring layer to be processed and recorded in the inspection instruction information. 如申請專利範圍第6項所述的檢查指示資訊產生裝置,其中所述(b)工序自於所述(f)工序及(g)工序中,將接近所述基板面的配線層選擇為處理對象者起,依次將所述多對第一選擇導電部針對所述各配線層進行排序後記錄於所述檢查指示資訊。The inspection instruction information generating device according to item 6 of the patent application scope, wherein the step (b) is selected from the steps (f) and (g), and the wiring layer close to the substrate surface is selected as the process Starting from the target person, the pairs of first selection conductive portions are sequentially sorted for the respective wiring layers and recorded in the inspection instruction information. 如申請專利範圍第1項至第7項中任一項所述的檢查指示資訊產生裝置,其中(h)針對與所述面狀導體的一側連接的各通孔,選擇一個在與所述面狀導體相反側進行電性連接的所述導電部,藉此將所述經選擇的導電部作為與所述面狀導體的一側對應的導電部而群組化,自所述經群組化的導電部中選擇兩個導電部作為一對第一選擇導電部,並將所述經選擇的一對第一選擇導電部記錄於所述檢查指示資訊。The inspection instruction information generating device according to any one of the items 1 to 7 of the patent application scope, wherein (h) for each through hole connected to one side of the planar conductor, select one The conductive portion electrically connected to the opposite side of the planar conductor, thereby grouping the selected conductive portion as a conductive portion corresponding to one side of the planar conductor, from the group Two conductive parts are selected as a pair of first selection conductive parts among the converted conductive parts, and the selected pair of first selection conductive parts are recorded in the inspection instruction information. 如申請專利範圍第3項所述的檢查指示資訊產生裝置,其中所述檢查指示資訊產生處理更包括如下的工序: (j)探索不被所述第一選擇導電部的對包夾、且不被所述第二選擇導電部的對包夾的所述配線;以及 (k)將與所述經探索的配線的一端不經由所述配線而導通的導電部、及與所述配線的另一端不經由所述配線而導通的導電部作為應與所述多對第一選擇導電部不同時地進行檢查的一對第三選擇導電部,記錄於所述檢查指示資訊。The inspection instruction information generation device as described in item 3 of the patent application scope, wherein the inspection instruction information generation processing further includes the following steps: (J) Explore the wiring that is not sandwiched by the first selection conductive portion and not sandwiched by the second selection conductive portion; and (K) A conductive portion that is connected to one end of the searched wiring without passing through the wiring, and a conductive portion that is connected to the other end of the wiring without passing through the wiring are regarded as A pair of third selection conductive portions that are not simultaneously checked by the selection conductive portion are recorded in the inspection instruction information. 如申請專利範圍第1項至第9項中任一項所述的檢查指示資訊產生裝置,其中所述基板面及所述配線層分別設置於所述導體層的兩側,且 所述檢查指示資訊產生部對所述導體層的兩側執行所述檢查指示資訊產生處理。The inspection instruction information generating device according to any one of items 1 to 9 of the patent application scope, wherein the substrate surface and the wiring layer are provided on both sides of the conductor layer, and The inspection instruction information generation unit performs the inspection instruction information generation process on both sides of the conductor layer. 如申請專利範圍第10項所述的檢查指示資訊產生裝置,其中所述基板包括多個所述導體層、及將所述多個導體層的所述面狀導體彼此連接的通孔,且 所述檢查指示資訊產生處理更包括如下的工序: (l)將所述兩側的基板面的一側的基板面的導電部中的一個、及另一側的基板面的導電部中的一個作為應與所述多對第一選擇導電部不同時地進行檢查的一對第四選擇導電部,記錄於所述檢查指示資訊。The inspection instruction information generating device according to item 10 of the patent application range, wherein the substrate includes a plurality of the conductor layers, and a through hole connecting the planar conductors of the plurality of conductor layers to each other, and The inspection instruction information generation processing further includes the following steps: (L) One of the conductive portions on the substrate surface on one side of the two substrate surfaces and one of the conductive portions on the substrate surface on the other side should be different from the pair of first selective conductive portions A pair of fourth selection conductive parts that are inspected from time to time are recorded in the inspection instruction information. 如申請專利範圍第1項至第11項中任一項所述的檢查指示資訊產生裝置,其中所述檢查指示資訊產生部進而執行如下的工序:(m)使所述通孔對應於節點,使所述配線對應於分支,使所述面狀導體對應於根節點,藉此將所述導電結構資訊轉換成樹狀結構的資料結構,且 根據藉由所述(m)工序而轉換成樹狀結構的導電結構資訊,執行所述檢查指示資訊產生處理。The inspection instruction information generating device according to any one of the first to eleventh items of the patent application scope, wherein the inspection instruction information generating section further performs the following process: (m) making the through hole correspond to a node, Making the wiring correspond to a branch, and making the planar conductor correspond to a root node, thereby converting the conductive structure information into a tree structure data structure, and Based on the conductive structure information converted into a tree structure by the (m) process, the inspection instruction information generation process is performed. 一種基板檢查系統,包括: 如申請專利範圍第1項至第12項中任一項所述的檢查指示資訊產生裝置;以及 檢查處理部,根據所述檢查指示資訊來檢查所述基板;且 所述檢查處理部執行如下的工序: (c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線。A substrate inspection system, including: The inspection instruction information generating device as described in any one of items 1 to 12 of the patent application scope; and The inspection processing unit inspects the substrate according to the inspection instruction information; and The inspection processing unit performs the following steps: (C1) For a plurality of pairs of first selection conductive portions indicated by the inspection instruction information, a first current supply process that causes current to flow between the pair of first selection conductive portions is simultaneously performed, and the paired first selection is detected The voltage between the conductive parts is selected, and the through holes and wiring of the current path between the first selected conductive parts of the pairs are inspected based on the current and the voltage. 一種基板檢查系統,包括: 如申請專利範圍第3項所述的檢查指示資訊產生裝置;以及 檢查處理部,根據所述檢查指示資訊來檢查所述基板;且 所述檢查處理部執行如下的工序: (c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線;以及 (c2)與所述第一電流供給處理不同時地執行使電流流入由所述檢查指示資訊表示的成對的第二選擇導電部間的第二電流供給處理,並檢測所述成對的第二選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述成對的第二選擇導電部間的電流路徑的通孔與配線。A substrate inspection system, including: The inspection instruction information generating device as described in item 3 of the patent application scope; and The inspection processing unit inspects the substrate according to the inspection instruction information; and The inspection processing unit performs the following steps: (C1) For a plurality of pairs of first selection conductive portions indicated by the inspection instruction information, a first current supply process that causes current to flow between the pair of first selection conductive portions is simultaneously performed, and the paired first selection is detected Selecting the voltage between the conductive parts, and checking the through holes and wiring of the current path between the first selected conductive parts of each pair based on the current and the voltage; and (C2) The second current supply process that causes a current to flow between the pair of second selection conductive portions indicated by the inspection instruction information is not performed at the same time as the first current supply process, and the paired first Two select the voltage between the conductive parts, and check the through holes and wiring of the current path between the pair of second selected conductive parts based on the current and the voltage. 一種基板檢查系統,包括: 如申請專利範圍第7項所述的檢查指示資訊產生裝置;以及 檢查處理部,根據所述檢查指示資訊來檢查所述基板; 所述檢查處理部按照由所述檢查指示資訊表示的順序,針對所述各配線層執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,且 於所述(c1)工序的檢查的結果為不良的情況下,不執行對於所述順序為下一個以後的配線層的所述(c1)工序。A substrate inspection system, including: The inspection instruction information generating device as described in item 7 of the patent application scope; and The inspection processing section inspects the substrate according to the inspection instruction information; The inspection processing section performs the following steps for each wiring layer in the order indicated by the inspection instruction information: (c1) For multiple pairs of first selection conductive portions indicated by the inspection instruction information, simultaneously executes A current flows into the first current supply process between the pair of first selection conductive parts, and the voltage between the pair of first selection conductive parts is detected, and based on the current and the voltage, the first A via hole and wiring for selecting a current path between conductive parts, and When the result of the inspection of the (c1) step is defective, the (c1) step for the wiring layer whose sequence is next to the following is not executed. 一種基板檢查系統,包括: 如申請專利範圍第10項所述的檢查指示資訊產生裝置;以及 檢查處理部,根據所述檢查指示資訊來檢查所述基板; 所述檢查處理部執行如下的工序:(c1)對於由所述檢查指示資訊表示的多對第一選擇導電部,同時執行使電流流入成對的第一選擇導電部間的第一電流供給處理,並檢測所述成對的第一選擇導電部間的電壓,根據所述電流與所述電壓,檢查所述各對的第一選擇導電部間的電流路徑的通孔與配線,且 於所述(c1)工序中,同時執行對於藉由所述檢查指示資訊而與所述導體層的一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理、及對於與所述導體層的另一側建立了對應的所述多對第一選擇導電部的所述第一電流供給處理。A substrate inspection system, including: The inspection instruction information generating device as described in item 10 of the patent application scope; and The inspection processing section inspects the substrate according to the inspection instruction information; The inspection processing section executes the following steps: (c1) For a plurality of pairs of first selection conductive sections indicated by the inspection instruction information, a first current supply process that causes current to flow between the paired first selection conductive sections is simultaneously performed And detect the voltage between the pair of first selection conductive parts, and check the through holes and wiring of the current path between the first selection conductive parts of each pair based on the current and the voltage, and In the step (c1), the first current supply process for the plurality of pairs of first selection conductive portions that correspond to one side of the conductor layer by the inspection instruction information, And the first current supply process for the pairs of first selection conductive portions that correspond to the other side of the conductor layer. 一種檢查指示資訊產生方法,包括檢查指示資訊產生工序,所述檢查指示資訊產生工序根據表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀或網狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔, 當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,執行如下的檢查指示資訊產生處理:自所述各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示所述經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來產生。A method for generating inspection instruction information includes an inspection instruction information generation process, the inspection instruction information generation process based on conductive structure information indicating how a planar conductor, a conductive portion, a wiring, and a via of a substrate are electrically connected. The substrate includes: A conductor layer provided with a layer of conductive planar conductors expanded into a planar or mesh shape, a substrate surface provided with a plurality of the conductive portions, and a layer laminated on the conductor layer and the substrate surface A wiring layer of an interlayer, a through hole connecting the wiring of the wiring layer to the plurality of conductive portions, and a through hole connecting the wiring of the wiring layer to the planar conductor of the conductor layer, When there are a plurality of groups of the conductive parts that are mutually connected via the wiring of the wiring layer, the following inspection instruction information generation process is performed: a pair of the conductive parts is selected from each group as the The first selection conductive part, and generates information indicating the selected pairs of first selection conductive parts as inspection instruction information. 一種檢查指示資訊產生程式,使電腦根據表示基板的面狀導體、導電部、配線、及通孔如何導通連接的導電結構資訊,所述基板包括:作為設置有擴展成面狀或網狀的導電性的所述面狀導體的層的導體層、設置有多個所述導電部的基板面、作為積層於所述導體層與所述基板面之間的層的配線層、將所述配線層的配線與所述多個導電部連接的通孔、以及將所述配線層的配線與所述導體層的面狀導體連接的通孔, 當存在多個經由所述配線層的配線而相互導通的所述導電部彼此的群組時,執行如下的檢查指示資訊產生處理:自所述各群組中各選擇一對所述導電部作為第一選擇導電部,並將表示所述經選擇的多對第一選擇導電部的資訊作為檢查指示資訊來產生。An inspection instruction information generating program that causes a computer to provide information on the conductive structure indicating how the planar conductors, conductive portions, wiring, and through holes of the substrate are connected. The substrate includes: Conductive layer of the planar conductor layer, a substrate surface provided with a plurality of conductive portions, a wiring layer as a layer laminated between the conductor layer and the substrate surface, the wiring layer Through holes that connect the wiring to the plurality of conductive portions, and through holes that connect the wiring of the wiring layer to the planar conductor of the conductor layer, When there are a plurality of groups of the conductive parts that are mutually connected via the wiring of the wiring layer, the following inspection instruction information generation process is performed: a pair of the conductive parts is selected from each group as the The first selection conductive part, and generates information indicating the selected pairs of first selection conductive parts as inspection instruction information.
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