JP2005326193A - Board test method - Google Patents

Abstract

[PROBLEMS] A board test by a mobile prober has various wiring conditions and parts external shapes, etc., and taking into account these, securing a necessary detection rate and obtaining minimum test data is an issue. It was.
[Solution]
Board test data is created from connection information, component information, resist information, and the like extracted from board design data. In particular, means for selecting proxy probe points including through-holes for points that cannot be probed, means for selecting only the shortest point of measurement candidates in short fault tests, and expected values of part characteristics based on connection information of analog parts By having a means for automatically calculating the test data, it is possible to reduce the amount of test data without reducing the test data creation man-hours and the test quality.
[Selection] Figure 1

Description

  The present invention belongs to a board test technique using a moving prober that does not require a fixture among printed circuit board testers.

  The moving prober is a tester equipped with a plurality of test probes that are not fixed to the substrate. When test data describing the measurement location and measurement method is given to the moving prober, the prober is brought into contact with the pads on the board and the terminal of the component to perform the test. Mobile probers have the advantage of reducing initial investment because there is no need to prepare test jigs (hereinafter “fixtures”) for each board type, but there is a problem that it takes a long test time to test sequentially with a small number of probers. . Test data can be created manually, by extracting and creating measurement points from the board design data, or by extracting measurement points for specific parts of the board based on the board design data. The method of making was taken.

JP 2002-131364 A

  Creating measurement points manually requires not only man-hours, but also has the problem that test quality is low, such as measurement omissions. Further, the method for comprehensively obtaining the measurement points from the board design data has a problem that the measurement points are redundant and the test time is increased. Even when only effective measurement points are selected manually from exhaustively obtained measurement points in order to reduce the test time, the number of debugging steps for ensuring test quality is large. In addition, there are various wiring conditions and parts external shapes, and it has been a problem to obtain minimum test data after securing a necessary detection rate in consideration of these. In addition, when extracting measurement points for a specific part such as a part where wiring is intricate based on the design data of the board, there are cases where redundant measurement points are output if the measurement range is incorrectly specified.

  An object of the present invention is to provide a system that creates test data for a mobile probe test with a short test time and good test quality.

In order to achieve the above object, the present invention realizes selection of the minimum measurement point with good quality from the following information given to the board information and the external control information of the board design data with a minimum of human intervention. It is a thing.
Recognition of probe availability:
(1) It is provided with outline information of the mounted component so that the area within the outline range can be grasped from the mounting position of the mounted component, and the probe outline area is determined within the outline range of the mounted part.
(2) The resist information is included in the substrate information so that the location where the resist is affixed on the substrate can be grasped, and the location where the resist is affixed is determined to be an unprobable region.
(3) The silk information is provided in the board information so that the silk line drawing location on the board can be grasped, and the place where the silk line is drawn is determined to be a non-probe area.
Measurement point selection (including proxy measurement point selection):
The measurement point selection means for open fault testing is as follows.
(1) The board information includes information on the pad position and the through hole position on the wiring pattern so that each point is selected as a measurement point at least once. However, when the obtained measurement point is included in the probe impossible region, another probe position on the same connection is set as the measurement point.
The measuring point selection means for the short fault test is as follows.
(1) Provide terminal information of mounted components so that the distance between terminals can be grasped, and the short failure test target range is recognized from the pin pitch of the short failure test target in the external control information specified separately, and the terminal location where the component is located Among the other terminal groups that fall within the short fault test target range, the point between the nearest terminal groups is taken as the measurement point. In addition, by using external control information separately, it is possible to use a terminal having a part as a reference and use it as a measurement point between all other terminals that fall within the short failure test target range. However, when the obtained measurement point is included in the probe impossible region, another probe position on the same connection is set as the measurement point.
Calculation of expected characteristic test of analog parts:
(1) When equipped component characteristic information is provided and the mounted component is an analog component connected in parallel on the board, the component characteristic information is indicated by a composite value corresponding to the connection content.

  According to the present invention, board test data for a moving probe can be automatically created from board design data, and an efficient measurement point can be selected from a large number of measurement candidate points, reducing test data creation man-hours. However, the amount of test data can be reduced. In addition, the test time can be shortened by reducing the amount of test data.

An example of the system configuration of the present invention is shown in FIG.
In this embodiment, the board information 10 including the connection information on the board and the information on the mounted parts, the external control information 20 for externally controlling the operation of the system, the board information 10 and the external control information 20 are used. The measurement point selection unit 30 and the board information 10 extract information such as a probeable location on the board and a selection criterion for the measurement point, and select a coordinate position on the board that can be probed and is effective for detecting a failure as a measurement point. And the external control information 20, the analog component characteristics and connection information are extracted, the expected value calculation unit 40 for calculating the expected value of the measurement result, and the movement prober output from the measurement point selection unit 30 and the expected value calculation unit 40. Test data 50 and a moving prober 60. Hereinafter, the system elements will be described individually.

First, details of the board information 10 will be described with reference to FIG.
The board information 10 includes connection information 100 and component information 110.

  The data structure of the connection information 100 includes a net name (101) that is an index of connection, classification data (102) indicating either a component surface or a solder surface, and classification data (102) indicating whether the location is a pad or a through hole. 103), coordinate data (104) of the pad / through hole on the substrate, shape of the pad / through hole (105), external coordinate data (106) of the pad / through hole on the substrate, pad / through hole It consists of location data (107) of the component connected to the, and pin name (108) of the component. From these connection information, it can be recognized that pads / through holes having the same net name are connected on the substrate.

The data structure of the component information 110 includes a component location (111) indicating a mounting location of the component on the board, and whether the component is one of a resistor / capacitor / diode / crystal / inductor / IC / connector / other component. It consists of classification data (112), resistance value of the part, part characteristic data (113) indicating capacitance, and external coordinate data (114) on the board of the part. By referring to the component information 110, it is possible to recognize a characteristic value such as the type and resistance value of the component.
Further, by referring to the pad / through hole coordinates 104 of the connection information 100 and the external coordinates 114 of the corresponding parts of the component information 110, it is possible to recognize whether the pad / through hole is covered with the mounted component. It can be determined whether the pad / through hole can be probed.

  The resist information 120 indicates resist sticking position information on the substrate, and includes classification data (121) indicating either a component surface or a solder surface, shape data (122) and coordinate data (123) of a portion without resist sticking. It consists of.

  The silk line information 130 indicates the position information of the silk line on the substrate, and includes classification data (131) indicating either the component surface or the solder surface, silk line shape data (132), coordinate data (133), and the like. It consists of Both of the resist information 120 and the silk line information 130 can be used for determining whether or not the pad / through hole can be probed.

Next, details of the external control information 20 will be described with reference to FIG.
The external control information 20 includes execution mode information 200, short failure information 210, and measurement exclusion information 220.

  The data structure of the execution mode information 200 is composed of instruction information (201 to 203) indicating whether or not various board test data are created.

  The data structure of the short failure information 210 includes measurement range data (211) indicating the measurement range for performing the short failure test by the distance between the pads, and only the shortest distance among the measurement points within the range is set as the test target. And execution mode instruction data (212) for switching whether to perform or not. The method of using these short fault information will be described in detail later.

  The measurement exclusion information 220 is information for excluding an arbitrary place when there is a part on the substrate that is not desired for some reason, and the data structure directly indicates the coordinates to be excluded from the measurement. (221) and a measurement exclusion location (222) indicating the location of the part.

Next, details of the measurement point selection unit 20 will be described with reference to FIGS.
FIG. 4 shows the overall processing of the measurement point selection unit. In processing 302 and 303, coordinates that are not probed (or cannot be detected) are recognized and used in measurement point selection processing for each test data described later. In step 304, external control information is read, the type of test data to be created is acquired, and a selection process corresponding to the type of data is performed. In this embodiment, a method for selecting measurement points for an open failure test and a short failure test will be described. The selection of the measurement point for the characteristic test of the analog component is not particularly described because it can be easily derived from the component information 110 and the board information.

  First, a method for selecting a measurement point for an open fault test will be described with reference to FIG. An open failure is a disconnection failure of wiring. In processing 402, one point of the pad / through-hole coordinates 104 is extracted from the connection information 100, and in processing 403, whether or not the coordinates can be probed is determined based on the probe availability information described above. If the probe cannot be probed, another pad / through hole is selected again (processing 403, 404, 402). If probing is possible in process 403, another pad / through hole with the same net name is extracted, and it is similarly determined whether probing is possible. If probing is possible, the coordinates of the two points are added together with the previously selected coordinates. The measurement point is output (process 406). The coordinates once output as the measurement point are left as one of the coordinates and the other one is excluded from the measurement point candidates and is not handled as the measurement point thereafter (in process 408). Other unprocessed pad / through-hole coordinates are extracted with the same net name, and all the pads / through-holes on the same net are processed in the same manner, and the processing is terminated. These processes are performed for all connection groups.

  For example, when there are five pads on the same net as shown in FIG. 6, at least four measurements are required as in cases 1 and 2. Also, it seems that the test between 451-452, 452-454, and 454-455 can be performed with only the measurement points of 451 and 455, but between 451 and 452 if 451-455 is short-circuited. , 452-454 and 454-455 cannot be detected. Incidentally, in the case of case 2, when 451-455 is short-circuited, only an open failure between 451-452 cannot be detected, but since 451-455 is short-circuited, there is no functional problem.

Next, a method for selecting measurement points for a short fault test will be described with reference to FIG. A short-circuit failure is a failure in which a portion that is originally electrically insulated becomes short-circuited due to a cause such as solder leakage. In process 502, the measurement range 211 to be subjected to the short fault test is read from the short fault information 210. In processing 504, 505, and 503, the origin of the measurement point is selected, and in processing 507, 508, and 509, a measurement point in the measurement range is selected. The measurement range corresponds to a circle in FIG. 8, and is information that indicates how much range is to be tested from the 551 pin when performing a short failure test of the 551 pin of the component 550. The wider the range, the more test candidates and the number of measurement points. In the short fault test method according to the present invention, the closest measurement point candidate within the measurement range is adopted as the measurement point (processing 509). This is due to the fact that many common short-circuit failures occur due to solder leakage when mounting components. In this case, the distance between the pads closer to the origin and the pads closer to the origin is normal, but farther from the origin. It is unlikely that a short circuit failure will occur with the pad. In FIG. 8, pin 554 is in the measurement range, but it is not adopted as a measurement point. In addition, according to the measurement range execution mode 212, it is possible to switch between adopting only the closest point in the range or adopting the points in the entire range.
In processing 510 and 511, it is checked whether or not the origin of the measurement point and the measurement point within the range are pins of the same part having conductivity such as resistance. This is because it is not necessary to perform a short test. For example, in the case of the chip resistor component of FIG. 9, 562 pins that are the same component pins are included in the measurement range from the measurement point origin 560. When a short test between 560 and 562 is performed, the resistor is a conductive component, so that it appears as a short circuit failure, and the test result is erroneous. Since these conductive parts are tested separately as part characteristics, there is no problem even if a short circuit failure test is not performed. In process 513, the measurement point origin and measurement point candidate points are output as measurement points for the short fault test. The above is processed in the same way for all the pads, and the process is terminated.

FIG. 10 shows an example of a countermeasure when a pin cannot be probed due to a BGA package or the like.
Reference numeral 570 denotes a BGA package component. Since the package pin 571 is hidden between the substrate 572 and the component 570, a short circuit failure test cannot be performed as it is. Therefore, a through hole as shown by 574 is inserted and drawn out to the pad 573 on the back side of the substrate when designing the substrate. If the pad spacing of the pads 573 is made equal to the pin spacing of the BGA package pins, it is possible to select a measurement point for a short failure test for the pad 574 without being particularly conscious of the measurement point selection.

Next, details of the expected value calculation unit 40 will be described with reference to FIG. The expected value calculation unit is a part for calculating an expected value (normal value) of the test result for the analog component characteristic test. When an analog component is mounted alone on the board, the characteristic of the component is extracted from the component information 110 as in processing 604, and the processing ends.
However, if another component is connected in parallel to the component, the characteristics change, and the test result is incorrect. As in processes 602, 603, and 605, the connection information of the part is read to check the presence / absence of the parallel part. When the parallel part exists, a composite value corresponding to the type of the part is calculated and output as an expected value. . For example, in the case of a resistance value, the combined resistance value = 1 / (1 / R1 + 1 / R2 +... 1 / Rn) (Rn is the resistance value of each resistance component). These processes are executed for all analog parts, and the process ends.

According to the present embodiment, since candidate points for measurement points are obtained from board information and component information, there is no measurement omission and there is an effect of improving test quality.
Further, according to the present embodiment, since the minimum measurement point is selected according to the test type, there is an effect of reducing the test data amount and consequently shortening the test time.
In addition, according to the present embodiment, it is possible to indirectly perform a short failure test by appropriately creating a substitute measurement location by a through hole in advance for a pad that cannot be probed by using a BGA package component or the like. , Has the effect of increasing test quality.

It is a figure which shows the system configuration | structure of this invention. It is a figure which shows the data structure of the board | substrate information referred by this invention. It is a figure which shows the data structure of the external control information referred by this invention. It is a whole flowchart of the measurement point calculation part of this invention. It is a flowchart of the measurement point calculation part for open failure tests of this invention. It is a supplementary explanatory drawing of the measuring point calculation method for a short fault test. It is a flowchart of the measurement point calculation part for the short fault test of this invention. It is a supplementary explanatory drawing of the calculation method of the measurement point for short fault tests. It is a supplementary explanatory drawing of the calculation method of the measurement point for short fault tests. It is a supplementary explanatory drawing of the calculation method of the measurement point for short fault tests. It is a flowchart of the expected value calculation part for the analog component characteristic test of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Board | substrate information 20 External control information 30 Measurement point calculation part 40 Expected value calculation part 50 Test data for moving probers 60 Moving probers 100-108 Connection information 110-114 Component information 120-123 Resist information 130-133 Silk line information 200-203 Execution mode information 210 to 212 Short failure information 220 to 222 Measurement exclusion information 451 to 455 Pad 550 Component body 551 to 554 Component pins 560 to 564 Chip resistor pins 570 BGA package component 571 BGA package component pins 572 Substrate 573 Solder side Pad 574 through hole

Claims (1)

Input a plurality of measurement points and judgment values consisting of coordinate data on the board on which the electronic circuit component is mounted, and measure the measurement points one by one with a plurality of moving probe pins one after the other, wiring pattern short-circuit failure, disconnection failure In testing a board using a moving prober that detects electrical failures of mounted components,
Using board information to be tested and external control information, the board information includes board surface information, pad information on a wiring pattern, through-hole information on a wiring pattern, wiring pattern connection information, and on-board information. Mounting position information, component type information, rating information according to component type, component shape information, component terminal information, silk line position information on the board, and resist on the board The information on the board surface includes a classification of a component surface and a solder surface of the board, the pad information on the wiring pattern includes coordinate position information on the board of the pad, and the information on the wiring pattern. The through-hole information includes coordinate position information on the substrate of the through-hole, and the wiring pattern connection information includes connection information between pads and through-holes defined by the pad information and through-hole information. The mounting position information of the mounted component includes the type of the component and the arrangement coordinate information of the component on the board, and the component type information includes any of a logical component, a diode, a resistor, a capacitor, an inductor, and other components. The rating information according to the type of the component includes a resistance value when the component is a resistor, and information on a capacitance when the component is a capacitor. And external information by coordinates with a certain point of the component as the origin. The terminal information of the component includes information on the connection of the terminal of the component to any pad or through hole on the substrate. The line position information includes coordinate position information on the silk line substrate, the resist position information on the substrate includes coordinate position information on the resist substrate, and the external instruction information includes an execution mode. Information, short failure information, and measurement exclusion information, and the execution mode information includes information indicating whether or not to create test data for each of open failure, short failure, and analog component characteristics. The failure information includes a maximum pad-to-pad distance assuming a short-circuit failure, and indication information as to whether or not a short-circuit failure assumption related to each pad is limited to a pad closest to the pad. The exclusion information includes coordinates on the board to be excluded from the measurement point target or component mounting position information in the board information, and whether or not to measure the coordinate position of each pad or through-hole is determined in the component shape information or silk on the board. Judgment is made based on the distance from the coating range indicated by the position information of the line or the resist position information on the substrate, and the execution mode information includes If there is an instruction to create test data for open faults, test data for confirming continuity is created from the wiring pattern connection information and measurable coordinate position information, and the test data for short faults is included in the execution mode information. If there is a creation instruction, create test data for confirming that there is no short between pads for each pad and a pad at a position to be assumed as a failure according to the short failure information from the pad. In the case where any of the coordinate positions of the pad is not measurable, a connected proxy measurable measurement coordinate is used, and the component type of the component connected between the pads is a resistor or an inductor. If there is an instruction to create analog part characteristics test data in the execution mode information, For a product, when the component type is resistance, data for measuring the resistance value between the two pads belonging to the component is used. When the component type is a capacitor, the capacitance between the two pads belonging to the component is used. Data for measuring values is created, and in the creation, if any coordinate position of the pad is not measurable, a measurable proxy measurement coordinate connected to the pad is used, and a plurality of the pads are measured. A board test system characterized in that, when components are connected, a combined value between the pads is set as an expected value of measurement using rating information of the plurality of components.

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