WO2020054214A1

WO2020054214A1 - Inspection instruction information generation device, substrate inspection system, inspection instruction information generation method, and inspection instruction information generation program

Info

Publication number: WO2020054214A1
Application number: PCT/JP2019/028270
Authority: WO
Inventors: 雅也椹木
Original assignee: 日本電産リード株式会社
Priority date: 2018-09-14
Filing date: 2019-07-18
Publication date: 2020-03-19
Also published as: CN112689769A; CN112689769B; JP7352840B2; JPWO2020054214A1; TWI846729B; KR102707838B1; KR20210060542A; TW202018314A

Abstract

In the present invention, on the basis of conduction structure information D1 indicating how a planar conductor IP, a plurality of conduction parts P, wiring W, and a via V are conductively connected in a substrate comprising a conductor layer Lc, a substrate surface F upon which the conduction parts P are provided, a wiring layer L, and the via V, if there are a plurality of groups of conduction parts P electrically connected to each other via the wiring W of the wiring layer L, inspection instruction information generation processing is carried out in which conduction parts P are selected from the groups one pair at a time as first selected conduction parts and information indicating a plurality of the pairs of first selected conduction parts that have been selected is generated as inspection instruction information D2.

Description

Inspection instruction information generation device, substrate inspection system, inspection instruction information generation method, and inspection instruction information generation program

The present invention relates to an inspection instruction information generating apparatus that generates inspection instruction information for instructing an inspection position when inspecting a substrate, a substrate inspection system that performs an inspection using the inspection instruction information, an inspection instruction information generating method, and The present invention relates to an inspection instruction information generation program.

2. Description of the Related Art Conventionally, when a measurement object such as a via provided on a circuit board penetrates from one surface to the other surface of a circuit board, a measurement current is applied to the measurement object and the measurement object is measured. 2. Description of the Related Art There is known a board inspection apparatus that measures a voltage generated in a substrate and measures a resistance value of the measurement target from the current value and the voltage value (for example, see Patent Document 1).

JP-A-2012-117991

By the way, in a substrate provided with a conductor that spreads in a plane (hereinafter, referred to as a plane conductor), conductive portions such as pads, bumps, and wiring on the surface of the substrate and the plane conductor are electrically connected in the thickness direction of the substrate. There is a board with a connected structure.

FIG. 22 is a conceptual schematic diagram showing a multi-layer substrate WB which is an example of a substrate provided with a planar conductor IP which is a conductor pattern which spreads planarly in an inner layer of the substrate. The multilayer substrate WB shown in FIG. 22 has conductive portions PA and PB such as pads and wiring patterns provided on the substrate surface BS. The conductive portions PA and PB are electrically connected to the planar conductor IP by vias RA and RB. In the example of the multilayer substrate WB, the planar conductor IP corresponds to the planar conductor.

Further, as a method of manufacturing a substrate, a printed wiring board is laminated on both sides of a conductive metal plate as a base, and the formed substrate is peeled off from the base metal plate to form two printed wiring boards. There is a method of forming a substrate. In such a method for manufacturing a substrate, the substrate before the substrate is separated from the base metal plate (hereinafter, referred to as an intermediate substrate) has an aspect in which the metal plate is sandwiched between two substrates. . Such an intermediate substrate is also called a carrier substrate.

FIG. 23 is a conceptual schematic diagram showing an example of such an intermediate substrate MB. In the intermediate substrate MB shown in FIG. 23, a substrate WB1 is provided on one surface of a metal plate MP, and a substrate WB2 is provided on the other surface of the metal plate MP. On the substrate surface BS1 of the substrate WB1, conductive portions PA1, PB1,..., PF1 such as pads and wiring patterns are provided. Conductive portions PA2, PB2,..., PF2 such as pads and wiring patterns are provided on a contact surface BS2 of the substrate WB1 with the metal plate MP. The metal plate MP is, for example, a conductive metal plate having a thickness of about 1 mm to 10 mm.

(4) The conductive portions PA1 to PF1 are electrically connected to the conductive portions PA2 to PF2 through vias RA to RF. Since the conductive portions PA2 to PF2 are in close contact with and conductive to the metal plate MP, the conductive portions PA1 to PF1 are electrically connected to the metal plate MP by the vias RA to RF. The conductive part PA1 and the via RA form a pair, the conductive part PB1 and the via RB form a pair, and the conductive part and the via respectively form a pair. The substrate WB2 has the same configuration as the substrate WB1, and a description thereof will be omitted. In the example of the intermediate substrate MB, the metal plate MP corresponds to a planar conductor.

(4) As an inspection of the multilayer substrate WB, the intermediate substrate MB, and the like, the resistance values Ra, Rb of the vias RA, RB may be measured.

In FIG. 24, the resistance of the equivalent resistance of the planar conductor IP is represented by R1 to R4. In order to measure the resistance values Ra and Rb of the vias RA and RB, a measurement current I flows between the conductive portions PA1 and PB1, and a voltage V generated between the conductive portions PA1 and PB1. Is measured, and the resistance value is calculated as V / I. Thus, the V / I, on the current path from the conductive part PA1 in the conductive portion PB1, two locations via RA, the resistance value of the RB Ra, and Rb, the resistance value _{R 1} of the sheet conductor IP resistor R1 Is obtained.

Here, in FIG. 24, the conductive portions PA1 to PE1 are described in a straight line for the sake of space. However, in an actual substrate, the conductive portions PA1 to PE1 are two-dimensionally distributed on the substrate surface. Therefore, resistance against the electric current _{I 1} by selecting the pair of conductive parts PA1, PC1 for the measurement, the electric current _{I 2} to select another pair of conductive portions PB1, PD1, the current _I 1, _{I 2} The current paths may overlap.

In the example shown in FIG. 24, current overlap occurs in the resistor R2. In this case, the conductive part PA1, the voltage between the _{_{_{PC1 V = I 1 (Ra +}}} R 1 + R 2 + Rc) + I 2 becomes _{R 2.} Assuming that I ₁ = I ₂ , V / I ₁ = (Ra + R ₁ + R ₂ + Rc) + R _2. Therefore, the resistance value R ₂ is added to the resistance value (Ra + R ₁ + R ₂ + Rc) to be measured. As a result of obtaining the resistance value, the resistance measurement accuracy is reduced.

Therefore, the inspection must be performed one by one between the pair of conductive parts so that the measurement current does not overlap, and the inspection time of the entire substrate increases.

An object of the present invention is to provide an inspection instruction information generating apparatus that generates inspection instruction information indicating an inspection location where the inspection time of a substrate can be easily reduced, a board inspection system including the inspection instruction information generating apparatus, and an inspection instruction information generating method. And an inspection instruction information generation program.

Inspection instruction information generating device according to an example of the present invention, a conductor layer that is a layer provided with a conductive planar conductor that spreads in a plane, a substrate surface provided with a plurality of conductive portions, and the conductor layer A wiring layer which is a layer laminated between the substrate surface, a via connecting the wiring of the wiring layer and the plurality of conductive portions, and a wiring of the wiring layer and a planar conductor of the conductive layer. A storage section for storing conductive structure information indicating how the planar conductor, the conductive section, the wiring, and the via are electrically connected to each other on a substrate including a via to be connected, and a wiring in the wiring layer When there are a plurality of groups of the conductive parts that are electrically connected to each other via the conductive structure information, based on the conductive structure information, the conductive parts are selected as a first selected conductive part from each of the groups, and the selected plurality is selected. The information indicating the first selected conductive part of the pair And an inspection instruction information generating unit for executing a test instruction information generating process of recording a test instruction information.

Further, a board inspection system according to an example of the present invention includes the above-described inspection instruction information generating device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, wherein the inspection processing unit comprises: (c1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and the first A step of detecting a voltage between the selected conductive parts and inspecting vias and wiring of a current path between the first selected conductive parts of each pair based on the current and the voltage.

Further, a board inspection system according to an example of the present invention includes the above-described inspection instruction information generating device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, wherein the inspection processing unit comprises: (c1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and the first Detecting a voltage between the selected conductive portions, and testing vias and wiring of a current path between each pair of the first selected conductive portions based on the current and the voltage; (c2) the test instruction information Between the second selected conductive portions forming a pair, the first current supply process performs a second current supply process of flowing current in a non-parallel manner, and the voltage between the paired second selected conductive portions is And based on the detected current and voltage, Via the current path between the conductive portion and executes the step of examining the wiring.

In addition, a board inspection system according to an example of the present invention includes the above-described inspection instruction information generation device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, wherein the inspection processing unit (C1) a first current flowing between a pair of first selected conductive portions with respect to a plurality of pairs of first selected conductive portions indicated by the inspection instruction information for each of the wiring layers in the order indicated by the information; The supply process is performed in parallel, the voltage between the pair of first selected conductive units is detected, and based on the current and the voltage, the via of the current path between the pair of first selected conductive units and A step of inspecting the wiring is performed, and if the result of the inspection in the step (c1) is defective, the step (c1) is not performed on the wiring layer having the next or subsequent order.

Further, a board inspection system according to an example of the present invention includes the above-described inspection instruction information generating device, and an inspection processing unit that inspects the substrate based on the inspection instruction information, wherein the inspection processing unit comprises: (c1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and the first Detecting a voltage between the selected conductive parts, and inspecting vias and wiring of a current path between the pair of first selected conductive parts based on the current and the voltage, and performing the step (c1). In the first current supply processing for the plurality of pairs of first selected conductive portions associated with one side of the conductor layer by the inspection instruction information, and the first current supply process associated with the other side of the conductor layer A plurality of pairs of the first selected conductive portions, Executed in parallel and a current supply process.

In addition, the inspection instruction information generating method according to an example of the present invention may further include a conductive layer that is a layer provided with a conductive planar conductor that spreads in a plane, a substrate surface provided with a plurality of conductive portions, and the conductive layer. A wiring layer that is a layer laminated between a layer and the substrate surface; a via that connects the wiring of the wiring layer to the plurality of conductive parts; a wiring of the wiring layer and a planar conductor of the conductor layer The wiring of the wiring layer is formed based on conductive structure information indicating how the planar conductor, the conductive portion, the wiring, and the via are electrically connected to each other on the substrate including a via that connects the wiring layer and the via. When there are a plurality of groups of the conductive portions that are electrically connected to each other, a pair of the conductive portions is selected as a first selected conductive portion from each of the groups, and the selected plural pairs of the first selected conductive portions are selected. Information as inspection instruction information. Including inspection instruction information generation step of executing the test instruction information generating process.

1 is a schematic diagram conceptually showing a configuration of a board inspection system 1 according to an embodiment of the present invention. FIG. 2 is a block diagram illustrating an example of an electrical configuration of a measurement unit illustrated in FIG. 1. It is sectional drawing which shows an example of the board | substrate used as a test object. FIG. 2 is a plan view illustrating an example of a substrate to be inspected. 4 illustrates an example of conductive structure information D1 ′ obtained by simplifying the conductive structure information D1 of the substrate B illustrated in FIG. 3. 6 is a diagram illustrating conductive structure information D1 ″ that is obtained by expressing the conductive structure information D1 ′ illustrated in FIG. 5 in a tree structure. 4 is a flowchart illustrating an example of an inspection instruction information generating method according to an embodiment of the present invention and an operation of an inspection instruction information generating apparatus using the inspection instruction information generating method. 4 is a flowchart illustrating an example of an inspection instruction information generating method according to an embodiment of the present invention and an operation of an inspection instruction information generating apparatus using the inspection instruction information generating method. 4 is a flowchart illustrating an example of an inspection instruction information generating method according to an embodiment of the present invention and an operation of an inspection instruction information generating apparatus using the inspection instruction information generating method. 4 is a flowchart illustrating an example of a board inspection method according to an embodiment of the present invention and an operation of a board inspection apparatus using the board inspection method. 5 is a flowchart illustrating an example of a first step in a test instruction information generating method according to an embodiment of the present invention. It is a flowchart which shows an example of the process regarding the branch connected to the root node in the test | inspection instruction information generation method which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the process regarding the branch connected to the root node in the test | inspection instruction information generation method which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the 2nd process in the test | inspection instruction information generation method which concerns on one Embodiment of this invention. It is the elements on larger scale of FIG. FIG. 7 is an explanatory diagram illustrating another example of the conductive structure information D1 ″ illustrated in FIG. 6. FIG. 4 is an explanatory diagram illustrating another example of the substrate illustrated in FIG. 3. FIG. 9 is an explanatory diagram in a table format showing an example of inspection instruction information; 3 is a flowchart illustrating an example of an operation of the substrate inspection device illustrated in FIG. 3 is a flowchart illustrating an example of an operation of the substrate inspection device illustrated in FIG. 3 is a flowchart illustrating an example of an operation of the substrate inspection device illustrated in FIG. It is a conceptual schematic diagram which shows an example of the board | substrate provided with the planar conductor. It is a conceptual schematic diagram which shows an example of the board | substrate provided with the planar conductor. 23 is an explanatory diagram for describing a measuring method for measuring a resistance value of a via and a planar conductor IP of the multilayer substrate WB illustrated in FIG. 22. FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each of the drawings, configurations denoted by the same reference numerals indicate the same configurations, and the description thereof will be omitted. The board inspection system 1 shown in FIG. 1 includes an inspection instruction information generation device 3 and a board inspection device 2.

The inspection instruction information generating device 3 shown in FIG. 1 includes an inspection instruction information generating unit 31 and a storage unit 32. The inspection instruction information generating apparatus 3 is configured using a computer such as a personal computer, for example, and executes a predetermined arithmetic processing (CPU (Central Processing Unit)), a RAM for temporarily storing data (Random Access Memory), A non-volatile storage device such as an HDD (Hard Disk Drive) and / or a flash memory, a communication circuit, and peripheral circuits thereof are provided.

Then, the inspection instruction information generating device 3 functions as the inspection instruction information generating unit 31 by executing the inspection instruction information generating program according to the embodiment of the present invention stored in, for example, a nonvolatile storage device. The storage unit 32 is configured using, for example, the above-described nonvolatile storage device.

The storage unit 32 stores the conductive structure information D1. The conductive structure information D1 may be transmitted from the outside to the inspection instruction information generating device 3 via, for example, a communication circuit (not shown), and the transmitted conductive structure information D1 may be stored in the storage unit 32. By reading the conductive structure information D1 stored in a storage medium such as a USB (Universal Serial Bus) memory by the inspection instruction information generating device 3, the conductive structure information D1 may be stored in the storage unit 32. The conductive structure information D1 can be stored in the storage unit 32.

The conductive structure information D1 is information indicating how the planar conductor IP, the conductive portion P, the wiring W of each wiring layer L, and the via V of the substrate B described later are conductively connected. As the conductive structure information D1, for example, so-called Gerber data used in the manufacture of a substrate and / or a netlist can be used.

(4) The inspection instruction information generating unit 31 generates inspection instruction information D2 for instructing the board inspection apparatus 2 on a pair of conductive parts P to which a current is to flow for inspection based on the conductive structure information D1. The inspection instruction information generating unit 31 may transmit the inspection instruction information D2 to the board inspection apparatus 2 via a communication circuit (not shown), for example. Alternatively, the inspection instruction information generation unit 31 may write the inspection instruction information D2 on a storage medium. Then, the user may cause the board inspection apparatus 2 to read the inspection instruction information D2 from the storage medium. Details of the operation of the inspection instruction information generation unit 31 will be described later.

基板 The board inspection apparatus 2 shown in FIG. 1 is an apparatus for inspecting a board B which is an inspection target board to be inspected.

The substrate B is, for example, an intermediate substrate or a multilayer substrate, and includes a printed wiring substrate, a film carrier, a flexible substrate, a ceramic multilayer wiring substrate, a semiconductor substrate such as a semiconductor chip and a semiconductor wafer, a package substrate for a semiconductor package, a liquid crystal display and a plasma display. Electrode plate, an intermediate substrate in the process of manufacturing these substrates, or a so-called carrier substrate. The multilayer board WB shown in FIG. 22 and the intermediate board MB shown in FIG. 23 correspond to an example of the board B which is the board to be inspected.

基板 The board inspection apparatus 2 shown in FIG. In the internal space of the housing 112, the substrate fixing device 110, the measuring unit 121, the measuring unit 122, the moving mechanism 125, and the control unit 20 are mainly provided. The substrate fixing device 110 is configured to fix the substrate B at a predetermined position.

The measuring unit 121 is located above the substrate B fixed to the substrate fixing device 110. The measurement unit 122 is located below the substrate B fixed to the substrate fixing device 110. The

measurement units

121 and 122 include

measurement jigs

4U and 4L for bringing the probe into contact with a plurality of conductive units provided on the substrate B.

A plurality of probes Pr are attached to the measuring

jigs

4U and 4L. The measurement jigs 4U and 4L arrange and hold a plurality of probes Pr so as to correspond to the arrangement of the conductive parts to be measured provided on the surface of the substrate B. The moving mechanism 125 appropriately moves the measuring

units

121 and 122 in the housing 112 in accordance with a control signal from the control unit 20, and brings the probes Pr of the measuring

jigs

4U and 4L into contact with each conductive unit of the substrate B.

Note that the board inspection apparatus 2 may include only one of the

measurement units

121 and 122, and the board B may be provided with a conductive unit on only one side. In addition, the board inspection apparatus 2 may perform measurement on both sides of the board to be inspected by using either one of the measurement units to turn the board to be inspected upside down.

The control unit 20 includes, for example, a CPU (Central Processing Unit) that executes predetermined arithmetic processing, a RAM (Random Access Memory) that temporarily stores data, and a ROM (Read Only Memory) that stores a predetermined control program. , A non-volatile storage unit 22 such as a hard disk drive (HDD), and peripheral circuits thereof. The control unit 20 functions as the inspection processing unit 21 by executing, for example, a control program stored in the storage unit 22.

(2) The measurement unit 121 shown in FIG. 2 includes a scanner unit 13, a plurality of measurement blocks 12, and a plurality of probes Pr. The measuring section 122 is configured in the same manner as the measuring section 121, and thus the description thereof is omitted.

The measurement block 12 includes power supply units CS and CM, and a voltage detection unit VM. The power supply units CS and CM are constant current circuits that output a current I according to a control signal from the control unit 20. The power supply unit CS allows the current I to flow in a direction to be supplied to the scanner unit 13, and the power supply unit CM allows the current I to flow in a direction drawn from the scanner unit 13. The voltage detection unit VM is a voltage detection circuit that measures a voltage and transmits the voltage value to the control unit 20.

The scanner unit 13 is a switching circuit configured using switching elements such as a transistor and a relay switch. The scanner unit 13 includes current terminals + F and -F for supplying a current I for resistance measurement to the substrate B, and a voltage detection terminal + S and a voltage detection terminal + S for detecting a voltage generated between the conductive parts of the substrate B due to the current I. -S corresponding to the plurality of measurement blocks 12. Further, a plurality of probes Pr are electrically connected to the scanner unit 13. The scanner unit 13 switches the connection relationship between the current terminals + F, -F and the voltage detection terminals + S, -S and the plurality of probes Pr according to a control signal from the control unit 20.

The power supply unit CS has one output terminal connected to the circuit ground and the other end connected to the current terminal + F. The power supply section CM has one output terminal connected to the circuit ground and the other end connected to the current terminal -F. The voltage detection unit VM has one end connected to the voltage detection terminal + S and the other end connected to the voltage detection terminal -S.

{Circle around (2)} In accordance with the control signal from the control unit 20, the scanner unit 13 is capable of electrically connecting the current terminals + F, -F and the voltage detection terminals + S, -S to an arbitrary probe Pr. Thus, the scanner unit 13 allows the current I to flow between any of the conductive parts that the probe Pr is in contact with, and detects the voltage V generated between the conductive parts in accordance with the control signal from the control unit 20. It is made possible to measure by VM.

Since a plurality of measurement blocks 12 are provided, current supply and voltage measurement can be executed in parallel between a plurality of conductive parts.

Note that the power supply units CS and CM only need to be able to pass the current I to the substrate B via the scanner unit 13, and are not limited to an example in which one ends of the power supply units CS and CM are connected to the circuit ground. For example, the current loop may be formed by connecting one end of the power supply unit CS and one end of the power supply unit CM.

Accordingly, the control unit 20 outputs a control signal to the scanner unit 13 to cause the plurality of power units CS and CM to cause the current I to flow between an arbitrary plurality of pairs of probes Pr, and an arbitrary plurality of pairs of probes Pr. The voltage between them can be detected by the plurality of voltage detection units VM.

FIG. 3 also serves as an explanatory diagram illustrating the conductive structure information D1 of the substrate B. The conductive structure information D1 is not necessarily data represented by an image, but in the following description, the structure represented by the conductive structure information D1 will be described with reference to the drawings for easy understanding.

基板 The board B shown in FIG. 3 is a multilayer board in which five boards B1 to B5 are stacked. One surface of the substrate B is a substrate surface F1, and the other surface is a substrate surface F2. The boundary between the substrates B1 and B2 is the wiring layer L1, the boundary between the substrates B2 and B3 is the wiring layer L2, the boundary between the substrates B3 and B4 is the conductor layer Lc, and the boundary between the substrates B4 and B5 is the wiring layer L4.

導電 Conductive portions P1 to P7 are provided on the substrate surface F1, and conductive portions P11 to P17 are provided on the substrate surface F2. The conductive portions P1 to P7 and P11 to P17 are inspection points, such as pads, bumps, wirings, and electrodes, to which the probe Pr contacts.

The conductor layer Lc is provided with a planar conductor IP that is a conductor that spreads in a planar or mesh shape. The wiring layer L1 is provided with wirings W11 and W12, the wiring layer L2 is provided with wirings W21 and W22, and the wiring layer L4 is provided with wirings W41, W42 and W43 and the wirings W44 and W45. The planar conductor IP may have a shape of a single sheet, that is, a shape that spreads in a planar shape, and a conductor pattern such as wiring is combined in a regular or irregular mesh shape (mesh shape) to form a single layer. The conductor may have a shape that spreads in a plane as a whole.

In addition, FIG. 3 illustrates an example in which the planar conductor IP extends over substantially the entire area of the substrate B, but the planar conductor IP is not necessarily limited to an example that extends over substantially the entire area of the substrate B. The planar conductor IP may be provided only in a partial region of the substrate B. For example, the wiring W may be provided in a region of the conductor layer Lc where the planar conductor IP of the substrate B is not provided.

4 The substrate B shown in FIG. 4 includes a planar conductor IPa and a planar conductor IPd which are electrically separated from each other. The planar conductor IPa is used, for example, as an analog ground, and the planar conductor IPd is used, for example, as a digital ground. As shown in FIG. 4, the substrate B may include a plurality of planar conductors IP insulated from each other.

The wirings W41, W42, and W43 are a single wiring in which the wiring W41, the wiring W42, and the wiring W43 of the wiring layer L4 are continuous, but for convenience of description, each part of the single wiring W41, W42, and W43 is wired. These are referred to as W41, a wiring W42, and a wiring W43. Similarly, the wirings W44 and W45 are a single wiring in which the wiring W44 and the wiring W45 are continuous, and the wiring W44 and the wiring W45 are parts of the single wirings W44 and W45, respectively.

The substrate B is provided with vias V11 to V17 penetrating the substrate B1, the vias V21 to V27 penetrating the substrate B2, the vias V31 to V36 penetrating the substrate B3, and penetrating the substrate B4. Vias V41 to V45 are provided, and vias V51 to V57 penetrating the substrate B5 are provided.

The conductive structure information stored in the storage unit 22 includes the conductive units P1 to P7, P11 to P17, wirings W11, W12, W21, W22, W41 to W45, vias V11 to V17, V21 to V27, V31 to V36, V41 to V45, V51 to V57, and information indicating how the planar conductor IP is conductively connected, for example, information indicating the connection relationship illustrated in FIG.

Hereinafter, conductive portions such as the conductive portions P1 to P7 and P11 to P17 are collectively referred to as a conductive portion P, and wires such as the wires W11, W12, W21, W22, and W41 to W45 are collectively referred to as a wire W. V11 to V17, V21 to V27, V31 to V36, V41 to V45, V51 to V57, and the like are collectively referred to as a via V, and the wiring layers L1, L2, and L4 are collectively referred to as a wiring layer L.

Each conductive part P is conductively connected to the planar conductor IP via the via V and the wiring W. As described above, the wiring structure in which each conductive portion P is conductively connected to the planar conductor IP is generally used for connecting a circuit ground or a power supply pattern. Note that the substrate B may include wiring, pads, and the like that are not connected to the circuit ground and the power supply pattern.

When the substrate B is attached to the substrate fixing device 110, each probe Pr of the measuring section 121 is brought into contact with the conductive sections P1 to P7 by the moving mechanism 125, and each probe Pr of the measuring section 122 is brought into contact with the conductive sections P11 to P17. Touched. Thus, the measuring

units

121 and 122 allow the current I to flow between any pair of conductive parts P and detect the voltage between the pair of conductive parts P.

The measuring

units

121 and 122 may contact a current supply probe Pr and a voltage measurement probe Pr with one conductive portion P for resistance measurement by a so-called four-terminal resistance measurement method. For the resistance measurement by the terminal resistance measurement method, one probe Pr serving both as a current supply and a voltage measurement may be brought into contact with one conductive part P.

The inspection processing unit 21 controls the

measurement units

121 and 122 so that one of the pair of conductive units P selected as described later is supplied with the current I from the power supply unit CS (see FIG. 2), and the other is. The current I is drawn from the power supply unit CM (see FIG. 2) to supply the current I between the conductive parts P and detect the voltage between the conductive parts P. Based on the current and the voltage, the substrate B To inspect. For example, the inspection processing unit 21 can perform a resistance measurement by a four-terminal resistance measurement method or a two-terminal resistance measurement method based on the current and the voltage, and can inspect the substrate B based on the resistance value.

Hereinafter, the fact that the inspection processing unit 21 controls the measuring

units

121 and 122 to perform the current supply and the voltage detection is simply described as the inspection processing unit 21 supplying the current and detecting the voltage. I do. Details of the operation of the inspection processing unit 21 will be described later.

Next, the operation of the inspection instruction information generating device 3 will be described. The case where the inspection instruction information corresponding to the substrate B shown in FIG. 3 is generated will be described as an example. FIGS. 5 and 6 are explanatory diagrams showing an example of the conductive structure information D1 changed in the process of executing the inspection instruction information generating method when generating the inspection instruction information corresponding to the substrate B shown in FIG. Hereinafter, with reference to FIGS. 5 to 14, the operation of the inspection instruction information generating device 3 that executes the inspection instruction information generating method based on the inspection instruction information generating program according to one embodiment of the present invention will be described.

In the following flowcharts, the same processes are denoted by the same step numbers, and description thereof is omitted.

First, the inspection instruction information generating unit 31 performs a process of simplifying the connection structure indicated by the conductive structure information D1 as a pre-process before grouping the conductive units P of the substrate B. Specifically, when the wirings W of the plurality of wiring layers L are connected in parallel, the inspection instruction information generation unit 31 places the wirings W connected in parallel to the substrate surface F1 of the respective wirings W most. The conductive structure information D1 is duplicated and changed so as to replace with the close wiring W, and the conductive structure information D1 'is generated (step S1: (d) step).

{Specifically, in the substrate B shown in FIG. 3, the wirings W11 and W21 of the plurality of wiring layers L1 and L2 are connected in parallel by vias V21 and V22. In this case, for the conductive structure information D1, as shown in FIG. 5, the two wires W11 and W21 are replaced with one of the wires W11 and W21 closest to the substrate surface F1, and the conductive structure The information D1 'is generated. At this time, since one end of the via V22 is open, the data may be treated as not having the via V22. This simplifies the wiring structure of the substrate B, and facilitates subsequent processing.

Next, when the vias V or the columns of the vias V are connected in parallel by the wiring W and the planar conductor IP, the inspection instruction information generating unit 31 sets the vias V or the columns of the vias V connected in parallel to each other. The conductive structure information D1 'is changed so as to be replaced with one or one row of vias (step S2: (e) step).

Specifically, on the substrate B shown in FIG. 3, the vias V24 and V33 are connected in series to form a row, and the vias V25 and V34 are connected in series to form a row. The row of vias V24 and V33 and the row of vias V25 and V34 are connected in parallel by the wiring W12 and the planar conductor IP. In addition, via V32 and via V33 are connected in parallel by wiring W22 and planar conductor IP.

In this case, for example, as shown in FIG. 5, the columns of the vias V24 and V33 and the columns of the vias V25 and V34 are changed to one of the columns, for example, the columns of the vias V24 and V33, for the conductive structure information D1 '. The replacement is performed by replacing the via V32 and the via V33 with one via V, for example, the via V32.

{Circle around (4)} The vias V41 and V42 are connected in parallel by the series wiring of the wirings W41, W42 and W43 and the planar conductor IP. In this case, for example, as shown in FIG. 5, the vias V41 and V42 are replaced with one via V, for example, the via V41 on the conductive structure information D1. Further, vias V43, V44, V45 are connected in parallel by the wires W44, W45 and the planar conductor IP. In this case, for example, as shown in FIG. 5, the vias V43, V44, and V45 are replaced with one via V, for example, the via V43 for the conductive structure information D1 '. This simplifies the wiring structure of the substrate B, and facilitates subsequent processing.

Note that the inspection instruction information generation unit 31 does not necessarily need to execute steps S1 and S2, and sets the conductive structure information D1 in the data format representing the actual wiring structure of the substrate B shown in FIG. May be performed.

Next, the inspection instruction information generating unit 31 converts the data structure of the conductive structure information D1 'into a tree structure (step S3: (m) step). The conductive structure information D1 'converted into the tree structure is referred to as conductive structure information D1' '. As shown in FIG. 6, in the conductive structure information D1 ″, one wiring W is represented by one node N, the planar conductor IP is represented by a root node NR, and the via V is formed between the conductive part P and the node. , Or a branch M connecting nodes.

Note that the inspection instruction information generation unit 31 does not necessarily need to execute step S3, and executes the subsequent processing using the conductive structure information D1 and the conductive structure information D1 ′ in a data format representing the wiring structure of the substrate B. Is also good. In the following description, the processing for the node N is equivalent to the processing for the wiring W corresponding to the node N, the processing for the root node NR is equivalent to the processing for the planar conductor IP, and the processing for the branch M is The processing is the same as the processing for the wiring W corresponding to the node N.

In the example of the conductive structure information D1 ″ having a tree structure illustrated in FIG. 6, the node N11 corresponds to the wiring W11 (W21), the node N12 corresponds to the wiring W12, the node N21 corresponds to the wiring W22, and the node N41 corresponds to the wiring W22. The node N42 corresponds to the wirings W44, W45, corresponding to the wirings W41, W42, W43. Branch M11 is via V11 (V21), branch M12 is via V12 (V22), branch M13 is via V14, branch M14 is via V15, branch M22 is via V24 (V25), branch Mr1 is vias V21, V31, and branch. Mr2 is via V32 (V33), branch Mr3 is via V16, V26, V35, branch Mr4 is via V17, V27, V36, branch M41 is via V51, branch M42 is via V52, branch M43 is via V53, and branch M44 is via. V54, branch M45 corresponds to via V55, branch M46 corresponds to via V56, branch M47 corresponds to via V57, branch Mr5 corresponds to via V41 (V42), and branch Mr6 corresponds to via V43 (V44, V45).

Next, the inspection instruction information generation unit 31 selects the wiring layer L1 closest to the substrate surface F1 as the first selection layer LL1 and the wiring layer L4 closest to the substrate surface F2 as the second selection layer LL2 (Step S4: ( f) Step). The processing of steps S4 to S27 and S101 to S501 corresponds to an example of the inspection instruction information generation processing.

Next, the inspection instruction information generation unit 31 executes the first step (Step S5). Referring to FIG. 11, inspection instruction information generating section 31 performs, based on conductive structure information D1 ″, conductive section P of substrate surface F1 that is electrically connected to each other via node N (wiring W) of first selection layer LL1. These are grouped together (step S101: step (a) of step (f)).

Here, since the first selection layer LL1 is the wiring layer L1, in the tree-structured conductive structure information D1 '' shown in FIG. 6, the conductive portions P1 and P2 which are conductive via the node N11 of the first selection layer LL1 are grouped. And the conductive portions P4 and P5 that conduct through the node N12 of the first selection layer LL1 are grouped.

Next, for each group grouped in step S101, the inspection instruction information generation unit 31 selects two conductive units from among the conductive units P included in each group as a pair of first selected conductive units, It is recorded in the inspection instruction information D2 in association with the first selection layer LL1 (step S102: step (b) of step (f)). The first selection conductive part is information indicating conductive parts (inspection locations) that can be inspected in parallel.

In the example of FIG. 6, as the first selected conductive part, the conductive parts P1 and P2 from the group of the conductive parts P1 and P2 corresponding to the wiring layer L1, and the conductive parts P4 and P5 from the group of the conductive parts P4 and P5 are selected. . Hereinafter, a pair of the conductive part P1 and the conductive part P2 is described as a conductive part pair P1, P2.

Next, when there is a group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S101, the inspection instruction information generating unit 31 Two conductive portions P including the conductive portion P not selected as the first selected conductive portion are selected as a pair of second selected conductive portions, and are recorded in the inspection instruction information D2 in association with the first selected layer LL1 (step). S103: (b) step of (f) step). The second selected conductive part is information indicating a conductive part (inspection location) to be inspected non-parallel to the first selected conductive part.

In the example of FIG. 6, since there is no group having the conductive part P not selected as the first selected conductive part in the group of the conductive parts P1 and P2 and the group of the conductive parts P4 and P5, the inspection instruction information The generation unit 31 proceeds to the next step S104.

Next, based on the conductive structure information D1 '', the inspection instruction information generating unit 31 groups the conductive parts P on the substrate surface F2 which are electrically connected to each other via the node N (wiring W) of the second selection layer LL2. (Step S104: Step (a) of Step (f)).

Here, since the second selection layer LL2 is the wiring layer L4, the conductive portions P11, P12, and P13 that conduct through the node N41 of the second selection layer LL2 in the tree-structured conductive structure information D1 ″ illustrated in FIG. , P14 are grouped, and the conductive portions P15, P16, P17 conducting through the node N42 of the second selection layer LL2 are grouped.

Next, for each group grouped in step S104, the inspection instruction information generation unit 31 selects two conductive parts from the conductive parts P included in each group as a pair of first selected conductive parts. Is recorded in the inspection instruction information D2 in association with the second selection layer LL2 (step S105: step (b) of step (f)).

In the example of FIG. 6, as the first selected conductive part, any of the conductive parts P11, P12, P13, and P14, for example, any conductive part P11, P12, and any one of the conductive parts P15, P16, and P17, for example, any conductive part P15 , P16 are selected.

Next, when there is a group having a conductive part P not selected as the first selected conductive part among the groups grouped in step S104, the inspection instruction information generating unit 31 Two conductive portions P including the conductive portion P not selected as the first selected conductive portion are selected as a pair of second selected conductive portions, and are recorded in the inspection instruction information D2 in association with the second selected layer LL2 (step S106: The (b) step of the (f) step), the first step is finished, and the processing shifts to the step S7 (FIG. 7).

In the example of FIG. 6, in the group of the conductive parts P11, P12, P13, and P14 and the group of the conductive parts P15, P16, and P17, the conductive parts P13, P14, and the conductive part that are not selected as the first selected conductive parts. There is P17. In this case, the inspection instruction information generating unit 31 selects the conductive part pair P13, P14 and the conductive part pair P16, P17 as the second selected conductive part.

Returning to FIG. 7, the inspection instruction information generation unit 31 checks the flag Fip1, which is a control flag for controlling the processing (step S7).

When the flag Fip1 is 1 (YES in step S7), the flag Fip1 is already set to 1 in step S12 to be described later, and each wiring layer L on the substrate surface F1 side of the conductor layer Lc and the substrate surface F1 side of the conductor layer Lc. Means that the generation of the inspection instruction information D2 corresponding to. Has already been completed. Therefore, the inspection instruction information generation unit 31 proceeds to step S17 (FIG. 9) without executing steps S11 to S16.

When the flag Fip1 is not 1 (NO in step S7), the inspection instruction information generation unit 31 proceeds to step S11 (FIG. 8), and the conductor layer Lc is located on the side of the first selection layer LL1 that is away from the substrate surface F1. It is checked whether or not they are adjacent (step S11).

If the conductor layer Lc is adjacent to the first selection layer LL1 on the side away from the substrate surface F1 (YES in step S11), the inspection instruction information generation unit 31 sets the flag Fip1 to 1 (step S12), The process proceeds to step S301 (FIG. 12) in order to select a conductive part P used for inspection of the via V connected to the substrate surface F1 side of the conductor IP.

On the other hand, when the conductor layer Lc is not adjacent to the first selection layer LL1 on the side away from the substrate surface F1 (NO in step S11), the inspection instruction information generation unit 31 determines whether the first selection layer LL1 has the substrate surface F1. Is selected as a new first selection layer LL1 (step S13: step (g)). Thus, steps S14 to S16 are executed with the new first selection layer LL1 as a processing target.

{For example, in the example shown in FIG. 6, the first selection layer LL1 is the wiring layer L1. The conductor layer Lc is not adjacent to the wiring layer L1 on the side away from the substrate surface F1 (NO in step S11), and the wiring layer L2 adjacent to the wiring layer L1 on the side away from the substrate surface F1 is a new first layer. One selection layer LL1 is obtained (step S13).

Next, based on the conductive structure information D1 ″, the inspection instruction information generation unit 31 is connected to the node N of the first selection layer LL1 on the side away from the root node NR of the one node N corresponding to each of the nodes N. One of the branches M (via V) is electrically connected on the opposite side of the node N, that is, one conductive portion P of the substrate surface F1 that is conductive is selected. The inspection instruction information generation unit 31 groups the selected conductive units P for each corresponding node N (step S14: (g1) step).

In the example shown in FIG. 6, the node N21 is provided in the wiring layer L2 which is the first selection layer LL1. Branch M21 and branch M22 are connected to node N21. There is a conductive portion P3 as a conductive portion P on the substrate surface F1 that is directly or indirectly conductive to the side of the branch M21 opposite to the node N21. Therefore, the conductive part P3 corresponding to the branch M21 is selected. Conductive portions P4 and P5 are provided as conductive portions P on the substrate surface F1 that are directly or indirectly conductive to the side of the branch M22 opposite to the node N21. Any one of the conductive portions P4 and P5, for example, the conductive portion P4 is selected as the conductive portion P corresponding to the branch M22. Thereby, conductive portions P3 and P4 are grouped corresponding to node N21.

Next, for each group grouped in step S14, the inspection instruction information generation unit 31 selects any two conductive parts from the conductive parts P included in each group as a pair of first selected conductive parts. Then, it is recorded in the inspection instruction information D2 in association with the first selection layer LL1 (Step S15: Step (b) of the step (g2)).

In the example shown in FIG. 6, two conductive portions P3 and P4 are selected as a pair of first selected conductive portions from among the conductive portions P3 and P4 grouped in step S14.

For example, if the node N11 is not connected to the root node NR but is connected to the node N21 by the branch M23 as in the tree-structured conductive structure information D1 '' shown in FIG. There are conductive portions P1 and P2 as the conductive portions P on the substrate surface F1 that conducts directly or indirectly to the side opposite to N21. Any one of the conductive portions P1 and P2, for example, the conductive portion P1 is selected as the conductive portion P corresponding to the branch M23. Then, conductive portions P1, P3, and P4 obtained by adding conductive portion P1 to conductive portions P3 and P4 described above are grouped corresponding to node N21.

{Circle around (2)} In step S15, two conductive portions, for example, the conductive portions P1 and P3 are selected from the conductive portions P1, P3 and P4 as a pair of first selected conductive portions.

Next, when there is a group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S14, the inspection instruction information generating unit 31 Two conductive portions P including the conductive portion P not selected as one selected conductive portion are selected as a pair of second selected conductive portions, and are recorded in the inspection instruction information D2 in association with the first selected layer LL1 (step S16). : (G2) step (b) step), and then proceeding to step S17 (FIG. 9).

On the other hand, when there is no group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S14, the inspection instruction information generating unit 31 proceeds to step S17.

Next, the inspection instruction information generation unit 31 checks a flag Fip2 which is a control flag for controlling the processing (step S17).

If the flag Fip2 is 1 (YES in step S17), the flag Fip2 is already set to 1 in step S19 to be described later, and each wiring layer L on the substrate surface F2 side of the conductor layer Lc and the substrate surface F2 side of the conductor layer Lc. Means that the generation of the inspection instruction information D2 has already been completed. Therefore, the inspection instruction information generator 31 proceeds to step S26 (FIG. 10) without executing steps S18 to S24.

When the flag Fip2 is not 1 (NO in step S17), the inspection instruction information generation unit 31 proceeds to step S18, and determines whether the conductor layer Lc is adjacent to the second selection layer LL2 on the side away from the substrate surface F2. It is checked whether or not it is (step S18).

When the conductor layer Lc is adjacent to the second selection layer LL2 on the side away from the substrate surface F2 (YES in step S18), the inspection instruction information generation unit 31 sets the flag Fip2 to 1 (step S19), and The process proceeds to step S401 (FIG. 13) in order to select a conductive portion P used for inspection of the via V connected to the substrate surface F2 side of the conductor IP.

For example, in the example shown in FIG. 6, if the second selection layer LL2 is the wiring layer L4, the conductor layer Lc is adjacent to the wiring layer L4 on the side away from the substrate surface F2 (YES in step S18). From this, the flag Fip2 is set to 1 (step S19), and the routine goes to step S401 (FIG. 13).

Referring to FIG. 13, in step S401, the inspection instruction information generation unit 31 determines, for each branch M (via V) connected to the substrate surface F2 side of the root node NR (planar conductor IP), the root node NR Is electrically connected to the opposite side, that is, by selecting one conductive portion P to be conductive, the selected conductive portion P is grouped as a conductive portion corresponding to the substrate surface F2 side of the root node NR (step S401). : (H) step).

In the example shown in FIG. 6, the branches Mr5 and Mr6 are connected to the substrate surface F2 of the root node NR. The conductive portions P that conduct to the branch Mr5 include the conductive portions P11, P12, P13, and P14. The conductive portions P that conduct to the branch Mr6 include conductive portions P15, P16, and P17. Therefore, in step S401, any one of the conductive parts P11, P12, P13, and P14, for example, the conductive part P11 is selected, and any one of the conductive parts P15, P16, and P17, for example, the conductive part P15 Is selected. Thereby, the conductive portions P11 and P15 are grouped.

Next, the inspection instruction information generating unit 31 selects two conductive portions P from the conductive portions P grouped in step S401 as a pair of first selected conductive portions, and selects the root node NR on the substrate surface F2 side. It is recorded in the inspection instruction information D2 in association with each other (step S402: (h) step).

In step S402, two conductive parts P are selected as a pair of first selected conductive parts from the conductive parts P11 and P15 grouped in step S401. In this case, there are only two conductive portions P, P15 and P15, which are grouped in step S401, and these two conductive portions P11 and P15 are selected as a pair of first selected conductive portions.

Next, when there is a group having a conductive part P not selected as the first selected conductive part among the groups grouped in step S401, the inspection instruction information generating unit 31 Two conductive parts P including the conductive part P not selected as one selected conductive part are selected as a pair of second selected conductive parts, and are recorded in the inspection instruction information D2 in association with the substrate surface F2 side of the root node NR. (Step S403), the process proceeds to step S26 (FIG. 10).

Since there is no group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S401, the inspection instruction information generating part 31 directly performs the processing in step S26 (FIG. Go to 10).

Note that, instead of executing steps S402 and S403, the inspection instruction information generation unit 31 selects a plurality of pairs of conductive parts P so as to include all the conductive parts P selected in step S401, and selects a plurality of pairs of first conductive parts P. The selected conductive portion may be recorded in the inspection instruction information D2 in association with the substrate surface F2 side of the root node NR.

In this case, in an inspection performed by an inspection processing unit 21 described later, current is supplied in parallel to a plurality of pairs of first selection conductive units associated with the substrate surface F2 side of the root node NR, and the inspection is performed. Will be When current is supplied to a plurality of pairs of conductive parts P in parallel, current paths overlap. However, the electrical resistance of the root node NR, that is, the planar conductor IP is much smaller than that of the wiring W. Therefore, even when the current path overlaps in the planar conductor IP, the influence on the voltage measurement result is not affected. small.

Therefore, instead of executing steps S402 and S403, a plurality of pairs of conductive parts P are selected so as to include all the conductive parts P selected in step S401, and the plurality of pairs of first selected conductive parts are selected as the root node NR. By recording in the inspection instruction information D2 in association with the substrate surface F2 side, current is supplied in parallel to a plurality of pairs of the first selection conductive portions in the inspection by the inspection processing section 21 described later, thereby shortening the inspection time. It is possible to do.

On the other hand, when the conductor layer Lc is not adjacent to the second selection layer LL2 on the side away from the substrate surface F2 (NO in step S18), the inspection instruction information generating unit 31 determines whether the second selection layer LL2 has the substrate surface F2. Is selected as a new second selection layer LL2 (step S21: step (g)). Thus, steps S22 to S24 are executed with the new second selection layer LL2 as a processing target.

Next, based on the conductive structure information D1 ″, the inspection instruction information generating unit 31 is connected to the node N of the second selection layer LL2 on the side away from the root node NR of one of the nodes N. One of the branches M (via V) is electrically connected on the side opposite to the node N, that is, one conductive portion P of the substrate surface F2 that is conductive is selected. Then, the inspection instruction information generating unit 31 groups the selected conductive units P for each corresponding node N (step S22: (g1) step).

Next, for each group grouped in step S22, the inspection instruction information generation unit 31 selects any two conductive parts from the conductive parts P included in each group as a pair of first selected conductive parts. Then, it is recorded in the inspection instruction information D2 in association with the second selection layer LL2 (Step S23: Step (b) of the step (g2)).

Next, when there is a group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S22, the inspection instruction information generating unit 31 Two conductive parts P including the conductive part P not selected as one selected conductive part are selected as a pair of second selected conductive parts, and are recorded in the inspection instruction information D2 in association with the second selected layer LL2 (Step S24). : (G2) step (b) step), and then proceeding to step S26 (FIG. 10).

On the other hand, when there is no group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S22, the inspection instruction information generating unit 31 keeps step S23 to step S26 (FIG. Go to 10).

In the example shown in FIG. 6, that is, in the processing corresponding to the wiring layer L2 and the substrate surface F2 side of the planar conductor IP, there is no group having the conductive portion P not selected as the first selected conductive portion. The inspection instruction information generation unit 31 shifts the processing from step S23 to step S26 (FIG. 10) without recording the inspection instruction information D2.

Next, the inspection instruction information generator 31 checks whether or not inspection instruction information D2 corresponding to all the wiring layers L and the substrate surfaces F1 and F2 of the planar conductor IP has been generated (step S26).

(4) When the inspection instruction information D2 corresponding to all the wiring layers L and the substrate surfaces F1 and F2 of the planar conductor IP has been generated (YES in step S26), the process proceeds to step S27. On the other hand, when the wiring layer L or the planar conductor IP on the substrate surfaces F1 and F2 side where the corresponding inspection instruction information D2 has not yet been generated remains (NO in step S26), the process proceeds to step S11 (FIG. 8). I do.

In step S11, the inspection instruction information generating unit 31 checks whether or not the conductor layer Lc is adjacent to the first selection layer LL1 on the side away from the substrate surface F1 (step S11). In the example shown in FIG. 6, the first selection layer LL1 is now the wiring layer L2. Since the conductor layer Lc is adjacent to the wiring layer L2 on the side away from the substrate surface F1 (YES in step S11), the inspection instruction information generation unit 31 sets the flag Fip1 to 1 (step S12), and proceeds to step S301. The processing shifts to (FIG. 12).

In step S301, the inspection instruction information generating unit 31 conducts the conduction on the opposite side to the root node NR for each branch M (via V) connected to the substrate surface F1 side of the root node NR (plane conductor IP). By selecting one part P, the selected conductive part P is grouped as a conductive part corresponding to the substrate surface F1 side of the root node NR (step S301: (h) step).

In the example shown in FIG. 6, the branches Mr1, Mr2, Mr3, and Mr4 are connected to the substrate surface F1 side of the root node NR. The conductive portions P that conduct to the branch Mr1 include the conductive portions P1 and P2. The conductive portions P that conduct to the branch Mr2 include the conductive portions P3, P4, and P5. As the conductive portion P that is electrically connected to the branch Mr3, there is a conductive portion P6. The conductive portion P that is electrically connected to the branch Mr4 includes a conductive portion P7.

Therefore, in step S301, any one of the conductive portions P1 and P2, for example, the conductive portion P1 is selected, and any one of the conductive portions P3, P4, and P5, for example, the conductive portion P3 is selected. Further, conductive portions P6 and P7 are selected. Thereby, the conductive portions P1, P3, P6, and P7 are grouped.

Next, the inspection instruction information generating unit 31 selects any two conductive portions P from the conductive portions P grouped in step S301 as a pair of first selected conductive portions, and selects the substrate surface F1 of the root node NR. It is recorded in the inspection instruction information D2 in association with the side (step S302: (h) step).

In the example shown in FIG. 6, any two conductive portions P, for example, the conductive portions P1 and P3 are selected from the conductive portions P1, P3, P6, and P7 grouped in step S301 as a pair of first selected conductive portions. Selected.

Next, when there is a group having the conductive part P not selected as the first selected conductive part among the groups grouped in step S301, the inspection instruction information generating unit 31 Two conductive parts P including the conductive part P not selected as one selected conductive part are selected as a pair of second selected conductive parts, and recorded in the inspection instruction information D2 in association with the substrate surface F1 side of the root node NR. (Step S303), the process proceeds to Step S17 (FIG. 9).

In step S302, among the conductive portions P1, P3, P6, and P7 grouped in step S301, the conductive portions P6 and P7 are not selected as the first selected conductive portions. For a group of conductive portions P1, P3, P6 and P7 having a conductive portion P not selected as one selected conductive portion, two conductive portions including conductive portions P6 and P7 not selected as the first selected conductive portion. P, in this case, the conductive portions P6 and P7 are selected as a pair of second selected conductive portions (step S303).

In step S303, for example, when the conductive parts included in the group are three conductive parts P1, P3, and P6, and only one conductive part P6 is not selected as the first selected conductive part, the conductive part P6 And one of the conductive portions P1 and P3 is selected as a pair of second selected conductive portions.

Note that, similarly to steps S402 and S403 described above, instead of executing steps S302 and S303, the inspection instruction information generating unit 31 includes a plurality of pairs of conductive units P so as to include all the conductive units P selected in step S301. May be selected and recorded in the inspection instruction information D2 in association with the substrate surface F1 side of the root node NR as a plurality of pairs of first selected conductive portions. For example, the inspection instruction information generating unit 31 pairs the conductive units P1, P3 and the conductive units P6, P7 from the conductive units P1, P3, P6, P7 grouped in step S301, and , P3 and the conductive portions P6, P7 may be recorded in the inspection instruction information D2 in association with the substrate surface F1 side of the root node NR as a plurality of pairs of first selected conductive portions.

Next, in step S17 (FIG. 9), since the flag Fip2 is now 1, the inspection instruction information generating unit 31 shifts the processing to step S26 (FIG. 10).

In step S26, since the processes of steps S5 to S403 have been performed on all the wiring layers L and the substrate surfaces F1 and F2 of the planar conductor IP (YES in step S26), further leakage of the inspection location is prevented. In order to do so, a second step is executed (step S27).

Referring to FIG. 14, inspection instruction information generation unit 31 searches for a wiring W that is not sandwiched between any pair of the first and second selected conductive units selected in steps S1 to S403 (step S501: (J) Step).

In the example shown in FIG. 6, in steps S1 to S403, as the pair of the first selected conductive portions, a pair of conductive portions P1, P2, a pair of conductive portions P1, P3, a pair of conductive portions P3, P4, a pair of conductive portions P4, P5, A pair of conductive portions P11 and P12, a pair of conductive portions P11 and P15, and a pair of conductive portions P15 and P16 are selected. As a pair of the second selected conductive portions, a pair of conductive portions P6 and P7, a pair of conductive portions P13 and P14, and a pair of conductive portions. P16 and P17 are selected.

Then, on the substrate surface F1 side, since the conductive portions P1 to P7 are continuously selected as a first and a second selected conductive portion in a daisy chain, any one of the pair of the first and the second selected conductive portions is selected. There is no wiring W that is not sandwiched. On the other hand, on the substrate surface F2 side, the conductive portion pair P11, P12 and the conductive portion pair P13, P14 are discontinuous.

FIG. 15 is an explanatory diagram for explaining the second step. FIG. 15 is a partially enlarged view of the vicinity of the conductive portions P11 to P14 in FIG.

In the examples shown in FIGS. 6 and 15, in steps S1 to S403, the pair of conductive portions P11 and P12 and the pair of conductive portions P13 and P14 are selected as the pair of the first and second selected conductive portions. The set pair P12, P13 is not selected. As a result, the wiring W42 illustrated in FIG. 15 is not sandwiched between any of the pair of the first and second selection conductive units.

Next, the inspection instruction information generation unit 31 checks the presence or absence of the corresponding wiring W (step S503), and if there is the corresponding wiring W (YES in step S503), proceeds to step S504. On the other hand, if there is no corresponding wiring W (NO in step S503), the inspection instruction information generating unit 31 ends the processing. In the example shown in FIG. 6, the wiring W42 corresponds.

In step S <b> 504, the inspection instruction information generation unit 31 connects the conductive part P to one end of the corresponding wiring W without passing through the wiring W and connects to the other end of the wiring W without passing through the wiring W. The conductive part P to be inspected is recorded in the inspection instruction information D2 as a pair of third selected conductive parts to be inspected non-parallel to the first selected conductive part (step S504: (k) step).

In the example shown in FIG. 15, for example, a conductive portion P12 that conducts to one end T1 of the corresponding wiring W42 without passing through the wiring W42, and a conductive portion P13 that conducts to the other end T2 of the wiring W42 without passing through the wiring W42. Are selected as a pair of third selection conductive parts (step S504).

Next, the inspection instruction information generation unit 31 checks whether or not the substrate B includes a plurality of conductor layers Lc (step S505). If there is a plurality of conductor layers Lc (YES in step S505), the process proceeds to step S506. I do. On the other hand, if there is no plurality of conductor layers Lc (NO in step S505), the inspection instruction information generating unit 31 ends the processing.

In step S506, the inspection instruction information generation unit 31 checks whether there is a via V connecting the planar conductors IP of the plurality of conductor layers Lc (step S506). If there is the via V (YES in step S506), the process proceeds to step S507. On the other hand, if the via V does not exist (NO in step S506), the inspection instruction information generating unit 31 ends the processing.

基板 The substrate B shown in FIG. 17 includes two conductor layers Lc, and is provided with a via Vc for connecting the planar conductors IP of the two conductor layers Lc. In order to inspect the continuity of the via Vc, it is necessary to flow a current between the conductive portion P on the substrate surface F1 and the conductive portion P on the substrate surface F2.

Therefore, in step S507, the inspection instruction information generation unit 31 inspects one of the conductive parts P on the substrate surface F1 and one of the conductive parts P on the substrate surface F2 non-parallel to the first selected conductive part. It is recorded in the inspection instruction information D2 as a pair of fourth selection conductive parts to be performed (step S507: (l) step), and the processing ends.

(4) As a result of the pair of fourth selection conductive portions being recorded in the inspection instruction information D2, the board inspection apparatus 2 can inspect the via Vc by inspection based on the inspection instruction information D2.

Further, among the first, second, third, and fourth selected conductive portions selected in steps S1 to S507, the conductive portion P on the substrate surface F1 and the conductive portion P on the substrate surface F2 correspond to the inspection target. Only the fourth selected conductive portion for inspecting the via Vc is selected as the pair of conductive portions P, and it is minimized to select the pair of conductive portions P from both surfaces of the substrate B. .

(4) When an inspection is performed by flowing a current between the pair of conductive portions P of the substrate B and measuring the voltage, an external electromagnetic field is superimposed on the detected voltage as noise. Since an external electromagnetic field is applied in substantially the same manner on one surface of the substrate B, the noise voltage induced by the external electromagnetic field on one surface of the substrate B is substantially constant. Therefore, when measuring the voltage between the pair of conductive portions P in one surface of the substrate B, the noise superimposed on the measured voltage becomes a common mode, so that the influence of the noise on the measured voltage is reduced. .

On the other hand, between the two surfaces of the substrate B, there is a difference in the intensity of the electromagnetic field applied on the front and back of the substrate B, and there is a difference in the noise voltage induced by the external electromagnetic field on one surface and the other surface of the substrate B. . Therefore, when measuring the voltage between the pair of conductive portions P across both surfaces of the substrate B, the noise superimposed on the measured voltage is in a normal mode, and the noise voltage is superimposed on the measured voltage as it is. . As a result, it is more preferable to measure the voltage between the pair of conductive portions P over both surfaces of the substrate B than to measure the voltage between the pair of conductive portions P in one surface of the substrate B. The effect of noise increases.

According to steps S1 to S507, the conductive portion P straddling between the two surfaces of the substrate B is the minimum fourth selection conductive portion necessary for inspecting the via Vc, and the other is the one surface of the substrate B Is a pair of the first, second, and third selected conductive portions, the effect of noise when an inspection based on the inspection instruction information D2 is performed is reduced.

When a via is inspected between both surfaces of the substrate B, the probe Pr of the measuring jig 4U is brought into contact with the conductive portion P of the substrate surface F1 of the substrate B, and the measuring jig is brought into contact with the conductive portion P of the substrate surface F2 of the substrate B. It is necessary to bring 4 L probe Pr into contact. At this time, if any one of the probe Pr of the measurement jig 4U and the probe Pr of the measurement jig 4L has a poor contact, it is not possible to specify which probe Pr caused the poor contact.

ため Therefore, both probes Pr are once separated from the substrate B, and both probes Pr are brought into contact with the substrate B again, and the inspection is performed again. Such a re-inspection needs to be repeated a number of times until both probes Pr that come into contact with both surfaces of the substrate B both normally contact the conductive portion P. When the probe Pr is repeatedly separated from and contacted with the conductive portion P, the inspection time is extended and the conductive portion P is easily damaged.

According to steps S1 to S507, the inspection of the conductive portions P extending over both surfaces of the substrate B is minimized, and most of the inspections are performed between the conductive portions P provided on one surface of the substrate B. It is easy to reduce re-inspection due to failure and reduce the possibility that the conductive portion P is damaged.

As described above, the inspection instruction information generating device 3 can generate the inspection instruction information D2 by the processes of steps S1 to S507. Also, according to steps S1 to S507, the order recorded in the inspection instruction information D2 for each corresponding substrate surface corresponds to the order of the conductive portion pairs in which the substrate inspection apparatus 2 should execute the inspection. . Specifically, it is recorded in the inspection instruction information D2 in order from the one corresponding to the layer close to the substrate surfaces F1 and F2.

By the processing of steps S15, S16, S23, S24, S102, S103, S105, S106, S302, S303, S402, S403, S504, and S507 by the inspection instruction information generation unit 31, each conductive part pair to be inspected is The inspection instruction information D2 illustrated in FIG. 18 is generated in association with the surface, the layer, and the type of the first, second, third, and fourth selected conductive units. Here, “layer” means each layer of the wiring layer L and the conductor layer Lc.

In FIG. 18, five pairs of conductive portions are associated with the substrate surface F1, and the order in which inspections are to be performed is shown from top to bottom. Similarly, six conductive portion pairs are associated with the substrate surface F2, and the order in which inspections are to be performed is shown in order from top to bottom.

The inspection instruction information D2 obtained in this manner is transmitted to the board inspection apparatus 2 by, for example, a communication circuit (not shown), or the inspection instruction information D2 is stored in a storage medium such as a USB memory. By reading the data into the device 2, the data can be stored in the storage unit 22.

Next, the operation of the above-described board inspection apparatus 2 will be described. Hereinafter, an example will be described in which the storage unit 22 stores the test instruction information D2 illustrated in FIG.

Referring to FIG. 19, the inspection processing unit 21 selects, as the inspection layer LT1, the layer having the earliest order among the layers on the substrate surface F1 based on the inspection instruction information D2 (step S51). In the example illustrated in FIG. 18, the layer (the top layer) in the first order (the top layer) associated with the substrate surface F1 is the wiring layer L1, and thus the wiring layer L1 is set as the inspection layer LT1.

Next, based on the inspection instruction information D2, the inspection processing unit 21 selects the layer having the earliest order as the inspection layer LT2 among the layers on the substrate surface F2 side (Step S52). In the example illustrated in FIG. 18, the layer (the uppermost layer) in the earliest order associated with the substrate surface F2 is the wiring layer L4, and thus the wiring layer L4 is set as the inspection layer LT2.

Next, the inspection processing unit 21 performs a first current supply process of flowing a measurement current in parallel between the paired conductive portions with respect to the conductive portion pair of the first selected conductive portion in the test layers LT1 and LT2. Execute (Step S53: (c1) step). In the example shown in FIG. 18, since the inspection layer LT1 is the wiring layer L1 and the inspection layer LT2 is the wiring layer L4, the inspection processing unit 21 determines whether the conductive layer pair is the first selected conductive part of the wiring layers L1 and L4. A measuring current is passed in parallel to P1, P2, conductive part pairs P4, P5, conductive part pairs P11, P12, and conductive part pairs P15, P16.

Next, the inspection processing unit 21 detects a voltage between the pair of conductive portions of the first selected conductive portion in the inspection layers LT1 and LT2, and based on the voltage and the measurement current, determines a current path between the conductive portions. The via V and the wiring W are inspected (step S54: (c1) step).

In the example of FIG. 18, the inspection processing unit 21 causes a current to flow between each pair of the conductive part pairs P1 and P2, the conductive part pairs P4 and P5, the conductive part pairs P11 and P12, and the conductive part pairs P15 and P16, Detect the voltage between pairs. Then, the inspection processing unit 21 calculates the resistance value between each pair by, for example, dividing the voltage between each pair by the current flowing between each pair. The inspection processing unit 21 compares each of the calculated resistance values with, for example, a reference value stored in advance in the storage unit 22. If each of the resistance values is equal to or less than the reference value, the board B is determined to be good. Is larger than the reference value, the board B is determined to be defective.

In step S54, the inspection processing unit 21 notifies the user of the determination result by, for example, displaying the information on a notifying unit such as a display device (not shown). Note that the inspection processing unit 21 does not necessarily need to notify the user of the determination result.

In step S54, the current path between each pair of the conductive part pair P1, P2, the conductive part pair P4, P5, the conductive part pair P11, P12, and the conductive part pair P15, P16 selected as the first selected conductive part is determined. The vias V corresponding to the branches M11, M12, M13, M14, M41, M42, M45, M46 and the wirings W corresponding to the nodes N11, N12, N41, N42 are inspected.

In step S53, a parallel connection is made between each pair of the conductive portion pairs P1 and P2, the conductive portion pairs P4 and P5, the conductive portion pairs P11 and P12, and the conductive portion pairs P15 and P16 selected as the first selected conductive portion. Current, and the voltage between each pair can be measured, so that the inspection time of the substrate can be easily reduced.

Further, if a current flows in parallel between a plurality of pairs of conductive portions P that conduct through the same node N (wiring W), there is a possibility that a wiring W in which a measuring current overlaps occurs. is there. In this case, the voltage generated by the overlap of the current causes a measurement error, and thus the inspection accuracy may be reduced.

On the other hand, in the inspection instruction information D2, the conductive portion pair P of the first selected conductive portion is selected for each layer so that current overlap does not occur even when a measurement current is passed in parallel. Therefore, in steps S51 to S54, the conductive part pair P through which the measuring current is caused to flow in parallel based on the inspection instruction information D2 is determined, thereby reducing the risk of lowering the inspection accuracy and shortening the substrate inspection time. It is possible to do.

Next, when it is determined in step S54 that the substrate B is defective (YES in step S55), the inspection processing unit 21 ends the processing without executing the subsequent processing. On the other hand, when the substrate B is not determined to be defective in step S54 (NO in step S55), the inspection processing unit 21 shifts the processing to step S61 (FIG. 20).

In step S61, the inspection processing unit 21 applies the current for measurement to the pair of conductive portions of the second selected conductive portion in the inspection layers LT1 and LT2 in a non-parallel to the first current supply process between the paired conductive portions. Is performed (step S61: (c2) step).

Next, the inspection processing unit 21 detects a voltage between the conductive portion pair of the second selected conductive portions in the test layers LT1 and LT2, and based on the voltage and the measurement current, forms the paired second selected conductive portion. The via V and the wiring W of the current path therebetween are inspected (step S62: (c2) step). The inspection processing unit 21 performs the inspection and reports the determination result by the same method as in step S54.

(4) The supply and inspection of the measurement current in steps S61 and S62 are performed in a non-parallel to step S53, that is, at a timing when the measurement current in step S53 is not flowing.

(4) In steps S61 and S62, the inspection of the second selected conductive unit is performed in a non-parallel manner to the inspection of the first selected conductive unit, thereby preventing the measurement current from being duplicated. The processes of steps S61 and S62 for the conductive portion pair of the second selected conductive portion in the test layer LT1 and the conductive portion pair of the second selected conductive portion in the test layer LT2 may be performed in parallel.

In the example of FIG. 18, since the inspection layer LT1 is the wiring layer L1 and the inspection layer LT2 is the wiring layer L4, there is no conductive part pair of the second selection conductive part in the inspection layer LT1 (wiring layer L1). Therefore, the second current supply process is not performed on the conductive portion pair of the second selected conductive portion in the inspection layer LT1 (wiring layer L1). The inspection processing unit 21 performs steps S61 and S62 for the conductive part pairs P13 and P14, which are the second selected conductive parts of the wiring layers L1 and L4, and the conductive part pairs P16 and P17. Run in parallel.

Next, when the inspection processing unit 21 determines that the substrate B is defective in the inspection in step S62 (YES in step S63), the inspection processing unit 21 ends the processing without performing the subsequent processing. On the other hand, when the substrate B is not determined to be defective in the inspection in Step S62 (NO in Step S63), the inspection processing unit 21 proceeds to Step S64.

In step S64, the inspection processing unit 21 checks whether or not both the inspection layers LT1 and LT2 are the conductor layers Lc and whether one of the inspection layers LT1 and LT2 is the conductor layer Lc and the other is absent. Step S64). When both the inspection layers LT1 and LT2 are the conductor layers Lc, and when one of the two does not correspond to the conductor layer Lc and the other is absent (NO in step S64), the inspection processing unit 21 proceeds to step S65. However, when both of the inspection layers LT1 and LT2 are the conductor layers Lc, or when one of the inspection layers LT1 and LT2 is the conductor layer Lc and the other is without the inspection layer described later (YES in step S64), the inspection processing unit The process proceeds to step S71 (FIG. 21). Now, since neither of the inspection layers LT1 and LT2 is the conductor layer Lc (NO in step S64), the process proceeds to step S65.

In step S65, if the inspection layer LT1 is not the conductor layer Lc, the inspection processing unit 21 sets the next layer of the layers on the substrate surface F1 side as the inspection layer LT1 based on the inspection instruction information D2 (step S65). S65). When the current inspection layer LT1 is the conductor layer Lc, the inspection processing unit 21 determines that there is no new inspection layer LT1. Next, if the inspection layer LT2 is not the conductor layer Lc, the inspection processing unit 21 sets the next layer of the layers on the substrate surface F2 side as the inspection layer LT2 based on the inspection instruction information D2 (Step S66). Then, the process proceeds to step S53 (FIG. 19). When the current inspection layer LT2 is the conductor layer Lc, the inspection processing unit 21 determines that there is no new inspection layer LT2.

Now, since the inspection layer LT1 is the wiring layer L1 and the inspection layer LT2 is the wiring layer L4, the inspection processing unit 21 sets the new inspection layer LT1 as the wiring layer L2 and sets the new inspection layer LT2 as the conductor layer Lc in step S53. (FIG. 19).

In step S53, the inspection processing unit 21 determines the pair of conductive portions P3 and P4, which are the first selected conductive portions of the wiring layer L2, and the pair of conductive portions P11, P15, which are the first selected conductive portions of the conductive layer Lc on the substrate surface F2. And a voltage between the conductive part pairs P3 and P4 and a voltage between the conductive part pairs P11 and P15 are detected in parallel with respect to, and based on the voltage and the measurement current, the conductive current is detected. The via V and the wiring W of the current path between the sections are inspected (steps S53 and S54: (c1) step).

Hereinafter, if NO in step S55, the inspection processing unit 21 proceeds to step S61. According to the inspection instruction information D2 shown in FIG. 18, since the second selection conductive portion corresponding to the wiring layer L2 and the conductor layer Lc on the substrate surface F2 does not exist, steps S61 to S63 are not executed and the process proceeds to step S64. I do.

In step S64, when both the inspection layers LT1 and LT2 are the conductor layers Lc, and when one of the inspection layers LT1 and LT2 is the conductor layer Lc and the other does not have the inspection layer, the process proceeds to step S65, and the inspection processing unit 21 Sets the conductor layer Lc, which is the layer in the order next to the wiring layer L2 on the substrate surface F1 side in the inspection instruction information D2, as the inspection layer LT1 (step S65). In step S66, since the inspection layer LT2 is the conductor layer Lc, the inspection processing unit 21 returns to step S53 without any new inspection layer LT2.

In step S53, the inspection processing unit 21 supplies a measurement current to the conductive portion pairs P1 and P3, which are the first selected conductive portions of the conductive layer Lc on the substrate surface F1, and sets a voltage between the conductive portion pairs P1 and P3. Is detected, and the via V and the wiring W of the current path between the conductive parts are inspected based on the voltage and the measuring current (steps S53 and S54: (c1) step).

Hereinafter, if NO in step S55, the inspection processing unit 21 proceeds to step S61. According to the inspection instruction information D2 shown in FIG. 18, the second selected conductive portion of the conductive layer Lc on the substrate surface F1 side is the pair of conductive portions P6 and P7. Therefore, the inspection processing unit 21 executes steps S61 and S62 on the conductive unit pairs P6 and P7.

Hereinafter, if NO in step S63, the inspection processing unit 21 proceeds to step S64. Now, the inspection layer LT1 is set to the conductor layer Lc in the above-described step S65, and the inspection layer LT2 is set to be absent in the above-described step S66 (YES in step S64), and the process proceeds to step S71 (FIG. 21).

In step S71, the inspection processing unit 21 performs a third current supply process for flowing a measurement current between the paired conductive portions with respect to the conductive portion pair of the third selected conductive portion. The processing is executed in a non-parallel manner (step S71).

Next, the inspection processing unit 21 detects a voltage between the conductive part pairs of the third selected conductive part, and based on the voltage and the measurement current, determines the via V of the current path between the conductive parts and the wiring W. Is inspected (step S72). The inspection processing unit 21 performs the inspection and reports the determination result by the same method as in step S54.

では In the example of FIG. 18, there is no third selected conductive portion corresponding to the substrate surface F1, and the third selected conductive portion corresponding to the substrate surface F2 is a pair of conductive portions P12 and P13. Accordingly, the inspection processing unit 21 performs the third current supply process for flowing the measurement current between the conductive portions of the conductive portion pair P12 and P13 in a manner not parallel to the first and second current supply processes (step S71). ), A voltage between the conductive parts of the conductive part pair P12, P13 is detected, and based on the voltage and the measuring current, the via V of the current path between the conductive parts and the wiring W are inspected (step S72). .

In the example of FIG. 18, the wiring W42 of the current path between the conductive portion pair P12 and P13 shown in FIG. 15 is inspected. Thereby, the possibility that the inspection of the wiring W may be omitted can be reduced, and the inspection accuracy of the substrate B can be improved.

Next, the inspection processing unit 21 performs a fourth current supply process of flowing a measurement current between the paired conductive portions with respect to the conductive portion pair of the fourth selected conductive portion, by performing the first to third current supply processes. Are executed in a non-parallel manner (step S73).

Next, the inspection processing unit 21 detects a voltage between the pair of conductive portions of the fourth selected conductive portion, and, based on the voltage and the measurement current, determines the via V and the wiring W of the current path between the conductive portions. Is inspected (step S74), and the process ends. The inspection processing unit 21 performs the inspection and reports the determination result by the same method as in step S54.

In the example of FIG. 18, since the fourth selection conductive unit does not exist, the inspection processing unit 21 ends the processing without executing steps S73 and S74.

According to steps S73 and S74, for example, as shown in FIG. 17, the via Vc of the substrate B provided with two conductor layers Lc and provided with the vias Vc connecting the planar conductors IP of the two conductor layers Lc to each other is provided. Can be inspected.

{Circle around (2)} The inspection instruction information D2 is ordered by the inspection instruction information generating device 3 for each substrate surface in order from the one corresponding to the layer closer to the substrate surfaces F1 and F2. As a result, the board inspection apparatus 2 determines the inspection order in steps S51, S52, S65, and S66, so that the wiring layers L can be sequentially inspected in order from the one closer to the substrate surfaces F1 and F2.

Generally, the closer the substrate B is to the substrate surfaces F1 and F2, the more the number of wirings W provided in the wiring layer L tends to be. As the number of wirings W provided in the wiring layer L increases, the number of conductive portion pairs of the first selected conductive portion corresponding to one layer increases. As the number of conductive part pairs of the first selected conductive part is larger, the number of conductive part pairs that can be inspected in parallel in step S53 increases.

Therefore, the number of parallel inspections at an early stage of the inspection can be increased by setting the wiring layers L as inspection targets in order from the one closer to the substrate surfaces F1 and F2. If the number of parallel inspections at the beginning of the inspection can be increased, a defect of the substrate B can be detected at an early stage of the inspection. Therefore, when the inspection is ended when a defect is detected as in steps S55 and S63, the wiring layers L are inspected in order from the one closer to the substrate surfaces F1 and F2. In addition, it is possible to shorten the time required to detect a defect and increase the possibility of shortening the inspection time.

Note that the example has been described in which the inspection instruction information generating device 3 and the substrate inspection device 2 are configured as separate devices, but the inspection instruction information generating device 3 and the substrate inspection device 2 are configured as a single device. May be. For example, the board inspection device 2 may include the inspection instruction information generation unit 31 and the storage unit 32, so that the substrate inspection device 2 may also function as the inspection instruction information generation device. In this case, a board inspection system is constituted by one board inspection apparatus also serving as an inspection instruction information generating apparatus.

Further, the inspection instruction information generating device 3 and the inspection instruction information generating method do not necessarily need to execute all the flows shown in FIGS. 7 to 14, and the inspection processing unit 21 does not necessarily have to execute the flow shown in FIGS. 19 to 21. It is not necessary to execute all the flows.

The inspection instruction information generating device 3 and the inspection instruction information generating method, for example, even when only steps S101 and S102 are executed, the wiring W of the wiring layer L1 adjacent to the substrate surface F1, and the wiring adjacent to the substrate surface F1. Inspection instruction information D2 that can easily reduce the inspection time of the via V connecting the layer L1 and the conductive portion P can be generated. In this case, the inspection processing unit 21 may execute steps S53 and S54.

Further, the example in which the wiring layer L and the conductive portion P are provided on both surfaces of the conductor layer Lc has been described, but the wiring layer L and the conductive portion P may be provided only on one surface of the conductor layer Lc. Good. For example, the substrate B may not include the substrates B4 and B5. In this case, the processing related to the second selection layer LL2 does not need to be executed, and for example, steps S18 to S24, S104 to S106, S401 to S403, S52, S66, etc. are unnecessary.

(4) The inspection processing unit 21 may be configured not to execute steps S55 and S63 and to continue the inspection even when a defect is detected during the inspection. In addition, the inspection instruction information generating apparatus 3 and the inspection instruction information generating method always record the conductive part pairs in the inspection instruction information D2 in steps S4, S13, and S21 in order from the one corresponding to the layer closer to the substrate surfaces F1 and F2. It is not limited to the example to make it. In the inspection instruction information generating device 3 and the inspection instruction information generating method, the conductive part pairs may be recorded in the inspection instruction information D2 in an arbitrary order.

That is, the inspection instruction information generating apparatus according to an example of the present invention includes a conductor layer that is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, and a substrate surface on which a plurality of conductive portions are provided. A wiring layer that is a layer laminated between the conductor layer and the substrate surface, a via connecting the wiring of the wiring layer and the plurality of conductive portions, and a wiring of the wiring layer and the conductive layer. A storage unit that stores conductive structure information indicating how the planar conductor, the conductive portion, the wiring, and the via in the substrate including the planar conductor and the via are connected. When there are a plurality of groups of the conductive parts that are electrically connected to each other via the wiring of the wiring layer, based on the conductive structure information, select one pair of the conductive parts from each group as a first selected conductive part, The selected pairs of The information indicating the selected conductive portion, and an inspection instruction information generating unit for executing a test instruction information generating process of recording a test instruction information.

In addition, the inspection instruction information generating method according to an example of the present invention includes a conductor layer that is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, and a substrate surface provided with a plurality of conductive portions. A wiring layer that is a layer laminated between the conductor layer and the substrate surface, a via connecting the wiring of the wiring layer and the plurality of conductive portions, and a wiring of the wiring layer and the conductive layer. The wiring layer is formed based on conductive structure information indicating how the planar conductor, the conductive portion, the wiring, and the via are electrically connected to each other on a substrate including a planar conductor and a via connecting the via. When there are a plurality of groups of the conductive parts that are electrically connected to each other via the wiring of, a pair of the conductive parts is selected as a first selected conductive part from each of the groups, and a first selection of the selected plurality of pairs is performed. The information indicating the conductive part is Including inspection instruction information generation step of executing the test instruction information generating process of generating a.

In addition, the inspection instruction information generation program according to an example of the present invention includes a conductor layer that is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, and a substrate surface provided with a plurality of conductive portions. A wiring layer that is a layer laminated between the conductor layer and the substrate surface, a via connecting the wiring of the wiring layer and the plurality of conductive portions, and a wiring of the wiring layer and the conductive layer. The wiring layer is formed based on conductive structure information indicating how the planar conductor, the conductive portion, the wiring, and the via are electrically connected to each other on a substrate including a planar conductor and a via connecting the via. When there are a plurality of groups of the conductive parts that are electrically connected to each other via the wiring of, a pair of the conductive parts is selected as a first selected conductive part from each of the groups, and a first selection of the selected plurality of pairs is performed. Check the information indicating the conductive part with the inspection finger. The inspection instruction information generating process of generating the information, causes the computer to execute.

(4) In the case where there are a plurality of groups of conductive parts that are conductive to each other via the wiring of the wiring layer, even if a current flows between conductive parts of a certain group, the current does not flow to another group. Therefore, according to these configurations, when there are a plurality of groups of conductive parts that are electrically connected to each other via the wiring of the wiring layer, the conductive parts are extracted from the respective groups based on the conductive structure information by the inspection instruction information generation processing. One pair is selected as the first selected conductive unit, and information indicating the selected plurality of pairs of the first selected conductive units is recorded as inspection instruction information. Then, a pair of first selection conductive units is selected from one group, and thus a plurality of pairs of first selection conductive units belong to different groups. Then, even if currents are supplied in parallel to a plurality of pairs of the first selected conductive portions indicated by the inspection instruction information, currents do not overlap. Therefore, by using a plurality of pairs of the first selected conductive portions based on the inspection instruction information obtained as described above as inspection locations, inspections at a plurality of locations can be performed in parallel, resulting in a reduction in board inspection time. It becomes easy to do.

In addition, the inspection instruction information generation processing includes: (a) a step of grouping the conductive parts that are electrically connected to each other via the wiring of the wiring layer based on the conductive structure information; and (b) the grouping. For the plurality of groups, two conductive portions are selected as the pair of first selected conductive portions from among the conductive portions included in each group, and the selected plurality of pairs of the first selected conductive portions are arranged in parallel. Recording in the inspection instruction information as an inspection location that can be inspected by using the inspection instruction information.

According to this configuration, in (a), conductive portions that are electrically connected to each other via the wiring of the wiring layer, that is, conductive portions that may overlap with each other if a current flows through a plurality of conductive portion pairs. The groups are grouped together. In addition, for a plurality of groups that are grouped, that is, for a plurality of groups that have a relationship that does not cause overlap with the current paths of other groups even if current flows between pairs of conductive parts in the group. , (B), two conductive portions are selected as a pair of first selected conductive portions from among the conductive portions included in each of the groups, and the selected plural pairs of first selected conductive portions are connected in parallel. It is recorded in the inspection instruction information as an inspection location that can be inspected. Then, a pair of first selection conductive units is selected from one group, and thus a plurality of pairs of first selection conductive units belong to different groups. Therefore, even if currents are supplied in parallel to a plurality of pairs of the first selected conductive portions indicated by the inspection instruction information, currents do not overlap. Therefore, by using a plurality of pairs of the first selected conductive portions based on the inspection instruction information obtained as described above as inspection locations, inspections at a plurality of locations can be performed in parallel, resulting in a reduction in board inspection time. It becomes easy to do.

Further, in the step (b), when there is a group having a conductive part that is not selected as the first selected conductive part, the conductive part that is not selected as the first selected conductive part is added to the group. It is preferable to record the two conductive portions included in the inspection instruction information as a pair of second selected conductive portions to be tested non-parallel to the plurality of pairs of first selected conductive portions.

According to this configuration, it is possible to reduce the possibility that the conductive portion that is not selected as the first selected conductive portion leaks from the inspection location.

Further, the substrate includes a plurality of the wiring layers, and further includes a plurality of vias connecting the plurality of wiring layers, and the inspection instruction information generating unit includes: (d) wiring of the plurality of wiring layers in parallel. If connected, the conductive structure information is changed before the step (a) so that the plurality of wirings connected in parallel are replaced with one of the wirings closest to the substrate surface. It is preferable to further execute a step of performing the inspection instruction information generation processing based on the conductive structure information changed in the step (d).

According to this configuration, since the conductive structure information is simplified, the inspection instruction information generating process is executed based on the simplified conductive structure information. As a result, the execution of the inspection instruction information generation processing becomes easy.

In addition, (e) when the via or the row of vias is connected in parallel by the wiring and the planar conductor, the inspection instruction information generating unit may perform the connection in parallel before the step (a). Further performing the step of changing the conductive structure information changed in the step (d) so as to replace the via or the row of the vias with one or a row of vias, and changing the conductive structure information changed in the step (e). It is preferable to execute the inspection instruction information generation processing based on structure information.

Further, the substrate includes a plurality of the wiring layers, and further includes a plurality of vias connecting the plurality of wiring layers, and the inspection instruction information generating unit includes: (f) the most one of the plurality of wiring layers; Performing the steps (a) and (b) on a wiring layer near the substrate surface as a processing target; and (g) performing the other wiring layers on the other wiring layers except for the wiring layer closest to the substrate surface. (G1) For each of the wirings of the wiring layer to be processed, corresponding to one of the wirings, a single via connected to a side of the one wiring away from the conductor layer is set as a processing target. On the other hand, by selecting one of the conductive portions electrically connected to the one via on the side opposite to the wiring, the selected conductive portion is grouped for each corresponding wiring, and ( g2) Grouping in the step (g1) The step (b) is performed on the group, and in the step (b), the first selection conductive portion of each pair is recorded in the inspection instruction information in association with the wiring layer to be processed. preferable.

According to this configuration, it is possible to record, in the test instruction information, a conductive portion pair serving as a test location for testing a substrate having a plurality of wiring layers and a plurality of vias connecting the plurality of wiring layers. Becomes

In the step (b), in the steps (f) and (g), the plurality of pairs of the first selected conductive portions are connected to the wiring layer in order from the one selected as a wiring layer close to the substrate surface as a processing target. It is preferable that the inspection instruction information is recorded in the order of each layer.

Generally, the closer the substrate is to the substrate surface, the more the number of wirings provided in the wiring layer tends to be. As the number of wirings provided in the wiring layer is larger, the number of pairs of the first selection conductive parts with respect to the wiring layer to be processed, that is, the number of conductive parts that can flow a measuring current in parallel during the inspection is increased. To increase. Accordingly, when a plurality of pairs of the first selected conductive portions are sequentially recorded in the inspection instruction information for each wiring layer in order from the one selected as a processing target for the wiring layer close to the substrate surface, the inspection instruction information is obtained at the time of inspection. In this case, the wiring layers to be inspected are selected in the order in which the wiring layers have been inspected, and the inspection can be performed by applying a measuring current to the first selected conductive portion pair corresponding to the wiring layer. By performing the inspection in this way, the number of parallel inspections at an early stage of the inspection can be increased. If the number of parallel inspections at the initial stage of the inspection can be increased, it is possible to detect a failure of the substrate at an early stage of the inspection.

Also, (h) for each via connected to one side of the planar conductor, one of the conductive parts electrically connected on the opposite side to the planar conductor is selected. The conductive portions are grouped as conductive portions corresponding to one side of the planar conductor, and two conductive portions are selected as a pair of first selected conductive portions from the grouped conductive portions, and the selected conductive portions are selected. It is preferable to record a pair of first selected conductive portions in the inspection instruction information.

According to this configuration, the via connected to the planar conductor can be inspected.

Further, the inspection instruction information generating process includes: (j) searching for the wiring that is not sandwiched between the pair of the first selected conductive portions and that is not sandwiched between the pair of the second selected conductive portions; A conductive portion that conducts without passing through the wire to one end of the searched wire, and a conductive portion that conducts without passing through the wire to the other end of the wire, the plurality of pairs of first selected conductive portions, Preferably, the method further includes a step of recording in the inspection instruction information as a pair of third selected conductive portions to be inspected non-parallel.

According to this configuration, it is possible to reduce the possibility that the recording of the inspection target portion in the inspection instruction information is omitted.

Further, it is preferable that the substrate surface and the wiring layer are provided on both sides of the conductor layer, respectively, and the inspection instruction information generating unit executes the inspection instruction information generation processing on both sides of the conductor layer. .

According to this configuration, it is possible to generate inspection instruction information corresponding to a substrate provided with a substrate surface and a wiring layer on both sides of the conductor layer.

Further, the substrate includes a plurality of the conductor layers and vias connecting the planar conductors of the plurality of conductor layers, and the inspection instruction information generation processing includes: One of the conductive portions on the substrate surface and one of the conductive portions on the other substrate surface, the plurality of pairs of the first selected conductive portions as a pair of fourth selected conductive portions to be inspected non-parallel, It is preferable that the method further includes a step of recording the inspection instruction information.

According to this configuration, even for a substrate including a plurality of conductor layers and vias connecting the planar conductors of the plurality of conductor layers, a pair of vias for inspecting the vias connecting the planar conductors is provided. Can be recorded in the inspection instruction information.

In addition, the inspection instruction information generating unit converts the conductive structure information into a tree-structured data structure by associating the via with a node, the wiring with a branch, and the planar conductor with a root node. Is preferably further executed, and the inspection instruction information generating process is executed based on the conductive structure information converted into the tree structure in the step (m).

According to this configuration, the first current supply process is performed in parallel on a plurality of pairs of the first selected conductive units based on the test instruction information, so that the test at a plurality of locations can be performed while avoiding overlapping of the measured currents. As a result, the inspection time of the substrate can be easily reduced.

According to this configuration, it is possible to inspect a via or a wiring on a current path connected to a conductive part that is not selected as the first selected conductive part.

According to this configuration, by inspecting the wiring layer as an object to be processed in order from the one closer to the substrate surface, it is possible to detect a defect of the substrate at an early stage of the inspection. If the result of the inspection is defective, the inspection is not executed for the wiring layers in the next and subsequent orders. As a result, the defect is promptly detected, and the inspection ends when the defect is detected, so that the inspection time can be easily reduced.

According to this configuration, when inspecting a substrate provided with a substrate surface and a wiring layer on both sides of the conductor layer, the inspection on one side of the conductor layer and the inspection on the other side are performed in parallel. Therefore, it is easy to shorten the inspection time.

That is, the inspection instruction information generating apparatus, the inspection instruction information generating method, and the inspection instruction information generating program having such a configuration can generate the inspection instruction information indicating the inspection location where the inspection time of the board can be easily reduced. it can. In addition, the board inspection system having such a configuration can easily reduce the board inspection time.

This application is based on Japanese Patent Application No. 2018-172302 filed on Sep. 14, 2018, the contents of which are included in the present application. It should be noted that the specific embodiments or examples made in the section of the modes for carrying out the invention clarify the technical contents of the present invention, and the present invention is not limited to such specific examples. It should not be construed in a narrow sense in a limited sense.

REFERENCE SIGNS LIST 1 board inspection system 2 board inspection device 3 inspection instruction information generation device 4U, 4L measurement jig 12 measurement block 13 scanner unit 20 control unit 21 inspection processing unit 22 storage unit 31 inspection instruction information generation unit 32 storage unit 110 substrate fixing device 112 Cases 121, 122 Measuring unit 125 Moving mechanism B, B1 to B5 Substrate BS, BS1 Substrate surface BS2 Contact surface CS, CM Power supply units D1, D1 ', D1 "Conductive structure information D2 Inspection instruction information F1, F2 Substrate surface Fip1 , FIP2 flag _{_I, I 1, I} ₂ current IP, IPa, IPd planar conductors L, L1, L2, L4 wiring layer Lc conductor layer LL1 first-layer LL2 second-layer LT1, LT2 inspection layer M, M11 ~ M14, M21 to M23, M41 to M47, Mr1 to Mr6 Branch MB Inter-substrate MP Metal plate N, N11, N12, N21, N41, N42 Node NR Root nodes P, P1 to P7, P11 to P17 Conductive parts PA, PB, PA1 to PF1, PA2 to PF2 Conductive part Pr Probe RA to RF Via T1 One end T2 Other end V, V11 to V17, V21 to V27, V31 to V36, V41 to V45, V51 to V57, Vc Via VM Voltage detector W, W11, W12, W21, W22, W41 to W45 Wiring WB Multilayer substrate WB1, WB2 substrate

Claims

A conductor layer, which is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, a substrate surface on which a plurality of conductive portions are provided, and laminated between the conductor layer and the substrate surface The surface of the substrate including a wiring layer that is a layer, a via that connects the wiring of the wiring layer and the plurality of conductive portions, and a via that connects the wiring of the wiring layer and the planar conductor of the conductor layer. A conductive unit, the conductive unit, the wiring, and the via, a storage unit that stores conductive structure information indicating how conductively connected,
When there are a plurality of groups of the conductive parts that are electrically connected to each other via the wiring of the wiring layer, based on the conductive structure information, select one pair of the conductive parts from each group as a first selected conductive part, An inspection instruction information generating apparatus comprising: an inspection instruction information generating unit that executes an inspection instruction information generating process of recording information indicating the selected plurality of pairs of the first selected conductive units as inspection instruction information.
The inspection instruction information generation processing includes:
(A) a step of grouping the conductive portions that are conductive to each other via a wiring of the wiring layer based on the conductive structure information;
(B) for the plurality of grouped groups, selecting two conductive parts from among the conductive parts included in each group as the pair of first selected conductive parts; 2. The inspection instruction information generating apparatus according to claim 1, further comprising a step of recording the selected conductive portion as an inspection location that can be inspected in parallel in the inspection instruction information.
The step (b) further includes, if there is a group having a conductive part that is not selected as the first selected conductive part, the group including a conductive part that is not selected as the first selected conductive part. The inspection instruction information generating apparatus according to claim 2, wherein one conductive section is recorded in the inspection instruction information as a pair of second selected conductive sections to be inspected non-parallel to the plurality of pairs of first selected conductive sections.
The substrate includes a plurality of wiring layers, and further includes a plurality of vias connecting the plurality of wiring layers,
The inspection instruction information generation unit,
(D) When the wirings of the plurality of wiring layers are connected in parallel, prior to the step (a), the plurality of wirings connected in parallel are connected to one of the wirings closest to the substrate surface. Further performing a step of changing the conductive structure information so as to replace the two wirings,
The inspection instruction information generation device according to claim 2, wherein the inspection instruction information generation processing is performed based on the conductive structure information changed in the step (d).
The inspection instruction information generation unit,
(E) When the vias or the row of vias are connected in parallel by the wiring and the planar conductor, before the step (a), one of the vias or the row of vias connected in parallel is reduced to one. Or further performing a step of changing the conductive structure information changed in the step (d) so as to replace the row of vias with a row of vias;
The inspection instruction information generation device according to claim 4, wherein the inspection instruction information generation processing is performed based on the conductive structure information changed in the step (e).
The substrate includes a plurality of wiring layers, and further includes a plurality of vias connecting the plurality of wiring layers,
The inspection instruction information generation unit,
(F) performing the steps (a) and (b) with the wiring layer closest to the substrate surface among the plurality of wiring layers as a processing target;
(G) With respect to the other wiring layers except for the wiring layer closest to the substrate surface, each of the other wiring layers is processed,
(G1) For each wiring of the wiring layer to be processed, corresponding to one of the wirings, one of the vias connected to a side of the one wiring away from the conductor layer is connected to one of the vias. By selecting one of the conductive parts electrically connected on the side opposite to the wiring of the via, grouping the selected conductive part for each corresponding wiring,
(G2) performing the step (b) on the groups grouped in the step (g1);
The inspection instruction information according to any one of claims 2 to 5, wherein in the step (b), the first selection conductive portion of each pair is recorded in the inspection instruction information in association with the wiring layer to be processed. Generator.
In the step (b), in the steps (f) and (g), the plurality of pairs of the first selected conductive portions are arranged for each of the wiring layers in order from the one selected as a processing target for the wiring layer near the substrate surface. 7. The inspection instruction information generating apparatus according to claim 6, wherein the inspection instruction information is recorded in the inspection instruction information in an order.
(H) For each via connected to one side of the planar conductor, one of the conductive portions electrically connected to the opposite side of the planar conductor is selected to select the conductive portion. Are grouped as a conductive part corresponding to one side of the planar conductor, and two conductive parts are selected as a pair of first selected conductive parts from the grouped conductive parts, and the selected pair of conductive parts is selected. The inspection instruction information generating device according to any one of claims 1 to 7, wherein a first selection conductive unit is recorded in the inspection instruction information.
The inspection instruction information generation processing includes:
(J) a step of searching for the wiring that is not sandwiched between the pair of the first selected conductive portions and that is not sandwiched between the pair of the second selected conductive portions;
(K) a conductive part that conducts to one end of the searched wiring without passing through the wiring and a conductive part that conducts to the other end of the wiring without passing through the wiring, The inspection instruction information generating apparatus according to claim 3, further comprising a step of recording the inspection instruction information as a pair of third selected conductive parts to be inspected non-parallel to the selected conductive part.
The substrate surface and the wiring layer are provided on both sides of the conductor layer, respectively.
10. The inspection instruction information generating apparatus according to claim 1, wherein the inspection instruction information generating unit executes the inspection instruction information generating process on both sides of the conductor layer.
The substrate includes a plurality of the conductor layers and a via connecting the planar conductors of the plurality of conductor layers,
The inspection instruction information generation processing includes:
(L) inspecting one of the conductive portions on one substrate surface and one of the conductive portions on the other substrate surface on the both substrate surfaces non-parallel to the plurality of pairs of the first selected conductive portions; The inspection instruction information generating apparatus according to claim 10, further comprising a step of recording the inspection instruction information as a pair of fourth selection conductive units to be performed.
The inspection instruction information generation unit,
(M) converting the conductive structure information into a tree-structured data structure by associating the via with a node, the wiring with a branch, and the planar conductor as a root node;
The inspection instruction information generating apparatus according to any one of claims 1 to 11, wherein the inspection instruction information generating process is performed based on the conductive structure information converted into a tree structure in the step (m).
An inspection instruction information generating device according to any one of claims 1 to 12,
An inspection processing unit that inspects the substrate based on the inspection instruction information,
The inspection processing unit,
(C1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and A board inspection system for detecting a voltage between the first selection conductive parts, and inspecting a via and a wiring of a current path between the pair of first selection conductive parts based on the current and the voltage. .
An inspection instruction information generating device according to claim 3,
An inspection processing unit that inspects the substrate based on the inspection instruction information,
The inspection processing unit,
(C1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and Detecting the voltage between the first selected conductive portion, based on the current and the voltage, inspecting the vias and wiring of the current path between the first selected conductive portion of each pair,
(C2) performing a second current supply process of flowing a current between the second selected conductive portions indicated by the inspection instruction information in a non-parallel manner with the first current supply process, and Detecting a voltage between the selected conductive portions and, based on the current and the voltage, testing a via and a wiring of a current path between the pair of second selected conductive portions.
An inspection instruction information generating device according to claim 7,
An inspection processing unit that inspects the substrate based on the inspection instruction information,
The inspection processing unit,
For each of the wiring layers according to the order indicated by the inspection instruction information,
(C1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and Detecting the voltage between the first selection conductive part, based on the current and the voltage, performing a step of inspecting the via and wiring of the current path between the first selection conductive part of each pair,
A board inspection system that does not execute the step (c1) for the wiring layer in the next order if the result of the inspection in the step (c1) is defective.
An inspection instruction information generating device according to claim 10,
An inspection processing unit that inspects the substrate based on the inspection instruction information,
The inspection processing unit,
(C1) For a plurality of pairs of first selected conductive portions indicated by the inspection instruction information, a first current supply process for flowing a current between the paired first selected conductive portions is performed in parallel, and Detecting the voltage between the first selection conductive part, based on the current and the voltage, performing a step of inspecting the via and wiring of the current path between the first selection conductive part of each pair,
In the step (c1), the first current supply processing to the plurality of pairs of the first selected conductive portions associated with one side of the conductor layer by the inspection instruction information; A board inspection system that executes the first current supply processing for the plurality of pairs of the first selection conductive units associated with each other in parallel.
A conductor layer, which is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, a substrate surface on which a plurality of conductive portions are provided, and laminated between the conductor layer and the substrate surface The surface of the substrate including a wiring layer that is a layer, a via that connects the wiring of the wiring layer and the plurality of conductive portions, and a via that connects the wiring of the wiring layer and the planar conductor of the conductor layer. -Shaped conductor, the conductive portion, the wiring, and the via, based on the conductive structure information indicating how conductively connected,
When there are a plurality of groups of the conductive portions that are electrically connected to each other via the wiring of the wiring layer, the conductive portions are selected as a first selected conductive portion from each of the groups, and the selected plurality of pairs are selected. An inspection instruction information generating method including an inspection instruction information generating step of executing an inspection instruction information generating process of generating information indicating a first selected conductive unit as inspection instruction information.
A conductor layer, which is a layer provided with a conductive planar conductor that spreads in a planar or mesh shape, a substrate surface on which a plurality of conductive portions are provided, and laminated between the conductor layer and the substrate surface The surface of the substrate including a wiring layer that is a layer, a via that connects the wiring of the wiring layer and the plurality of conductive portions, and a via that connects the wiring of the wiring layer and the planar conductor of the conductor layer. -Shaped conductor, the conductive portion, the wiring, and the via, based on the conductive structure information indicating how conductively connected,
When there are a plurality of groups of the conductive portions that are electrically connected to each other via the wiring of the wiring layer, the conductive portions are selected as a first selected conductive portion from each of the groups, and the selected plurality of pairs are selected. An inspection instruction information generation program for causing a computer to execute inspection instruction information generation processing for generating information indicating a first selected conductive unit as inspection instruction information.