[go: up one dir, main page]

SG97858A1 - Chip scale surface mount package for semiconductor device and process of fabricating the same - Google Patents

Chip scale surface mount package for semiconductor device and process of fabricating the same

Info

Publication number
SG97858A1
SG97858A1 SG200001190A SG200001190A SG97858A1 SG 97858 A1 SG97858 A1 SG 97858A1 SG 200001190 A SG200001190 A SG 200001190A SG 200001190 A SG200001190 A SG 200001190A SG 97858 A1 SG97858 A1 SG 97858A1
Authority
SG
Singapore
Prior art keywords
fabricating
semiconductor device
same
surface mount
chip scale
Prior art date
Application number
SG200001190A
Other languages
English (en)
Inventor
Felix Zandman
Y Mohammed Kasem
Yueh-Se Ho
Original Assignee
Vishay Intertechnology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vishay Intertechnology Inc filed Critical Vishay Intertechnology Inc
Publication of SG97858A1 publication Critical patent/SG97858A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
SG200001190A 1999-09-13 2000-03-04 Chip scale surface mount package for semiconductor device and process of fabricating the same SG97858A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US39509799A 1999-09-13 1999-09-13

Publications (1)

Publication Number Publication Date
SG97858A1 true SG97858A1 (en) 2003-08-20

Family

ID=23561676

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200001190A SG97858A1 (en) 1999-09-13 2000-03-04 Chip scale surface mount package for semiconductor device and process of fabricating the same

Country Status (8)

Country Link
US (2) US6562647B2 (zh)
EP (1) EP1085570A3 (zh)
JP (1) JP3333765B2 (zh)
KR (2) KR100462980B1 (zh)
CN (1) CN1186810C (zh)
HK (1) HK1034805A1 (zh)
SG (1) SG97858A1 (zh)
TW (1) TW499746B (zh)

Families Citing this family (100)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7211877B1 (en) * 1999-09-13 2007-05-01 Vishay-Siliconix Chip scale surface mount package for semiconductor device and process of fabricating the same
US6984571B1 (en) 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6500694B1 (en) 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6404660B1 (en) * 1999-12-23 2002-06-11 Rambus, Inc. Semiconductor package with a controlled impedance bus and method of forming same
US6902987B1 (en) 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
US6856006B2 (en) * 2002-03-28 2005-02-15 Siliconix Taiwan Ltd Encapsulation method and leadframe for leadless semiconductor packages
US6563133B1 (en) * 2000-08-09 2003-05-13 Ziptronix, Inc. Method of epitaxial-like wafer bonding at low temperature and bonded structure
JP3405456B2 (ja) * 2000-09-11 2003-05-12 沖電気工業株式会社 半導体装置，半導体装置の製造方法，スタック型半導体装置及びスタック型半導体装置の製造方法
US6889304B2 (en) * 2001-02-28 2005-05-03 Rambus Inc. Memory device supporting a dynamically configurable core organization
KR100407472B1 (ko) * 2001-06-29 2003-11-28 삼성전자주식회사 트렌치가 형성된 상부 칩을 구비하는 칩 적층형 패키지소자 및 그 제조 방법
US6856007B2 (en) 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US6812548B2 (en) 2001-11-30 2004-11-02 Intel Corporation Backside metallization on sides of microelectronic dice for effective thermal contact with heat dissipation devices
TWI232560B (en) 2002-04-23 2005-05-11 Sanyo Electric Co Semiconductor device and its manufacture
SG107595A1 (en) 2002-06-18 2004-12-29 Micron Technology Inc Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assembles and packages including such semiconductor devices or packages and associated methods
SG111069A1 (en) * 2002-06-18 2005-05-30 Micron Technology Inc Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods
TWI229435B (en) 2002-06-18 2005-03-11 Sanyo Electric Co Manufacture of semiconductor device
TWI227050B (en) 2002-10-11 2005-01-21 Sanyo Electric Co Semiconductor device and method for manufacturing the same
TWI227550B (en) 2002-10-30 2005-02-01 Sanyo Electric Co Semiconductor device manufacturing method
US20040161871A1 (en) * 2002-11-27 2004-08-19 Seiko Epson Corporation Semiconductor device, method of manufacturing the same, circuit substrate and electronic equipment
US6831355B2 (en) * 2002-12-04 2004-12-14 Minilogic Device Corporation Ltd. Flip-chip sub-assembly, methods of making same and device including same
AU2003291199A1 (en) * 2002-12-09 2004-06-30 Advanced Interconnect Technologies Limited Package having exposed integrated circuit device
US7754537B2 (en) * 2003-02-25 2010-07-13 Tessera, Inc. Manufacture of mountable capped chips
US7109092B2 (en) 2003-05-19 2006-09-19 Ziptronix, Inc. Method of room temperature covalent bonding
JP2004349331A (ja) * 2003-05-20 2004-12-09 Renesas Technology Corp パワーｍｏｓｆｅｔとパワーｍｏｓｆｅｔ応用装置およびパワーｍｏｓｆｅｔの製造方法
JP4166627B2 (ja) * 2003-05-30 2008-10-15 株式会社デンソー 半導体装置
US6972480B2 (en) 2003-06-16 2005-12-06 Shellcase Ltd. Methods and apparatus for packaging integrated circuit devices
US7094633B2 (en) * 2003-06-23 2006-08-22 Sandisk Corporation Method for efficiently producing removable peripheral cards
WO2005004195A2 (en) * 2003-07-03 2005-01-13 Shellcase Ltd. Method and apparatus for packaging integrated circuit devices
JP4401181B2 (ja) 2003-08-06 2010-01-20 三洋電機株式会社 半導体装置及びその製造方法
US20050062138A1 (en) * 2003-09-22 2005-03-24 Williams Kirt Reed Semiconductor structure with electrically isolated sidewall electrodes and method for fabricating the structure
SG120123A1 (en) * 2003-09-30 2006-03-28 Micron Technology Inc Castellated chip-scale packages and methods for fabricating the same
US7064010B2 (en) * 2003-10-20 2006-06-20 Micron Technology, Inc. Methods of coating and singulating wafers
JP4536366B2 (ja) * 2003-12-22 2010-09-01 株式会社豊田中央研究所 半導体装置とその設計支援用プログラム
EP1704592A1 (en) * 2004-01-13 2006-09-27 Infineon Technologies AG Chip-sized filp-chip semiconductor package and method for making the same
JP3945483B2 (ja) * 2004-01-27 2007-07-18 カシオ計算機株式会社 半導体装置の製造方法
US8390131B2 (en) * 2004-06-03 2013-03-05 International Rectifier Corporation Semiconductor device with reduced contact resistance
US20050269695A1 (en) * 2004-06-07 2005-12-08 Brogle James J Surface-mount chip-scale package
KR100575591B1 (ko) * 2004-07-27 2006-05-03 삼성전자주식회사 웨이퍼 레벨 적층 패키지용 칩 스케일 패키지 및 그 제조 방법
US7170187B2 (en) * 2004-08-31 2007-01-30 International Business Machines Corporation Low stress conductive polymer bump
JP4153932B2 (ja) * 2004-09-24 2008-09-24 株式会社東芝 半導体装置および半導体装置の製造方法
US7394158B2 (en) * 2004-10-21 2008-07-01 Siliconix Technology C.V. Solderable top metal for SiC device
US7812441B2 (en) 2004-10-21 2010-10-12 Siliconix Technology C.V. Schottky diode with improved surge capability
US7834376B2 (en) * 2005-03-04 2010-11-16 Siliconix Technology C. V. Power semiconductor switch
US9419092B2 (en) 2005-03-04 2016-08-16 Vishay-Siliconix Termination for SiC trench devices
US8143095B2 (en) 2005-03-22 2012-03-27 Tessera, Inc. Sequential fabrication of vertical conductive interconnects in capped chips
US7224042B1 (en) * 2005-06-29 2007-05-29 Actel Corporation Integrated circuit wafer with inter-die metal interconnect lines traversing scribe-line boundaries
US8471381B2 (en) * 2005-07-01 2013-06-25 Vishay-Siliconix Complete power management system implemented in a single surface mount package
US7635637B2 (en) * 2005-07-25 2009-12-22 Fairchild Semiconductor Corporation Semiconductor structures formed on substrates and methods of manufacturing the same
US8592286B2 (en) * 2005-10-05 2013-11-26 Stats Chippac Ltd. Ultra-thin wafer system and method of manufacture thereof
US8368165B2 (en) 2005-10-20 2013-02-05 Siliconix Technology C. V. Silicon carbide Schottky diode
TWI324800B (en) 2005-12-28 2010-05-11 Sanyo Electric Co Method for manufacturing semiconductor device
US7936062B2 (en) 2006-01-23 2011-05-03 Tessera Technologies Ireland Limited Wafer level chip packaging
US7939368B2 (en) * 2006-03-07 2011-05-10 Stats Chippac Ltd. Wafer level chip scale package system with a thermal dissipation structure
US8420505B2 (en) * 2006-03-25 2013-04-16 International Rectifier Corporation Process for manufacture of thin wafer
US7768075B2 (en) 2006-04-06 2010-08-03 Fairchild Semiconductor Corporation Semiconductor die packages using thin dies and metal substrates
US7285477B1 (en) 2006-05-16 2007-10-23 International Business Machines Corporation Dual wired integrated circuit chips
US7880278B2 (en) 2006-05-16 2011-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit having stress tuning layer
KR100794658B1 (ko) * 2006-07-07 2008-01-14 삼성전자주식회사 반도체 칩 제조 방법, 이에 의해 형성된 반도체 칩 및 이를포함하는 칩 스택 패키지
DE102006033319B4 (de) * 2006-07-17 2010-09-30 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauelements in Halbleiterchipgröße mit einem Halbleiterchip
US9627552B2 (en) 2006-07-31 2017-04-18 Vishay-Siliconix Molybdenum barrier metal for SiC Schottky diode and process of manufacture
US7807511B2 (en) * 2006-11-17 2010-10-05 Freescale Semiconductor, Inc. Method of packaging a device having a multi-contact elastomer connector contact area and device thereof
US7588951B2 (en) * 2006-11-17 2009-09-15 Freescale Semiconductor, Inc. Method of packaging a semiconductor device and a prefabricated connector
US7696016B2 (en) * 2006-11-17 2010-04-13 Freescale Semiconductor, Inc. Method of packaging a device having a tangible element and device thereof
US7476563B2 (en) 2006-11-17 2009-01-13 Freescale Semiconductor, Inc. Method of packaging a device using a dielectric layer
US8604605B2 (en) 2007-01-05 2013-12-10 Invensas Corp. Microelectronic assembly with multi-layer support structure
US20080166837A1 (en) * 2007-01-10 2008-07-10 Tao Feng Power MOSFET wafer level chip-scale package
JP4600688B2 (ja) * 2007-03-29 2010-12-15 Ｔｄｋ株式会社 電子部品の製造方法および電子部品
US7888236B2 (en) * 2007-05-14 2011-02-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and fabrication methods thereof
US7662669B2 (en) * 2007-07-24 2010-02-16 Northrop Grumman Space & Mission Systems Corp. Method of exposing circuit lateral interconnect contacts by wafer saw
US20090032871A1 (en) * 2007-08-01 2009-02-05 Louis Vervoort Integrated circuit with interconnected frontside contact and backside contact
US8101500B2 (en) 2007-09-27 2012-01-24 Fairchild Semiconductor Corporation Semiconductor device with (110)-oriented silicon
US8053280B2 (en) * 2007-11-02 2011-11-08 Infineon Technologies Ag Method of producing multiple semiconductor devices
US8426960B2 (en) * 2007-12-21 2013-04-23 Alpha & Omega Semiconductor, Inc. Wafer level chip scale packaging
KR100954921B1 (ko) * 2007-12-26 2010-04-27 주식회사 동부하이텍 수직형 반도체 소자의 백메탈층 필링 테스트 방법
US7741156B2 (en) * 2008-05-27 2010-06-22 Stats Chippac, Ltd. Semiconductor device and method of forming through vias with reflowed conductive material
US8039877B2 (en) 2008-09-09 2011-10-18 Fairchild Semiconductor Corporation (110)-oriented p-channel trench MOSFET having high-K gate dielectric
US8710665B2 (en) 2008-10-06 2014-04-29 Infineon Technologies Ag Electronic component, a semiconductor wafer and a method for producing an electronic component
KR101198758B1 (ko) * 2009-11-25 2012-11-12 엘지이노텍 주식회사 수직구조 반도체 발광소자 및 그 제조방법
US8362606B2 (en) 2010-07-29 2013-01-29 Alpha & Omega Semiconductor, Inc. Wafer level chip scale package
JP5646948B2 (ja) * 2010-10-19 2014-12-24 ローム株式会社 半導体装置
US20120119345A1 (en) * 2010-11-15 2012-05-17 Cho Sungwon Integrated circuit packaging system with device mount and method of manufacture thereof
CN102184903B (zh) * 2011-03-09 2013-06-19 格科微电子（上海）有限公司 一种封装的半导体芯片及其通孔的制造方法
DE102011018295B4 (de) * 2011-04-20 2021-06-24 Austriamicrosystems Ag Verfahren zum Schneiden eines Trägers für elektrische Bauelemente
FR2976403B1 (fr) * 2011-06-09 2013-11-22 St Microelectronics Rousset Procede de fabrication d'un circuit integre depourvu de plage de contact de masse
CN102842556B (zh) * 2011-06-21 2015-04-22 万国半导体(开曼)股份有限公司 双面外露的半导体器件及其制作方法
TWI505413B (zh) 2011-07-20 2015-10-21 Xintec Inc 晶片封裝體及其製造方法
CN103579010B (zh) * 2012-08-08 2016-12-21 深南电路有限公司 一种侧壁金属化封装产品的制作方法
KR101971202B1 (ko) * 2012-11-22 2019-04-23 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조방법
JP2015177061A (ja) * 2014-03-14 2015-10-05 株式会社東芝 半導体装置の製造方法および半導体装置
JP6264211B2 (ja) * 2014-07-10 2018-01-24 住友電気工業株式会社 半導体装置の製造方法および半導体装置
TWI584431B (zh) * 2015-01-21 2017-05-21 尼克森微電子股份有限公司 超薄半導體元件封裝結構的製造方法
US9484227B1 (en) 2015-06-22 2016-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Dicing in wafer level package
CN105826288B (zh) * 2016-03-22 2019-08-13 上海朕芯微电子科技有限公司 功率器件的csp封装结构及其制造方法
JP6890893B2 (ja) * 2017-08-08 2021-06-18 株式会社ディスコ 金属が露出した基板の加工方法
JP7171216B2 (ja) * 2018-04-10 2022-11-15 東洋鋼鈑株式会社 圧延接合体及び圧延接合体の製造方法
US10665523B2 (en) * 2018-07-17 2020-05-26 Advance Semiconductor Engineering, Inc. Semiconductor substrate, semiconductor package, and method for forming the same
DE102018132447B4 (de) 2018-12-17 2022-10-13 Infineon Technologies Ag Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung
FR3104316B1 (fr) * 2019-12-04 2021-12-17 St Microelectronics Tours Sas Procédé de fabrication de puces électroniques
FR3104315B1 (fr) 2019-12-04 2021-12-17 St Microelectronics Tours Sas Procédé de fabrication de puces électroniques
FR3104317A1 (fr) 2019-12-04 2021-06-11 Stmicroelectronics (Tours) Sas Procédé de fabrication de puces électroniques

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5872396A (en) * 1994-10-26 1999-02-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with plated heat sink
US5910687A (en) * 1997-01-24 1999-06-08 Chipscale, Inc. Wafer fabrication of die-bottom contacts for electronic devices

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249299A (en) 1979-03-05 1981-02-10 Hughes Aircraft Company Edge-around leads for backside connections to silicon circuit die
JPH0215652A (ja) 1988-07-01 1990-01-19 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5270261A (en) 1991-09-13 1993-12-14 International Business Machines Corporation Three dimensional multichip package methods of fabrication
JPH06209058A (ja) 1993-01-12 1994-07-26 Mitsubishi Electric Corp 半導体装置及びその製造方法，並びにその実装方法
JP2809115B2 (ja) 1993-10-13 1998-10-08 ヤマハ株式会社 半導体装置とその製造方法
US5753529A (en) 1994-05-05 1998-05-19 Siliconix Incorporated Surface mount and flip chip technology for total integrated circuit isolation
US5767578A (en) 1994-10-12 1998-06-16 Siliconix Incorporated Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation
US5597767A (en) * 1995-01-06 1997-01-28 Texas Instruments Incorporated Separation of wafer into die with wafer-level processing
EP2270845A3 (en) 1996-10-29 2013-04-03 Invensas Corporation Integrated circuits and methods for their fabrication
JPH10135386A (ja) * 1996-10-29 1998-05-22 Taiyo Yuden Co Ltd 半導体ベアチップの製造方法
US6054760A (en) * 1996-12-23 2000-04-25 Scb Technologies Inc. Surface-connectable semiconductor bridge elements and devices including the same
US6051489A (en) * 1997-05-13 2000-04-18 Chipscale, Inc. Electronic component package with posts on the active side of the substrate
US5888884A (en) 1998-01-02 1999-03-30 General Electric Company Electronic device pad relocation, precision placement, and packaging in arrays
US6342283B1 (en) * 1999-03-30 2002-01-29 Usf Filtration & Separations, Inc. Melt-blown tubular core elements and filter cartridges including the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5872396A (en) * 1994-10-26 1999-02-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with plated heat sink
US5910687A (en) * 1997-01-24 1999-06-08 Chipscale, Inc. Wafer fabrication of die-bottom contacts for electronic devices

Also Published As

Publication number Publication date
US20010016369A1 (en) 2001-08-23
JP3333765B2 (ja) 2002-10-15
US6562647B2 (en) 2003-05-13
EP1085570A2 (en) 2001-03-21
HK1034805A1 (en) 2001-11-02
CN1288256A (zh) 2001-03-21
JP2001085368A (ja) 2001-03-30
KR100462980B1 (ko) 2004-12-23
KR100462981B1 (ko) 2004-12-23
CN1186810C (zh) 2005-01-26
KR20010029427A (ko) 2001-04-06
EP1085570A3 (en) 2003-04-23
KR20030081216A (ko) 2003-10-17
TW499746B (en) 2002-08-21
US6876061B2 (en) 2005-04-05
US20020185710A1 (en) 2002-12-12

Similar Documents

Publication Publication Date Title
SG97858A1 (en) Chip scale surface mount package for semiconductor device and process of fabricating the same
SG106568A1 (en) Chip scale surface mount package for semiconductor device and process of fabricating the same
SG92671A1 (en) Chip scale surface mount packages for semiconductor device and process of fabricating the same
GB2359191B (en) Semiconductor device and method of manufacturing the same
SG101431A1 (en) Semiconductor wafer having regular or irregular chip pattern and dicing method for the same
GB2353404B (en) Semiconductor device and method for manufacturing the same
SG76592A1 (en) Semiconductor integrated circuit device and process for manufacturing the same
SG75953A1 (en) Process for producing semiconductor integrated circuit device and semiconductor integrated circuit device
AU2001251418A1 (en) Vertical structure and process for semiconductor wafer-level chip scale packages
AU5109900A (en) Semiconductor package, semiconductor device, electronic device, and method of manufacturing semiconductor package
EP0704895A3 (en) Method of manufacturing a semiconductor device and a semiconductor substrate
SG85171A1 (en) Method of manufacturing semiconductor device
GB2345383B (en) Semiconductor package and method of fabricating the same
SG75876A1 (en) Process and device for polishing semiconductor wafers
SG75976A1 (en) Process for manufacturing semiconductor integrated circuit device
SG90228A1 (en) Semiconductor device adhesive layer structure and process for forming structure
HK1049066A1 (zh) 半導體封裝件和半導體封裝件的安裝方法
GB2334621B (en) Method of manufacturing semiconductor device
SG84573A1 (en) Semiconductor device and method of fabricating the same
SG89393A1 (en) Semiconductor device and process of manufacturing the same
GB2347266B (en) Semiconductor device and fabrication process therefor
SG104932A1 (en) Non-planar surface for semiconductor chips and method of forming the non-planar semiconductor chip
EP1318078A4 (en) PACKAGING BAG FOR SEMICONDUCTOR WAFER AND METHOD FOR PACKAGING SEMICONDUCTOR WAFER USING SAID PACKAGING BAG
SG95672A1 (en) Apparatus for mounting of semiconductor chips
GB2348540B (en) Manufacturing method of semiconductor device