KR20020058209A - 반도체패키지 - Google Patents
반도체패키지 Download PDFInfo
- Publication number
- KR20020058209A KR20020058209A KR1020000086246A KR20000086246A KR20020058209A KR 20020058209 A KR20020058209 A KR 20020058209A KR 1020000086246 A KR1020000086246 A KR 1020000086246A KR 20000086246 A KR20000086246 A KR 20000086246A KR 20020058209 A KR20020058209 A KR 20020058209A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor package
- lead
- semiconductor chip
- plane
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H10W70/60—
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- H10W70/415—
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- H10W70/427—
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- H10W74/111—
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- H10W72/07251—
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- H10W72/20—
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- H10W72/90—
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- H10W72/9415—
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- H10W72/9445—
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- H10W90/726—
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (5)
- 대략 평면인 제1면과 제2면을 가지며, 평면상에 대략 방사상으로 배열된 다수의 리드와;상기 리드의 제2면과 일정 거리 이격되어 위치되고, 대략 평면인 제1면과 제2면을 가지며, 상기 제1면이 상기 리드의 제2면을 향하는 동시에, 상기 제1면에는 다수의 입출력패드가 형성된 반도체칩과;상기 반도체칩의 각 입출력패드와 상기 각 리드의 제2면을 상호 전기적으로 접속시키는 다수의 도전성 범프와;상기 반도체칩, 도전성 범프 및 제1면을 제외한 리드가 봉지재로 봉지되어 형성된 봉지부를 포함하여 이루어진 반도체패키지.
- 제1항에 있어서, 상기 리드는 상기 도전성 범프가 용이하게 융착되도록, 상기 도전성 범프와 대응하는 제2면의 일정 영역에 대략 원형인 범프랜드가 형성된 것을 특징으로 하는 반도체패키지.
- 제2항에 있어서, 상기 범프랜드를 제외한 리드의 제2면 전체에 일정 두께의 보호막이 형성된 것을 특징으로 하는 반도체패키지.
- 제3항에 있어서, 상기 보호막은 폴리이미드(Polyimide), 티타늄(Ti), 알루미늄(Al) 중 어느 하나에 의해 형성된 것을 특징으로 하는 반도체패키지.
- 제1항 내지 제4항중 어느 한 항에 있어서, 상기 리드는 제1면과 제2면 사이에 제3면이 더 형성됨과 동시에, 상기 제3면은 봉지부 내측에 위치되고, 상기 봉지부 하면에는 외부 입출력단자 역할을 하는 상기 리드의 제1면이 배열된 채 노출된 것을 특징으로 하는 반도체패키지.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020000086246A KR20020058209A (ko) | 2000-12-29 | 2000-12-29 | 반도체패키지 |
| US10/034,656 US6803645B2 (en) | 2000-12-29 | 2001-12-26 | Semiconductor package including flip chip |
| US10/944,314 US7045882B2 (en) | 2000-12-29 | 2004-09-17 | Semiconductor package including flip chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020000086246A KR20020058209A (ko) | 2000-12-29 | 2000-12-29 | 반도체패키지 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20020058209A true KR20020058209A (ko) | 2002-07-12 |
Family
ID=19703992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020000086246A Ceased KR20020058209A (ko) | 2000-12-29 | 2000-12-29 | 반도체패키지 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US6803645B2 (ko) |
| KR (1) | KR20020058209A (ko) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100861511B1 (ko) * | 2002-07-24 | 2008-10-02 | 삼성테크윈 주식회사 | 리이드 프레임과 그것을 구비한 반도체 팩키지 및, 반도체팩키지의 제조 방법 |
| US6894376B1 (en) | 2003-06-09 | 2005-05-17 | National Semiconductor Corporation | Leadless microelectronic package and a method to maximize the die size in the package |
| US7087986B1 (en) * | 2004-06-18 | 2006-08-08 | National Semiconductor Corporation | Solder pad configuration for use in a micro-array integrated circuit package |
| TWI236110B (en) * | 2004-06-25 | 2005-07-11 | Advanced Semiconductor Eng | Flip chip on leadframe package and method for manufacturing the same |
| US8067823B2 (en) * | 2004-11-15 | 2011-11-29 | Stats Chippac, Ltd. | Chip scale package having flip chip interconnect on die paddle |
| US7645640B2 (en) * | 2004-11-15 | 2010-01-12 | Stats Chippac Ltd. | Integrated circuit package system with leadframe substrate |
| US7880313B2 (en) * | 2004-11-17 | 2011-02-01 | Chippac, Inc. | Semiconductor flip chip package having substantially non-collapsible spacer |
| TWI237364B (en) * | 2004-12-14 | 2005-08-01 | Advanced Semiconductor Eng | Flip chip package with anti-floating mechanism |
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| JP5493323B2 (ja) * | 2008-09-30 | 2014-05-14 | 凸版印刷株式会社 | リードフレーム型基板の製造方法 |
| KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
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| CN102842515A (zh) * | 2011-06-23 | 2012-12-26 | 飞思卡尔半导体公司 | 组装半导体器件的方法 |
| CN102394232A (zh) * | 2011-11-29 | 2012-03-28 | 杭州矽力杰半导体技术有限公司 | 一种引线框架及应用其的芯片倒装封装装置 |
| KR101538543B1 (ko) * | 2013-08-13 | 2015-07-22 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
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| CN107919339B (zh) * | 2016-10-11 | 2022-08-09 | 恩智浦美国有限公司 | 具有高密度引线阵列的半导体装置及引线框架 |
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-
2000
- 2000-12-29 KR KR1020000086246A patent/KR20020058209A/ko not_active Ceased
-
2001
- 2001-12-26 US US10/034,656 patent/US6803645B2/en not_active Expired - Lifetime
-
2004
- 2004-09-17 US US10/944,314 patent/US7045882B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US20020084534A1 (en) | 2002-07-04 |
| US20050029636A1 (en) | 2005-02-10 |
| US6803645B2 (en) | 2004-10-12 |
| US7045882B2 (en) | 2006-05-16 |
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