JPH0383366A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0383366A JPH0383366A JP1220764A JP22076489A JPH0383366A JP H0383366 A JPH0383366 A JP H0383366A JP 1220764 A JP1220764 A JP 1220764A JP 22076489 A JP22076489 A JP 22076489A JP H0383366 A JPH0383366 A JP H0383366A
- Authority
- JP
- Japan
- Prior art keywords
- die pad
- semiconductor device
- corner
- corners
- cracks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 238000007789 sealing Methods 0.000 claims description 5
- 230000035882 stress Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 238000005352 clarification Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、樹脂封止型半導体装置、詳しくはダイパッド
の角の部分から発生するクラックを低減させる方策に関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a resin-sealed semiconductor device, and more particularly to a method for reducing cracks occurring at the corner portions of a die pad.
従来の技術
近年、半導体装置の高密度実装を図るために表面実装法
が急速に普及している。表面実装における最大の問題点
は、パッケージ全体が急激に215℃〜260℃の高温
にさらされることにある。この急激な熱ストレスによっ
て、パッケージの封止樹脂に吸湿されダイパッドと樹脂
の界面に偏析した水分が水蒸気化し、界面の剥離を引き
起こし更に気化膨張した水蒸気圧はダイパッド下部にお
いて膨れを生じさせ、ついには応力の最も集中するダイ
パッドの角の部分からクラックが発生するようになる。BACKGROUND OF THE INVENTION In recent years, surface mounting methods have rapidly become popular for high-density mounting of semiconductor devices. The biggest problem with surface mounting is that the entire package is suddenly exposed to high temperatures of 215°C to 260°C. Due to this rapid thermal stress, the moisture absorbed by the package's sealing resin and segregated at the interface between the die pad and the resin turns into water vapor, causing separation at the interface, and the vapor pressure that evaporates and expands causes swelling at the bottom of the die pad, and finally Cracks begin to occur at the corners of the die pad where stress is most concentrated.
第2図は、従来の半導体装置の断面図であり、1および
2はリードフレーム、3はダイパッド、4は半導体チッ
プ、5は封止樹脂、6はダイパッドと封止樹脂との界面
、7.8の部分が応力の集中しやすい角の部分である。FIG. 2 is a cross-sectional view of a conventional semiconductor device, in which 1 and 2 are lead frames, 3 is a die pad, 4 is a semiconductor chip, 5 is a sealing resin, 6 is an interface between the die pad and the sealing resin, and 7. The part numbered 8 is the corner part where stress tends to concentrate.
以上のように構成された半導体装置において、従来ダイ
パッドは、打ち抜き加工などにより形成されるため、角
の部分は鋭く切り立った構造を持っていた。In the semiconductor device configured as described above, the conventional die pad is formed by punching or the like, and therefore has a structure with sharp corners.
発明が解決しようとする課題
しかしながら、上記従来の技術ではダイパッドの角の部
分に応力が集中し、その部分からクラックが発生しやす
いという問題点があった。Problems to be Solved by the Invention However, the above-mentioned conventional technology has a problem in that stress is concentrated at the corner portions of the die pad, and cracks are likely to occur from those portions.
本発明は、上記従来の問題点を解決するもので、ダイパ
ッドの角の部分において、クラックの発生しにくい構造
を持つ半導体装置を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and aims to provide a semiconductor device having a structure in which cracks are less likely to occur at the corner portions of a die pad.
lIl!題を解決するための手段
この目的を達成するために本発明は、ダイパ=ドの角の
部分に丸みを付けることにより、その自分に集中する応
力を緩和させクラックの発生をa減させたものである。lIl! Means for Solving the Problem In order to achieve this object, the present invention has rounded corners of the die pad to relieve stress concentrated on itself and reduce the occurrence of cracks. It is.
作用
この構成によって、ダイパッドの角に付けらtた丸みが
、応力の集中を緩和しようとするため、ダイパッドの角
の部分において、発生するクララフを低減する事ができ
る。Effect: With this configuration, the roundness provided at the corners of the die pad attempts to relieve stress concentration, so that it is possible to reduce clarifications that occur at the corner portions of the die pad.
実施例
以下本発明の一実施例について、図面を参照しながら説
明する。EXAMPLE An example of the present invention will be described below with reference to the drawings.
第1図は本発明の一実施例における半導体装置の断面図
を示すものである。第1図において、9および10はリ
ードフレーム、11はダイパッドの丸みをつけた部分、
12は半導体チップ、13は封止樹脂であり、これらは
従来例の構成と同じである。第1図において、14は角
を丸めたダイパッドである。角における丸みの曲率半径
は太きければ大きいほど効果が大きい。従って、最大の
曲率半径は、ダイパッドの厚みの半分となる。FIG. 1 shows a cross-sectional view of a semiconductor device according to an embodiment of the present invention. In FIG. 1, 9 and 10 are lead frames, 11 is a rounded part of the die pad,
Reference numeral 12 represents a semiconductor chip, and reference numeral 13 represents a sealing resin, which have the same structure as the conventional example. In FIG. 1, 14 is a die pad with rounded corners. The thicker the radius of curvature of the corner, the greater the effect. Therefore, the maximum radius of curvature is half the thickness of the die pad.
以上のように本実施例によれば、ダイパッドの角に付け
られた丸みが応力集中を妨げるため、ダイパッドの角か
ら発生するクラックの発生を低減することができる。こ
の丸みは、角を切取り、多角形にしただけでも効果はあ
るが、丸めた方が効果的である。また、有効な結果を得
るためには、曲率半径の最小値は30μm以上にしなけ
ればならない。As described above, according to this embodiment, the roundness provided at the corners of the die pad prevents stress concentration, so that it is possible to reduce the occurrence of cracks that occur from the corners of the die pad. This roundness can be effective by simply cutting off the corners and making it into a polygon, but it is more effective to round it. Also, in order to obtain effective results, the minimum radius of curvature must be greater than or equal to 30 μm.
発明の効果
以上のように本発明は、ダイパッドの角の部分に丸みを
付けることにより、ダイパッドの角の部分からのクラッ
クの発生を低減できるものである。また、ダイパッドの
みが、従来のものと異なるだけであるので、バラケージ
ング工程にはなんの変更ももたらさずモールド装置も今
までのものが使用できる。Effects of the Invention As described above, the present invention can reduce the occurrence of cracks from the corner portions of the die pad by rounding the corner portions of the die pad. Further, since only the die pad is different from the conventional one, the conventional molding device can be used without any change in the bulk caging process.
第1図は本発明の実施例における半導体装置の断面図、
第2図は従来の半導体装置の断面図である。FIG. 1 is a cross-sectional view of a semiconductor device in an embodiment of the present invention;
FIG. 2 is a sectional view of a conventional semiconductor device.
Claims (1)
の角の部分から、封止樹脂に向かって発生するクラック
を低減させることを特徴とする半導体装置。A semiconductor device characterized in that by rounding the corners of the die pad, cracks that occur from the corners of the die pad toward the sealing resin are reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1220764A JPH0383366A (en) | 1989-08-28 | 1989-08-28 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1220764A JPH0383366A (en) | 1989-08-28 | 1989-08-28 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0383366A true JPH0383366A (en) | 1991-04-09 |
Family
ID=16756185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1220764A Pending JPH0383366A (en) | 1989-08-28 | 1989-08-28 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0383366A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0503072A1 (en) * | 1990-09-10 | 1992-09-16 | Fujitsu Limited | Semiconductor device and its manufacturing process |
-
1989
- 1989-08-28 JP JP1220764A patent/JPH0383366A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0503072A1 (en) * | 1990-09-10 | 1992-09-16 | Fujitsu Limited | Semiconductor device and its manufacturing process |
US5440170A (en) * | 1990-09-10 | 1995-08-08 | Fujitsu Limited | Semiconductor device having a die pad with rounded edges and its manufacturing method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH05144982A (en) | Integrated circuit device | |
US5119171A (en) | Semiconductor die having rounded or tapered edges and corners | |
JPH0383366A (en) | Semiconductor device | |
JPS55127047A (en) | Resin-sealed semiconductor device | |
JPS5988857A (en) | Semiconductor device | |
JPH0318048A (en) | Semiconductor device | |
JPS61267333A (en) | Semiconductor device | |
KR940002774Y1 (en) | Lead-flame | |
JPS63133656A (en) | Semiconductor device | |
JPH02117162A (en) | Semiconductor device | |
JPH02129953A (en) | semiconductor materials | |
KR940000745B1 (en) | Wire bonding method | |
JPH0499363A (en) | Semiconductor package | |
JPS62254457A (en) | Lead frame for integrated circuit | |
KR200144295Y1 (en) | Concave-convex BGA Package | |
JPS6450454A (en) | Manufacture of lead frame and semiconductor device | |
JPS5460564A (en) | Resin mold semiconductor device | |
JPS51126078A (en) | Manufacturing method of semi-conductor equpment | |
JPH05235087A (en) | Semiconductor integrated circuit device | |
JPS5516451A (en) | Method of manufacturing semiconductor device | |
JPH01293642A (en) | Semiconductor device | |
JPS5494879A (en) | Glass passivation semiconductor device | |
JPS62257751A (en) | Ceramic case for semiconductor device | |
JPH0465448U (en) | ||
JPS58118751U (en) | semiconductor equipment |