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EP0607614A2 - Fuhlschaltung, Speicherschaltung, Schaltung mit negativer Wiederstand, Schmitt-Trigger, Belastungsschaltung, Pegel-Schieber und Verstärker - Google Patents

Fuhlschaltung, Speicherschaltung, Schaltung mit negativer Wiederstand, Schmitt-Trigger, Belastungsschaltung, Pegel-Schieber und Verstärker Download PDF

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Publication number
EP0607614A2
EP0607614A2 EP93120909A EP93120909A EP0607614A2 EP 0607614 A2 EP0607614 A2 EP 0607614A2 EP 93120909 A EP93120909 A EP 93120909A EP 93120909 A EP93120909 A EP 93120909A EP 0607614 A2 EP0607614 A2 EP 0607614A2
Authority
EP
European Patent Office
Prior art keywords
coupled
input
circuit
potential
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP93120909A
Other languages
English (en)
French (fr)
Other versions
EP0607614A3 (de
EP0607614B1 (de
Inventor
Satoru C/O Oki Electric Industry Co. Ltd. Tanoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP34964592A external-priority patent/JP3176458B2/ja
Priority claimed from JP35974292A external-priority patent/JP3222235B2/ja
Priority claimed from JP4349646A external-priority patent/JP3048774B2/ja
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of EP0607614A2 publication Critical patent/EP0607614A2/de
Publication of EP0607614A3 publication Critical patent/EP0607614A3/xx
Application granted granted Critical
Publication of EP0607614B1 publication Critical patent/EP0607614B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/145—Indicating the presence of current or voltage
    • G01R19/15—Indicating the presence of current
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/561—Multilevel memory cell aspects
    • G11C2211/5614—Multilevel memory cell comprising negative resistance, quantum tunneling or resonance tunneling elements

Definitions

  • Circuit A and circuit B are cross-coupled: the input node of each is coupled to the output node of the other. They therefore operate at a point where their input-output characteristics intersect, but due to the similarity of their characteristics, the point of intersection may not be uniquely defined. This can cause the sense circuit 2 to oscillate between two operating points.
  • Fig. 13 illustrates input-output characteristics of circuit A and circuit B in Fig. 12.
  • Fig. 14 is a schematic diagram of a seventh novel sense circuit.
  • Fig. 2 shows a sense circuit illustrating a first embodiment of the invention.
  • a small (possibly zero) bias current I1 will flow in or out at the input terminal IN.
  • the input terminal IN is considered to be a current source with respect to external circuits, I1 flowing outward. If the flow is actually inward, then I1 is negative.
  • This sense circuit comprises a novel load circuit 32, and the same current-to-voltage converter 12 and inverting amplifier 18 (now indicated by a single symbol) as in Fig. 2. Its basic operation is the same as in the first three embodiments. A description of the identical circuit elements and the basic operation will be omitted in order to concentrate on the characteristics of the load circuit 32.
  • Fig. 10 shows a sixth embodiment of the invented sense circuit. Elements common to Fig. 2 have the same reference numerals.
  • FIG. 14 This embodiment, shown in Fig. 14, combines the fifth and sixth embodiments. Elements common to Figs. 8 and 10 have the same reference numerals.
  • amplifier circuit 60 in Fig. 14 is not restricted to sense circuits; it is effective when used as a level shifter and inverting amplifier in various other types of circuits as well.
  • This memory circuit comprises a sense circuit 100 generally similar to the sense circuit of Fig. 17.
  • the sense circuit 100 comprises a first circuit section 110A having a first output terminal OUT and a first input terminal IN, and a second circuit section 120A, identical in structure to the first circuit section 110A, having a second output terminal OUTB and a second input terminal INB.
  • the input terminals IN and INB are coupled to a pair of data lines DL and DLB.
  • the input terminals IN and INB in Fig. 22 can be coupled to data lines, and the output terminals OUT and OUTB to data bus lines, in the same way as in Fig. 19, to configure the read-out circuit of a semiconductor memory.
  • the resistance circuits 16 and 22 in Figs. 2, 8, 10, and 14 and the resistance circuits 113 and 123 in Figs. 17, 20, and 21 may also comprise a resistance coupled in series with a switch.
  • a resistance circuit as shown in Fig. 23 can be used, comprising a terminal RA coupled to a sense-circuit output terminal, an N-MOSFET 130 with drain and gate coupled to terminal RA and acting as a resistive element, an N-MOSFET 132 with drain coupled to the source of N-MOSFET 130 and acting as a switch, a terminal RB coupled to the source of N-MOSFET 132, and a terminal RC coupled to the gate of N-MOSFET 132.
  • Terminal RB is coupled to ground, for example.
  • Terminal RC receives a control signal that switches N-MOSFET 132 off to prevent current flow when the connected sense circuit is inactive.
  • N-MOSFET 152 When terminal ⁇ is high (at the V CC potential), P-MOSFET 150 is in the off-state and N-MOSFET 152 is in the on-state. The off-state of the P-MOSFET 150 cuts off the bias current flowing through P-MOSFETs 142 and 144. Since N-MOSFET 152 is switched on, node X is at ground potential, and N-MOSFET 140 is in the off-state. The negative-resistance circuit is completely disabled; no current flows through it, either between V CC and ground or between the input/output terminals D and S.
  • Fig. 31 illustrates an application of the invented negative-resistance circuit in a Schmitt trigger.
  • the Schmitt trigger comprises the negative-resistance circuit 160 of Fig. 24 and a P-MOSFET 162.
  • the first input/output terminal S of the negative-resistance circuit 160 is coupled to ground, and the control terminal G is coupled to an input terminal IN.
  • the second input/output terminal D is coupled to an output terminal OUT and to the drain of P-MOSFET 162.
  • the gate of P-MOSFET 162 is coupled to the input terminal IN, and its source is coupled to V CC .
  • Curves C NR1 , C NR2 , and C NR3 are volt-ampere characteristics of the negative-resistance circuit 160 for three increasing values of the potential at input terminal IN, similar to the three curves shown in Fig. 28.
  • Curves C P1 , C P2 , and C P3 are corresponding characteristic curves of P-MOSFET 162. As the potential of input terminal IN rises, for a given value of V OUT , more current flows through the negative-resistance circuit 160, and less current flows through P-MOSFET 162.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Amplifiers (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
EP93120909A 1992-12-28 1993-12-27 Stromerfassungsschaltung Expired - Lifetime EP0607614B1 (de)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
JP349646/92 1992-12-28
JP34964592A JP3176458B2 (ja) 1992-12-28 1992-12-28 負性抵抗回路及びこれを用いたシュミットトリガ回路
JP349645/92 1992-12-28
JP359742/92 1992-12-28
JP34964692 1992-12-28
JP34964592 1992-12-28
JP35974292A JP3222235B2 (ja) 1992-12-28 1992-12-28 センス回路
JP4349646A JP3048774B2 (ja) 1992-12-28 1992-12-28 センス回路及びこれを用いたメモリ回路
JP35974292 1992-12-28

Publications (3)

Publication Number Publication Date
EP0607614A2 true EP0607614A2 (de) 1994-07-27
EP0607614A3 EP0607614A3 (de) 1994-08-31
EP0607614B1 EP0607614B1 (de) 2000-04-12

Family

ID=27341317

Family Applications (1)

Application Number Title Priority Date Filing Date
EP93120909A Expired - Lifetime EP0607614B1 (de) 1992-12-28 1993-12-27 Stromerfassungsschaltung

Country Status (4)

Country Link
US (6) US5504442A (de)
EP (1) EP0607614B1 (de)
KR (3) KR100304813B1 (de)
DE (1) DE69328348T2 (de)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859777B2 (en) * 1994-11-14 2005-02-22 Siemens Aktiengesellschaft Hypertext navigation system controlled by spoken words
EP1978638A3 (de) * 2007-04-06 2014-01-15 MediaTek, Inc Negative Transkonduktanz-Schaltung, Filter und geräuscharmer Verstärker mit derartigem Filter
WO2017127977A1 (en) 2016-01-25 2017-08-03 Telefonaktiebolaget Lm Ericsson (Publ) Circuitry and method for controlling a power amplifier in a transmit/receive switching system
EP3754843A1 (de) * 2019-06-21 2020-12-23 ABLIC Inc. Schaltung zur spannung/strom-umsetzung und vorrichtung zur ladungs-/entladungssteuerung

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JPH0918329A (ja) * 1995-07-03 1997-01-17 Oki Electric Ind Co Ltd 可変レベルシフタ及びマルチプライヤ
US6104229A (en) * 1996-05-02 2000-08-15 Integrated Device Technology, Inc. High voltage tolerable input buffer and method for operating same
JPH103796A (ja) * 1996-06-14 1998-01-06 Nec Corp センスアンプ回路
KR100267012B1 (ko) * 1997-12-30 2000-10-02 윤종용 반도체 메모리 장치의 감지 증폭기
DE69920159T2 (de) * 1998-06-09 2005-09-29 Koninklijke Philips Electronics N.V. Strommessvorrichtung und telefonendgerät unter verwendung einer solchen strommessvorrichtung
JP3609260B2 (ja) * 1998-07-17 2005-01-12 沖電気工業株式会社 半導体装置の増幅回路
US5999454A (en) * 1998-08-19 1999-12-07 Lucent Technologies, Inc. Sense amplifier for flash memory
US6111425A (en) * 1998-10-15 2000-08-29 International Business Machines Corporation Very low power logic circuit family with enhanced noise immunity
US6433590B1 (en) 1998-12-18 2002-08-13 Samsung Electronics Co., Ltd. Current mirror type sense amplifier circuits for semiconductor memory devices and methods of operating same
US6229468B1 (en) * 1999-01-06 2001-05-08 Raytheon Company System for quantizing an analog signal utilizing a resonant tunneling diode differential ternary quantizer
US7259479B1 (en) * 1999-02-18 2007-08-21 Robertshaw Controls Company Transformerless power supply, dual positive or dual negative supplies
JP3734664B2 (ja) * 2000-02-24 2006-01-11 株式会社日立製作所 表示デバイス
DE10164779B4 (de) * 2000-10-02 2011-04-28 Fujitsu Ltd., Kawasaki Empfänger, Hybridschaltung, Ansteuerschaltung und Signalübertragungssystem zur bidirektionalen Signalübertragung zum gleichzeitigen Ausführen einer derartigen Signalübertragung in beiden Richtungen
FR2820747B1 (fr) * 2001-02-15 2005-10-07 Rhodia Chimie Sa Composition a base de polysaccharide non-ionique pour le soin des articles en fibres textiles
US6430078B1 (en) * 2001-07-03 2002-08-06 Agilent Technologies, Inc. Low-voltage digital ROM circuit and method
US6605973B1 (en) * 2002-03-15 2003-08-12 Taiwan Semiconductor Manufacturing Company High voltage discharge circuit
GB2405701A (en) * 2003-09-03 2005-03-09 Seiko Epson Corp Differential current sensing circuit
US7696804B2 (en) * 2007-03-31 2010-04-13 Sandisk 3D Llc Method for incorporating transistor snap-back protection in a level shifter circuit
US7696805B2 (en) * 2007-03-31 2010-04-13 Sandisk 3D Llc Level shifter circuit incorporating transistor snap-back protection
US8022745B1 (en) * 2007-09-17 2011-09-20 Rf Micro Devices, Inc. High voltage switch using multiple cascode circuits
WO2009123783A1 (en) * 2008-04-03 2009-10-08 Lawson Labs, Inc. Dc common-mode level shifter
US8134300B2 (en) * 2008-08-08 2012-03-13 Mag Instrument, Inc. Portable lighting devices
US8289796B2 (en) * 2010-01-26 2012-10-16 Micron Technology, Inc. Sense amplifier having loop gain control
US8705304B2 (en) 2010-03-26 2014-04-22 Micron Technology, Inc. Current mode sense amplifier with passive load
CN102213971B (zh) * 2010-04-09 2015-09-09 赛恩倍吉科技顾问（深圳）有限公司 时序控制电路及具有该时序控制电路的前端总线电源
US8283950B2 (en) 2010-08-11 2012-10-09 Micron Technology, Inc. Delay lines, amplifier systems, transconductance compensating systems and methods of compensating
US8810281B2 (en) 2011-07-26 2014-08-19 Micron Technology, Inc. Sense amplifiers including bias circuits
CN104471364B (zh) * 2012-07-16 2016-10-12 株式会社电装 电子装置及其制造方法
CN104396013A (zh) * 2012-07-27 2015-03-04 惠普发展公司，有限责任合伙企业 存储具有负微分电阻材料的存储器
KR102294149B1 (ko) 2015-02-13 2021-08-26 삼성전자주식회사 슈미트 트리거 회로 및 이를 포함하는 비휘발성 메모리 장치
CN108806742B (zh) * 2017-05-04 2022-01-04 汤朝景 随机存取存储器并且具有与其相关的电路、方法以及设备
TWI682634B (zh) * 2018-11-06 2020-01-11 崛智科技有限公司 積體電路系統

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859777B2 (en) * 1994-11-14 2005-02-22 Siemens Aktiengesellschaft Hypertext navigation system controlled by spoken words
EP1978638A3 (de) * 2007-04-06 2014-01-15 MediaTek, Inc Negative Transkonduktanz-Schaltung, Filter und geräuscharmer Verstärker mit derartigem Filter
WO2017127977A1 (en) 2016-01-25 2017-08-03 Telefonaktiebolaget Lm Ericsson (Publ) Circuitry and method for controlling a power amplifier in a transmit/receive switching system
US10312951B2 (en) 2016-01-25 2019-06-04 Telefonaktiebolaget Lm Ericsson (Publ) Circuitry and method for controlling a power amplifier in a transmit/receive switching system
EP3754843A1 (de) * 2019-06-21 2020-12-23 ABLIC Inc. Schaltung zur spannung/strom-umsetzung und vorrichtung zur ladungs-/entladungssteuerung
US11042177B2 (en) 2019-06-21 2021-06-22 Ablic Inc. Voltage-current conversion circuit and charge-discharge control device

Also Published As

Publication number Publication date
US5514986A (en) 1996-05-07
US5498991A (en) 1996-03-12
KR100330915B1 (ko) 2002-04-03
US5519348A (en) 1996-05-21
DE69328348D1 (de) 2000-05-18
KR940016264A (ko) 1994-07-22
KR100304813B1 (ko) 2001-11-22
US5504442A (en) 1996-04-02
EP0607614A3 (de) 1994-08-31
KR100313776B1 (ko) 2001-11-16
US5489874A (en) 1996-02-06
EP0607614B1 (de) 2000-04-12
US5510746A (en) 1996-04-23
DE69328348T2 (de) 2000-12-28

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