CN107946805A - 端子 - Google Patents
端子 Download PDFInfo
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- CN107946805A CN107946805A CN201711040795.9A CN201711040795A CN107946805A CN 107946805 A CN107946805 A CN 107946805A CN 201711040795 A CN201711040795 A CN 201711040795A CN 107946805 A CN107946805 A CN 107946805A
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- arm
- chip module
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- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
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Abstract
本发明公开了一种端子,用以电性连接一芯片模块至一电路板,包括:一连接部;一上弹性臂自连接部一端向前延伸形成,用于向上抵接芯片模块;一下弹性臂自连接部相对另一端向前延伸形成,用于向下导接电路板;上弹性臂和下弹性臂末端的板缘分别设有一斜面,且每一斜面的相对两端上下间隔排列,当芯片模块下压上弹性臂时,两斜面相互抵接,从而在芯片模块与电路板之间形成两条相互并联的导电路径,减小了芯片模块与电路板间电讯传输时的电阻抗;并且通过两斜面的导向作用,不仅有利于芯片模块下压端子,而且可以刮擦去除形成在两斜面上的氧化层,增强了上弹性臂和下弹性臂之间的抵接效果,保证了上弹性臂与下弹性臂之间的稳定抵接。
Description
技术领域
本发明涉及一种端子,尤其是指一种电性连接芯片模块至电路板的端子。
背景技术
导电端子被广泛地应用于各种电子设备的电连接器中,用以电性连接芯片模块和印刷电路板。所述导电端子包括基部、以及自基部上下两端分别倾斜延伸的一对弹性臂,当所述芯片模块压缩所述导电端子时,所述导电端子的一对所述弹性臂开始自初始状态开始倾斜,以在芯片模块和印刷电路板之间提供信号传输路径。
然而,该种导电端子至少存在以下缺点:该导电端子的电性导通路径是这样实现的:芯片模块通过与导电端子弹性臂自由末端的接触点接触,从而将电性传到导电端子上,导电端子再将电性经由与芯片模块接触的弹性臂、基部、与印刷电路板接触的另一个弹性臂而将电性传至印刷电路板,故,该种导电端子的电性传输路径较远,使得芯片模块与印刷电路板间电讯传输时仍存在较强的电阻抗。
因此,有必要设计一种新的导电端子,以克服上述问题。
发明内容
本发明的创作目的在于提供一种可方便芯片模块下压,从而形成稳定的两条并联导电路径,以减小芯片模块与电路板间电讯传输时的电阻抗的端子。
为了达到上述目的,本发明采用如下技术方案:
一种端子,用以电性连接一芯片模块至一电路板,其特征在于,包括:一连接部;一上弹性臂自所述连接部一端向前延伸形成,用于向上抵接所述芯片模块;一下弹性臂自所述连接部相对另一端向前延伸形成,用于向下导接所述电路板;所述上弹性臂和下弹性臂末端的板缘分别设有一斜面,且每一所述斜面的相对两端上下间隔排列,当所述芯片模块下压所述上弹性臂时,两所述斜面相互抵接。
进一步,所述斜面的一端沿前后方向相对于两所述斜面的抵接位置更靠近所述连接部。
进一步,所述上弹性臂具有相对的一左板缘和一右板缘,所述斜面自所述左板缘延伸至所述右板缘。
进一步,所述斜面的左右两端上下间隔排列。
进一步,两所述斜面的相对两端分别沿上下方向相互平齐。
进一步,所述上弹性臂包括一第一臂,及自第一臂朝所述下弹性臂撕裂形成的一第二臂,所述下弹性臂包括一第三臂,及自第三臂朝所述上弹性臂撕裂形成的一第四臂,所述第二臂和第四臂设有所述斜面,当所述芯片模块下压所述第一臂时,所述第一臂抵接所述第三臂,所述第二臂和第四臂通过两所述斜面相互抵接。
进一步,所述第一臂与所述第三臂的抵接方式和所述第二臂与所述第四臂的抵接方式不同。
进一步,所述第一臂具有呈弧形的一上接触部用于向上抵接所述芯片模块,所述第二臂与所述上接触部相切。
进一步,所述第一臂抵接所述第三臂从而形成一第一抵接位置,所述第二臂抵接所述第四臂从而形成一第二抵接位置,所述第一抵接位置与所述第二抵接位置沿前后方向间隔排列。
进一步,所述第一臂具有一上接触部用于向上抵接所述芯片模块,所述第一抵接位置和所述第二抵接位置沿前后方向位于所述上接触部的相对两侧。
与现有技术相比,本发明端子具有以下有益效果:
所述上弹性臂和下弹性臂末端的板缘分别具有一斜面,当所述芯片模块下压所述上弹性臂时,两所述斜面相互抵接,从而在芯片模块与电路板之间形成依次经由芯片模块、上弹性臂、连接部、下弹性臂、电路板;以及依次经由芯片模块、上弹性臂、两斜面、下弹性臂、电路板的两条相互并联的导电路径,减小了所述芯片模块与电路板间电讯传输时的电阻抗;并且通过两所述斜面的导向作用,不仅有利于所述芯片模块下压所述端子,而且可以刮擦去除形成在两所述斜面上的氧化层,增强了所述上弹性臂和下弹性臂之间的抵接效果,保证了所述上弹性臂与下弹性臂之间的稳定抵接。
【附图说明】
图1为本发明第一实施例端子在芯片模块下压前的立体图;
图2为图1中的端子在芯片模块下压后的立体图;
图3为图2的主视图;
图4为本发明第二实施例端子在芯片模块下压前的立体图;
图5为图4中的端子在芯片模块下压后的立体图;
图6为图5的侧视图。
具体实施方式的附图标号说明:
端子1 | 连接部11 | 上弹性臂12 | 第一臂12A |
上延伸部121 | 上接触部122 | 上抵接部123 | 左板缘1231 |
右板缘1232 | 第二臂12B | 下弹性臂13 | 第三臂13A |
下延伸部131 | 下接触部132 | 下抵接部133 | 第四臂13B |
斜面S | 第一抵接位置P1 | 第二抵接位置P2 | 芯片模块2 |
电路板3 |
【具体实施方式】
为便于更好的理解本发明的目的、结构、特征以及功效等,现结合附图和具体实施方式对本发明作进一步说明。
如图1至图3所示,为本发明第一实施例的端子1,用以电性连接一芯片模块2至一电路板3,其包括一连接部11,一上弹性臂12及一下弹性臂13。
如图1和图2所示,所述连接部11呈圆弧状。所述上弹性臂12自所述连接部11顶端向前弯折延伸形成,用于向上抵接所述芯片模块2。所述下弹性臂13自所述连接部11底端向前弯折延伸形成,用于向下导接所述电路板3。
沿其延伸方向,所述连接部11、所述上弹性臂12和所述下弹性臂13的宽度相等。
所述上弹性臂12包括一上延伸部121自所述连接部11朝前上方倾斜延伸形成、一上接触部122自所述上延伸部121朝前上方弯折延伸形成、及一上抵接部123自所述上接触部122朝前下方倾斜延伸形成。
所述上接触部122呈圆弧状且用于向上抵接所述芯片模块2,所述上抵接部123与所述上接触部122相切。
所述上抵接部123具有相对的一左板缘1231和一右板缘1232,所述上抵接部123末端的板缘设有一斜面S,所述斜面S自所述左板缘1231延伸至所述右板缘1232,所述斜面S的左右两端上下间隔排列。
所述下弹性臂13包括一下延伸部131自所述连接部11朝前下方倾斜延伸形成、一下接触部132自所述下延伸部131朝前下方弯折延伸形成、及一下抵接部133自所述下接触部132朝前上方倾斜延伸形成。
所述下接触部132呈圆弧状且用于向下导接所述电路板3,所述下抵接部133与所述下接触部132相切。
所述下抵接部133也设有所述斜面S,且用于连接一料带(未图示)。
在所述芯片模块2下压所述上弹性臂12前,两所述斜面S沿上下方向相互平行。
如图2和图3所示,当所述芯片模块2下压所述上弹性臂12时,两所述斜面S相互抵接,从而在芯片模块2与电路板3之间形成依次经由芯片模块2、上接触部122、上延伸部121、连接部11、下延伸部131、下接触部132、电路板3;以及依次经由芯片模块2、上接触部122、上抵接部123、两斜面S、下抵接部133、下接触部132、电路板3的两条相互并联的导电路径,减小了所述芯片模块2与电路板3间电讯传输时的电阻抗。
两所述斜面S的相对两端分别沿上下方向相互平齐,且每一所述斜面S的一端沿前后方向相对于两所述斜面S的抵接位置更靠近所述连接部11。
如图4至图6所示,为本发明第二实施例的端子1,其与第一实施例的不同之处主要在于,本实施例中:
所述上弹性臂12包括一第一臂12A,及自第一臂12A中间朝所述下弹性臂13撕裂形成的一第二臂12B(在其它实施例中,所述第二臂12B也可自所述上延伸部121一侧朝所述下弹性臂13撕裂形成),所述第一臂12A设有所述上延伸部121、所述上接触部122和所述上抵接部123,所述第二臂12B与所述上接触部122相切,且所述上抵接部123和所述第二臂12B之间的距离沿其延伸方向逐渐增大。
所述下弹性臂13包括一第三臂13A,及自第三臂13A中间朝所述上弹性臂12撕裂形成的一第四臂13B(在其它实施例中,所述第四臂13B也可自所述下延伸部131一侧朝所述上弹性臂12撕裂形成),所述第三臂13A设有所述下延伸部131、所述下接触部132和所述下抵接部133,所述第四臂13B与所述下接触部132相切,且所述下抵接部133和所述第四臂13B之间的距离沿其延伸方向逐渐增大。
当所述芯片模块2下压所述第一臂12A时,使得所述第一臂12A抵接所述第三臂13A从而形成一第一抵接位置P1,所述第二臂12B抵接所述第四臂13B从而形成一第二抵接位置P2,且所述第一臂12A与所述第三臂13A的抵接方式和所述第二臂12B与所述第四臂13B的抵接方式不同。
在本实施例中,所述第二臂12B和所述第四臂13B设有所述斜面S(在其它实施例中,也可以是所述第一臂12A和所述第三臂13A设有所述斜面S)。
当所述芯片模块2下压所述第一臂12A时,使得所述上抵接部123的前表面抵接所述下抵接部133的后表面从而形成所述第一抵接位置P1,所述第二臂12B和所述第四臂13B通过两所述斜面S相互抵接从而形成所述第二抵接位置P2,从而在芯片模块2与电路板3之间形成依次经由芯片模块2、上接触部122、上延伸部121、连接部11、下延伸部131、下接触部132、电路板3;以及依次经由芯片模块2、上接触部122、上抵接部123、第一抵接位置P1、下抵接部133、下接触部132、电路板3;以及依次芯片模块2、上接触部122、第二臂12B、第二抵接位置P2、第四臂13B、下接触部132、电路板3的三条相互并联的导电路径,可进一步减小了所述芯片模块2与电路板3间电讯传输时的电阻抗。
所述第一抵接位置P1与所述第二抵接位置P2沿前后方向间隔排列,所述第一抵接位置P1和所述第二抵接位置P2沿前后方向位于所述上接触部122和下接触部132的相对两侧,所述第二抵接位置P2相对于所述第一抵接位置P1更靠近所述连接部11。
综上所述,本发明端子有下列有益效果:
(1)所述上弹性臂12和下弹性臂13末端的板缘分别具有一斜面S,当所述芯片模块2下压所述上弹性臂12时,两所述斜面S相互抵接,从而在芯片模块2与电路板3之间形成依次经由芯片模块2、上弹性臂12、连接部11、下弹性臂13、电路板3;以及依次经由芯片模块2、上弹性臂12、两斜面S、下弹性臂13、电路板3的两条相互并联的导电路径,减小了所述芯片模块2与电路板3间电讯传输时的电阻抗;并且通过两所述斜面S的导向作用,不仅有利于所述芯片模块2下压所述端子1,而且可以刮擦去除形成在两所述斜面S上的氧化层,增强了所述上弹性臂12和下弹性臂13之间的抵接效果,保证了所述上弹性臂12与下弹性臂13之间的稳定抵接。
(2)所述上弹性臂12具有相对的一左板缘1231和一右板缘1232,所述斜面S自所述左板缘1231延伸至所述右板缘1232,可增加所述斜面S的长度,从而保证了所述端子1具有足够的空间供所述芯片模块2下压。
(3)所述第二臂12B自所述第一臂12A中部撕裂形成,所述第四臂13B自所述第三臂13A中部撕裂形成,可以在不改变原先所述端子1整体体积的前提下,增加了所述第二臂12B和所述第四臂13B,节省了所述端子1的材料,当所述芯片模块2下压所述第一臂12A时,所述第一臂12A抵接所述第三臂13A,所述第二臂12B和第四臂13B通过两所述斜面S相互抵接,从而增加了依次经由芯片模块2、上接触部122、第二臂12B、两斜面S、第四臂13B、下接触部132、电路板3的第三条导电路径,可进一步减小了所述芯片模块2与电路板3间电讯传输时的电阻抗。
(4)所述第一抵接位置P1与第二抵接位置P2沿前后方向间隔排列,不仅减小了所述端子1的体积,而且可有效降低所述第一抵接位置P1和第二抵接位置P2之间的信号干扰,增强所述端子1的信号传输品质,使得所述端子1能够适应更高速率信号的传输。
(5)所述第一抵接位置P1和所述第二抵接位置P2沿上下方向间隔排列,可进一步降低所述第一抵接位置P1和第二抵接位置P2之间的信号干扰。
(6)所述第一抵接位置P1和所述第二抵接位置P2沿前后方向位于所述上接触部122的相对两侧,可以均分所述芯片模块2下压所述端子1的压力,避免了由于所述端子1受力不均而不能与所述芯片模块2之间形成稳定的抵接。
以上详细说明仅为本发明之较佳实施例的说明,非因此局限本发明之专利范围,所以,凡运用本创作说明书及图示内容所为之等效技术变化,均包含于本创作之专利范围内。
Claims (10)
1.一种端子,用以电性连接一芯片模块至一电路板,其特征在于,包括:
一连接部;
一上弹性臂自所述连接部一端向前延伸形成,用于向上抵接所述芯片模块;
一下弹性臂自所述连接部相对另一端向前延伸形成,用于向下导接所述电路板;
所述上弹性臂和下弹性臂末端的板缘分别设有一斜面,且每一所述斜面的相对两端上下间隔排列,当所述芯片模块下压所述上弹性臂时,两所述斜面相互抵接。
2.如权利要求1所述的端子,其特征在于:所述斜面的一端沿前后方向相对于两所述斜面的抵接位置更靠近所述连接部。
3.如权利要求1所述的端子,其特征在于:所述上弹性臂具有相对的一左板缘和一右板缘,所述斜面自所述左板缘延伸至所述右板缘。
4.如权利要求3所述的端子,其特征在于:所述斜面的左右两端上下间隔排列。
5.如权利要求1所述的端子,其特征在于:两所述斜面的相对两端分别沿上下方向相互平齐。
6.如权利要求1所述的端子,其特征在于:所述上弹性臂包括一第一臂,及自第一臂朝所述下弹性臂撕裂形成的一第二臂,所述下弹性臂包括一第三臂,及自第三臂朝所述上弹性臂撕裂形成的一第四臂,所述第二臂和第四臂设有所述斜面,当所述芯片模块下压所述第一臂时,所述第一臂抵接所述第三臂,所述第二臂和第四臂通过两所述斜面相互抵接。
7.如权利要求6所述的端子,其特征在于:所述第一臂与所述第三臂的抵接方式和所述第二臂与所述第四臂的抵接方式不同。
8.如权利要求6所述的端子,其特征在于:所述第一臂具有呈弧形的一上接触部用于向上抵接所述芯片模块,所述第二臂与所述上接触部相切。
9.如权利要求6所述的端子,其特征在于:所述第一臂抵接所述第三臂从而形成一第一抵接位置,所述第二臂抵接所述第四臂从而形成一第二抵接位置,所述第一抵接位置与所述第二抵接位置沿前后方向间隔排列。
10.如权利要求9所述的端子,其特征在于:所述第一臂具有一上接触部用于向上抵接所述芯片模块,所述第一抵接位置和所述第二抵接位置沿前后方向位于所述上接触部的相对两侧。
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CN107565236A (zh) | 2018-01-09 |
CN108092023A (zh) | 2018-05-29 |
CN107968272A (zh) | 2018-04-27 |
US20180198223A1 (en) | 2018-07-12 |
CN107799934A (zh) | 2018-03-13 |
CN108092023B (zh) | 2020-08-28 |
US20180198226A1 (en) | 2018-07-12 |
CN107565236B (zh) | 2019-10-01 |
US10199756B2 (en) | 2019-02-05 |
CN107968272B (zh) | 2019-08-30 |
CN108110455B (zh) | 2020-08-28 |
CN108110455A (zh) | 2018-06-01 |
CN107492728A (zh) | 2017-12-19 |
CN107611645A (zh) | 2018-01-19 |
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