TS5A23166 0.9-ΩDual-SPST Analog Switch

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TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
TS5A23166 0.9-Ω Dual-SPST Analog Switch

5-V and 3.3-V 2-Channel Analog Switch
1 Features 3 Description
•
1 Isolation in Powered-Down Mode, V+ = 0 The TS5A23166 device is a dual single-pole single-
throw (SPST) analog switch that is designed to
• Low ON-state resistance (0.9 Ω) operate from 1.65 V to 5.5 V. The TS5A23166 device
• Control inputs are 5.5-V Tolerant offers a low ON-state resistance and an excellent
• Low charge injection channel-to-channel ON-state resistance matching.
• Excellent ON-state resistance matching The TS5A23166 device has excellent total harmonic
distortion (THD) performance and consumes very low
• Low total harmonic distortion (THD) power. These features make this device suitable for
• 1.65-V to 5.5-V Single-supply operation portable audio applications.
• Latch-up performance exceeds 100 mA
per JESD 78, class II Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
• ESD Performance tested per JESD 22
VSSOP (8) 2.30 mm × 2.00 mm
– 2000-V Human-body model TS5A23166
DSBGA (8) 1.91 mm × 0.91 mm
(A114-B, Class II)
(1) For all available packages, see the orderable addendum at
– 1000-V Charged-device model (C101) the end of the data sheet.
2 Applications
• Cell phones
• Portable instrumentation
• Audio and video signal routing
• Low-voltage data-acquisition systems
• Communication circuits
• Modems
• Hard Drives
• Computer Peripherals
• Wireless Terminals and Peripherals
Simplified Schematic
IN1
IN2
NO1 COM1
NO2 COM2
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019 www.ti.com
Table of Contents
1 Features .................................................................. 1 8 Detailed Description ............................................ 18
2 Applications ........................................................... 1 8.1 Overview ................................................................. 18
3 Description ............................................................. 1 8.2 Functional Block Diagram ....................................... 18
4 Revision History..................................................... 2 8.3 Feature Description................................................. 18
8.4 Device Functional Modes........................................ 18
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 3 9 Application and Implementation ........................ 19
9.1 Application Information............................................ 19
6.1 Absolute Maximum Ratings ...................................... 3
9.2 Typical Application ................................................. 19
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4 10 Power Supply Recommendations ..................... 20
6.4 Thermal Information .................................................. 4 11 Layout................................................................... 20
6.5 Electrical Characteristics: 5-V Supply ....................... 4 11.1 Layout Guidelines ................................................. 20
6.6 Electrical Characteristics: 3.3-V Supply .................... 6 11.2 Layout Example .................................................... 20
6.7 Electrical Characteristics: 2.5-V Supply ................... 7 12 Device and Documentation Support ................. 21
6.8 Electrical Characteristics: 1.8-V Supply .................... 9 12.1 Device Support...................................................... 21
6.9 Switching Characteristics: 5-V Supply .................... 10 12.2 Receiving Notification of Documentation Updates 22
6.10 Switching Characteristics: 3.3-V Supply ............... 10 12.3 Community Resources.......................................... 22
6.11 Switching Characteristics: 2.5-V Supply ............... 10 12.4 Trademarks ........................................................... 22
6.12 Switching Characteristics: 1.8-V Supply ............... 11 12.5 Electrostatic Discharge Caution ............................ 22
6.13 Typical Characteristics .......................................... 12 12.6 Glossary ................................................................ 22
7 Parameter Measurement Information ................ 14 13 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (March 2018) to Revision J Page
• Changed the Thermal Information table ................................................................................................................................. 4
Changes from Revision H (May 2015) to Revision I Page
• Added Note: "Not tested in production" to leakage current at 25°C in the Electrical Characteristics tables.......................... 4
Changes from Revision G (February 2013) to Revision H Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• Updated document to new TI data sheet format - no specification changes. ........................................................................ 1
• Removed Ordering Information table. .................................................................................................................................... 1
Changes from Revision F (September 2012) to Revision G Page
• Changed pin numbers for YZT or YZP package pinout. ........................................................................................................ 3
2 Submit Documentation Feedback Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166

TS5A23166
www.ti.com SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
5 Pin Configuration and Functions
DCU Package
8-Pin VSSOP YZT or YZP Package
Top View 8-Pin DSBGA
Bottom View
NO1 1 8 V+ GND D1 D2 NO2

COM1 2 7 IN1 IN2 C1 C2 COM2
IN2 3 6 COM2 COM1 B1 B2 IN1
GND 4 5 NO2 NO1 A1 A2 V+
Pin Functions
PIN
TYPE DESCRIPTION
NAME TSSOP NO. DSBGA NO.
COM1 2 B1 I/O Common port for switch 1
COM2 6 C2 I/O Common port for switch 2
GND 4 D1 GND Ground
IN1 7 B2 I Active-high control pin connecting NO1 to COM1.
IN2 3 C1 I Active-high control pin connecting NO2 to COM2.
NO1 1 A1 I/O Normally open switch path 1
NO2 5 D2 I/O Normally open switch path 2
V+ 8 A2 PWR Power supply pin
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
V+ Supply voltage (3) –0.5 6.5 V
VNO
Analog voltage (3) (4) (5) –0.5 V+ + 0.5 V
VCOM
IK Analog port diode current VNO, VCOM < 0 –50 mA
INO ON-state switch current VNO, VCOM = 0 to V+ –200 200 mA
ICOM ON-state peak switch current (6)
VNO, VCOM = 0 to V+ –400 400 mA
VI Digital input voltage (3) (4) –0.5 6.5 V
IIK Digital input clamp current VI < 0 –50 mA
I+ Continuous current through V+ 100 mA
IGND Continuous current through GND –100 100 mA
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) Pulse at 1-ms duration < 10% duty cycle.
Copyright © 2005–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

TS5A23166
6.2 ESD Ratings

VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) +2000
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22- +1000 V
C101 (2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VI/O Input/output voltage 0 V+ V
V+ Supply voltage 1.65 5.5 V
VI Control Input Voltage 0 5.5 V
TA Operating free-air temperature –40 85 °C
6.4 Thermal Information

TS5A23166
THERMAL METRIC (1) DCU (VSSOP) YZP (DSBGA) YZT (DSBGA) UNIT
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 212.2 99.9 99.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 77.6 1.0 1.4 °C/W
RθJB Junction-to-board thermal resistance 91.7 27.8 27.8 °C/W
φJT Junction-to-top characterization parameter 7.1 0.4 0.5 °C/W
φ JB Junction-to-board characterization parameter 91.1 27.8 27.7 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.
6.5 Electrical Characteristics: 5-V Supply

V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch
VCOM,
Analog signal 0 V+ V
VNO
0 ≤ VNO ≤ V+, Switch ON, 25°C 0.9 1.1

rpeak Peak ON resistance 4.5 V Ω
ICOM = –100 mA, see Figure 11 Full 1.2
VNO = 2.5 V, Switch ON, 25°C 0.75 0.9

ron ON-state resistance 4.5 V Ω
ICOM = –100 mA, see Figure 11 Full 1
ON-state resistance 25°C 0.04 0.1
VNO = 2.5 V, Switch ON,
Δron match between 4.5 V Ω
channels
0 ≤ VNO ≤ V+, Switch ON,
25°C 0.2
ICOM = –100 mA, see Figure 11
ON-state resistance
ron(flat) 4.5 V Ω
flatness VNO = 1 V, 1.5 V, 2.5 V, Switch ON, 25°C 0.15 0.25
VNO = 1 V, 25°C 0V 4 20 (2)
VCOM = 4.5 V,
Switch OFF,
INO(OFF) or 5.5 V nA
see Figure 12 Full –150 150
NO VNO = 4.5 V,
OFF leakage current VCOM = 1 V,
VNO = 0 to 5.5 V, Switch OFF, 25°C –10 0.2 10 (2)

INO(PWROFF) 0V μA
VCOM = 5.5 V to 0, see Figure 12 Full –50 50
(2) Not tested in production.

TS5A23166
Electrical Characteristics: 5-V Supply (continued)

V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
VCOM = 1 V, 25°C 0V 4 20 (2)
VNO = 4.5 V,
Switch OFF,
ICOM(OFF) or 5.5 V nA
COM VCOM = 4.5 V,
OFF leakage current VNO = 1 V,
VCOM = 0 to 5.5 V, Switch OFF, 25°C –10 0.2 10 (2)

ICOM(PWROFF) 0V μA
VNO = 5.5 V to 0, see Figure 12 Full –50 50
VNO = 1 V, 25°C –5 0.4 5 (2)
VCOM = Open,
NO Switch ON,
INO(ON) or 5.5 V nA
ON leakage current see Figure 13 Full –50 50
VNO = 4.5 V,
VCOM = Open,
VCOM = 1 V, 25°C –5 0.4 5 (2)
VNO = Open,
COM Switch ON,
ICOM(ON) or 5.5 V nA
VCOM = 4.5 V,
VNO = Open,
Digital Control Inputs (IN1, IN2) (3)
VIH Input logic high Full 2.4 5.5 V
VIL Input logic low Full 0 0.8 V
25°C –2 0.3 2
IIH, IIL Input leakage current VI = 5.5 V or 0 5.5 V nA
Full –20 20
Dynamic
VGEN = 0, CL = 1 nF,
QC Charge injection 25°C 5V 6 pC
RGEN = 0, see Figure 19
NO VNO = V+ or GND,
CNO(OFF) See Figure 14 25°C 5V 19 pF
OFF capacitance Switch OFF,
COM VCOM = V+ or GND,
CCOM(OFF) See Figure 14 25°C 5V 18 pF
NO VNO = V+ or GND,
CNO(ON) See Figure 14 25°C 5V 35.5 pF
ON capacitance Switch ON,
CCOM(ON) See Figure 14 25°C 5V 35.5 pF
Digital input
CI VI = V+ or GND, See Figure 14 25°C 5V 2 pF
capacitance
RL = 50 Ω,
BW Bandwidth See Figure 16 25°C 5V 150 MHz
Switch ON,
RL = 50 Ω, Switch OFF,
OISO OFF isolation 25°C 5V –62 dB
f = 1 MHz, see Figure 17
RL = 50 Ω, Switch ON,
XTALK Crosstalk 25°C 5V –85 dB
f = 20 Hz to 20
Total harmonic RL = 600 Ω,
THD kHz, 25°C 5V 0.005%
distortion CL = 50 pF,
see Figure 20
Supply
Positive supply Switch ON or 25°C 5.5 V 0.01 0.1

I+ VI = V+ or GND, μA
current OFF Full 1
(3) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

TS5A23166
6.6 Electrical Characteristics: 3.3-V Supply

V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted) (1)
Analog Switch
VCOM,
Analog signal range 0 V+ V
VNO
0 ≤ VNO ≤ V+, Switch ON, 25°C 1.3 1.6

rpeak Peak ON resistance 3V Ω
VNO = 2 V, Switch ON, 25°C 1.1 1.5

ron ON-state resistance 3V Ω
ON-state resistance 25°C 0.04 0.1
VNO = 2 V, 0.8 V, Switch ON,
Δron match between 3V Ω
channels
25°C 0.3
ICOM = –100 mA see Figure 11
ON-state resistance
ron(flat) 3V Ω
flatness VNO = 2 V, 0.8 V, Switch ON, 25°C 0.15 0.25
VNO = 1 V, VCOM = 3 V, 25°C –5 0.5 5 (2)
Switch OFF,
NO VNO = 3 V, VCOM = 1 V,
OFF leakage current
INO(PWROFF) 0V μA
VCOM = 1 V, VNO = 3 V, 25°C –5 0.5 5 (2)
Switch OFF,
COM VCOM = 3 V, VNO = 1 V,
OFF leakage current
ICOM(PWROFF) 0V μA
VNO = 1 V, 25°C –2 0.3 2 (2)
VCOM = Open,
NO Switch ON,
INO(ON) or 3.6 V nA
VNO = 3 V,
VCOM = Open,
VCOM = 1 V, 25°C –2 0.3 2 (2)
VNO = Open,
COM Switch ON,
ICOM(ON) or 3.6 V nA
VCOM = 3 V,
VNO = Open,
Digital Control Inputs (IN1, IN2) (3)
VIH Input logic high Full 2 5.5 V
25°C –2 0.3 2
IIH, IIL Input leakage current VI = 5.5 V or 0 3.6 V nA
Full –20 20
(3) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

TS5A23166
Electrical Characteristics: 3.3-V Supply (continued)

V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
Dynamic
VGEN = 0, CL = 1 nF,
QC Charge injection 25°C 5V 6 pC
RGEN = 0, see Figure 19
NO VNO = V+ or GND,
CNO(OFF) See Figure 14 25°C 3.3 V 19.5 pF
CCOM(OFF) See Figure 14 25°C 3.3 V 18.5 pF
NO VNO = V+ or GND,
CNO(ON) See Figure 14 25°C 3.3 V 36 pF
CCOM(ON) See Figure 14 25°C 3.3 V 36 pF
Digital input
CI VI = V+ or GND, See Figure 14 25°C 3.3 V 2 pF
capacitance
RL = 50 Ω,
BW Bandwidth See Figure 16 25°C 3.3 V 150 MHz
Switch ON,
RL = 50 Ω, Switch OFF,
OISO OFF isolation 25°C 3.3 V –62 dB
RL = 50 Ω, Switch ON,
XTALK Crosstalk 25°C 3.3 V –85 dB
Total harmonic RL = 600 Ω, f = 20 Hz to 20 kHz,
THD 25°C 3.3 V 0.01%
distortion CL = 50 pF, see Figure 20
Supply
Positive supply 25°C 0.001 0.05

I+ VI = V+ or GND, Switch ON or OFF 3.6 V μA
current Full 0.3

Analog Switch
Analog signal
VCOM, VNO 0 V+ V
range
Peak ON 0 ≤ VNO ≤ V+, Switch ON, 25°C 1.8 2.4

rpeak ICOM = –8 mA, 2.3 V Ω
resistance see Figure 11 Full 2.6
ON-state VNO = 1.8 V, Switch ON, 25°C 1.2 2.1

ron ICOM = –8 mA, 2.3 V Ω
resistance see Figure 11 Full 2.4
ON-state 25°C 0.04 0.15
resistance
VNO = 1.8 V, 0.8 V, Switch ON,
Δron match 2.3 V Ω
between
channels
25°C 0.7
ON-state ICOM = –8 mA, see Figure 11
ron(flat) resistance 2.3 V Ω
VNO = 1.8 V, 0.8 V, Switch ON, 25°C 0.4 0.6
flatness
VNO = 0.5 V, 25°C –5 0.3 5 (2)
VCOM = 2.3 V,
Switch OFF,
NO see Figure 12 Full –50 50
VNO = 2.3 V,
OFF leakage
VCOM = 0.5 V,
current
INO(PWROFF) 0V μA
(1) The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
TS5A23166

VNO = 2.3 V, 25°C –5 0.3 5 (2)
VCOM = 0.5 V,
Switch OFF,
COM see Figure 12 Full –50 50
VNO = 0.5 V,
OFF leakage
VCOM = 2.3 V,
current
ICOM(PWROFF) 0V μA
VNO = 0.5 V, 25°C –2 0.3 2 (2)
NO VCOM = Open,
Switch ON,
INO(ON) ON leakage or 2.7 V nA
current VNO = 2.3 V,
VCOM = Open,
VCOM = 0.5 V, 25°C –2 0.3 2 (2)
COM VNO = Open,
Switch ON,
ICOM(ON) ON leakage or 2.7 V nA
current VCOM = 2.3 V,
VNO = Open,
Digital Control Inputs (IN1, IN2)
Input leakage 25°C –2 0.3 2

IIH, IIL VI = 5.5 V or 0 2.7 V nA
current Full –20 20
Dynamic
Charge VGEN = 0, CL = 1 nF,
QC 25°C 2.5 V 4 pC
injection RGEN = 0, see Figure 19
NO
VNO = V+ or GND,
CNO(OFF) OFF See Figure 14 25°C 2.5 V 19.5 pF
Switch OFF,
capacitance
COM
VCOM = V+ or GND,
CCOM(OFF) OFF See Figure 14 25°C 2.5 V 18.5 pF
Switch OFF,
capacitance
NO
VNO = V+ or GND,
CNO(ON) ON See Figure 14 25°C 2.5 V 36.5 pF
Switch ON,
capacitance
COM
VCOM = V+ or GND,
CCOM(ON) ON See Figure 14 25°C 2.5 V 36.5 pF
Switch ON,
capacitance
Digital input
capacitance
RL = 50 Ω,
Switch ON,
RL = 50 Ω, Switch OFF,
RL = 50 Ω, Switch ON,
XTALK Crosstalk 25°C 2.5 V –85 dB
Total
RL = 600 Ω, f = 20 Hz to 20 kHz,
THD harmonic 25°C 2.5 V 0.02%
CL = 50 pF, see Figure 20
distortion
Supply

current Full 0.25

TS5A23166

Analog Switch
Analog signal
VCOM, VNO 0 V+ V
range
Peak ON 0 ≤ VNO ≤ V+, Switch ON, 25°C 4.2 25

rpeak ICOM = –2 mA, 1.65 V Ω
resistance see Figure 11 Full 30
ON-state VNO = 0.6 V, 1.5 V, Switch ON, 25°C 1.6 3.9

ron 1.65 V Ω
resistance ICOM = –2 mA, see Figure 11 Full 4
ON-state 25°C 0.04 0.2
resistance
VNO = 1.5 V, Switch ON,
Δron match 1.65 V Ω
between
channels
25°C 2.8
ON-state ICOM = –2 mA, see Figure 11 1.65 V
ron(flat) resistance Ω
VNO = 0.6 V, 1.5 V, Switch ON, 25°C 4.1 22
flatness
ICOM = –2 mA, see Figure 11 Full 27
VNO = 0.3 V, 25°C –5 0.3 5 (2)
VCOM = 1.65 V,
Switch OFF,
NO see Figure 12 Full –50 50
VNO = 1.65 V,
OFF leakage
VCOM = 0.3 V,
current
INO(PWROFF) 0V μA
VNO = 1.65 V, 25°C –5 0.3 5 (2)
VCOM = 0.3 V,
Switch OFF,
COM see Figure 12 Full –50 50
VNO = 0.3 V,
OFF leakage
VCOM = 1.65 V,
current
(2)
VCOM = 0 to 1.95 V, Switch OFF, 25°C –2 0.05 2
ICOM(PWROFF) 0V μA
VNO = 0.3 V, 25°C –2 0.3 2 (2)
NO VCOM = Open,
Switch ON,
INO(ON) ON leakage or 1.95 V nA
current VNO = 1.65 V,
VCOM = Open,
VNO = Open, 25°C –2 0.3 2
COM VCOM = 0.3 V,
Switch ON,
ICOM(ON) ON leakage or 1.95 V nA
current VNO = Open,
VCOM = 1.65 V,
Digital Control Inputs (IN1, IN2)
Input leakage 25°C –2 0.3 2

IIH, IIL VI = 5.5 V or 0 1.95 V μA
current Full –20 20
Dynamic
Charge VGEN = 0, CL = 1 nF,
QC 25°C 1.8 V 2 pC
injection RGEN = 0, see Figure 19
NO
VNO = V+ or GND,
CNO(OFF) OFF See Figure 14 25°C 1.8 V 19.5 pF
Switch OFF,
capacitance
COM
VCOM = V+ or GND,
CCOM(OFF) OFF See Figure 14 25°C 1.8 V 18.5 pF
Switch OFF,
capacitance
NO
VNO = V+ or GND,
CNO(ON) ON See Figure 14 25°C 1.8 V 36.5 pF
Switch ON,
capacitance
TS5A23166

COM
VCOM = V+ or GND,
CCOM(ON) ON See Figure 14 25°C 1.8 V 36.5 pF
Switch ON,
capacitance
Digital input
capacitance
RL = 50 Ω,
Switch ON,
RL = 50 Ω, Switch OFF,
Total harmonic RL = 600 Ω, f = 20 Hz to 20 kHz,
THD 25°C 1.8 V 0.055%
distortion CL = 50 pF, see Figure 20
Supply

current Full 0.15
6.9 Switching Characteristics: 5-V Supply

Dynamic
VCOM = V+, CL= 35 pF, 25°C 5V 1 4.5 7.5

tON Turnon time ns
RL = 50 Ω, see Figure 15 Full 4.5 V to 5.5 V 1 9
VCOM = V+, CL = 35 pF, 25°C 5V 4.5 8 11

tOFF Turnoff time ns
RL = 50 Ω, see Figure 15 Full 4.5 V to 5.5 V 3.5 13
6.10 Switching Characteristics: 3.3-V Supply

V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted) (1)
Dynamic
25°C 3.3 V 1.5 5 9.5
VCOM = V+, CL= 35 pF,
tON Turnon time 3 V to ns
RL = 50 Ω, see Figure 15 Full 1 10
3.6 V
25°C 3.3 V 4.5 8.5 11
VCOM = V+, CL = 35 pF,
tOFF Turnoff time 3 V to ns
RL = 50 Ω, see Figure 15 Full 3 12.5
3.6 V

Dynamic
25°C 2.5 V 2 6 10
tON Turnon time 2.3 V to ns
RL = 50 Ω, see Figure 15 Full 1 12
2.7 V
25°C 2.5 V 4.5 8 12.5
tOFF Turnoff time 2.3 V to ns
2.7 V

TS5A23166

Dynamic
25°C 1.8 V 3 9 18
tON Turnon time 1.65 V to ns
1.95 V
25°C 1.8 V 5 10 15.5
tOFF Turnoff time 1.65 V to ns
RL = 50 Ω, see Figure 15 Full 4 18.5
1.95 V

TS5A23166
6.13 Typical Characteristics
3.5 1.6
3.0 1.4
TA = 25_C
1.2
2.5 V+ = 1.8 V
1.0 855C
ron (W)
2.0
255C
ron (Ω)
0.8
1.5 V+ = 2.5 V –405C
0.6
1.0 V+ = 3.3 V
0.4
0.5 V+ = 5 V 0.2
0.0 0.0
0 1 2 3 4 5 6 0 1 2 3 4
VCOM (V) VCOM (V)
Figure 1. ron vs VCOM Figure 2. ron vs VCOM (V+ = 3.3 V)

1.2 70
60 ICOM(OFF)
1.0
Leakage Current (nA)
855C 50
0.8 255C
40 INO/NC(OFF)
ron (W)
–405C
0.6
30
0.4
20 INO/NC(ON)
0.2
10 ICOM(ON)
0.0 0
0 1 2 3 4 5 6 −40° 25° 85°
VCOM (V) TA (°C)
Figure 3. ron vs VCOM (V+ = 5 V) Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
20 12
15 10 tON
V+ = 5 V
Charge Injection (pC)
10 V+ = 3 V
8 tOFF
5
tON/tOFF (ns)
6
0
4
−5
−10 2
−15 0
0 1 2 3 4 5 0 1 2 3 4 5 6
Bias Voltage (V) V+ (V)
Figure 5. Charge Injection (QC) vs VCOM Figure 6. tON and tOFF vs Supply Voltage

TS5A23166
Typical Characteristics (continued)

10 0
tOFF
9 −1
8 −2
7 −3
tON/tOFF (ns)
Gain (dB)
6
−4
5 tON
−5
4
−6
3
2 −7
1 −8
0 −9
-40 °C 25°C 85°C 0.1 1 10 100 1000
TA (°C) Frequency (MHz)
Figure 7. tON and tOFF vs Temperature (V+ = 5 V) Figure 8. Bandwidth (V+ = 5 V)

0 0.010
0.009
−20
0.008
0.007
THD + (%)
Attenuation (dB)
−40
0.006
−60 0.005
0.004
−80
0.003
−100 0.002
0.001
−120 0.000
0
0.1 1 10 100 1000 10 100 1000 10000 100000
Frequency (MHz) Frequency (Hz)
Figure 9. OFF Isolation and Crosstalk (V+ = 5 V) Figure 10. Total Harmonic Distortion vs Frequency

TS5A23166
7 Parameter Measurement Information

V+
VNO NO
COM VCOM
+
Channel ON
VCOM – VNO
r on = Ω
I COM
VI ICOM
IN
VI = VIH or VIL
+
GND
Figure 11. ON-State Resistance (ron)
V+
VNO NO
OFF-State Leakage Current
COM VCOM
+ Channel OFF
+
VI = VIH or VIL
VI IN
+
GND
Figure 12. OFF-State Leakage Current (ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWR(FF))
V+
VNO NO
COM ON-State Leakage Current
+ VCOM
Channel ON
VI = VIH or VIL
VI IN
+
GND
Figure 13. ON-State Leakage Current (ICOM(ON), INC(ON))

TS5A23166
Parameter Measurement Information (continued)

V+
VNO NO
Capacitance
Meter VBIAS = V+ or GND
VI = V+ or GND
COM COM
VBIAS Capacitance is measured at NO,
VI IN COM, and IN inputs during ON
and OFF conditions.
GND
Figure 14. Capacitance (CI, CCOM(OFF), CCOM(ON), CNC(OFF), CNC(ON))
V+
TEST RL CL VCOM
NO VNO
tON 50 Ω 35 pF V+
VCOM COM
CL(2) RL
tOFF 50 Ω 35 pF V+
VI IN
Logic V+
Input 50% 50%
Logic (VI) 0
GND
Input(1)
tON tOFF
Switch
Output 90% 90%
(VNO)
(1) All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
(2) CL includes probe and jig capacitance.
Figure 15. Turnon (tON) and Turnoff Time (tOFF)
V+
Network Analyzer
50 Ω VNO NO Channel ON: NO to COM

COM VCOM VI = VIH or VIL
Source
Signal
Network Analyzer Setup
50 Ω VI IN Source Power = 0 dBm

+ (632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 16. Bandwidth (BW)

TS5A23166

V+
Network Analyzer
Channel OFF: NO to COM

50 Ω VNO NO
VI = V+ or GND
COM VCOM
Source
50 Ω
Signal Network Analyzer Setup
VI IN Source Power = 0 dBm

50 Ω (632-mV P-P at 50- Ω load)
+ GND
DC Bias = 350 mV
Figure 17. OFF Isolation (OISO)
V+
Network Analyzer
50 Ω VNO1 NO1 Channel ON: NO to COM

COM1
Source
VNO2 NO2
Signal Network Analyzer Setup
50 Ω
COM2
Source Power = 0 dBm
50 Ω VI IN
(632-mV P-P at 50-Ω load)
+
GND DC Bias = 350 mV
Figure 18. Crosstalk (XTALK)
V+ Logic VIH
Input
OFF ON OFF V
(VI) IL
RGEN
NO
COM VCOM
+ VCOM ΔVCOM
VGEN
CL(1)
VI VGEN = 0 to V+
IN
RGEN = 0
CL = 1 nF
Logic
Input(2) GND QC = CL × ΔVCOM
VI = VIH or VIL

(2) All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
Figure 19. Charge Injection (QC)

TS5A23166
Channel ON: COM to NO VI = V+/2 or −V+/2 RL = 600 Ω

VSOURCE = V+ P-P fSOURCE = 20 Hz to 20 kHz CL = 50 pF
V+/2
Audio Analyzer
NO
Source
COM
Signal
600 Ω CL(1)
VI IN
600 Ω
−V+/2
Figure 20. Total Harmonic Distortion (THD)

TS5A23166
8 Detailed Description
8.1 Overview
The TS5A23166 is a dual single-pole single-throw (SPST) analog switch that is designed to operate from 1.65 V
to 5.5 V. The device offers a low ON-state resistance. The device has excellent total harmonic distortion (THD)
performance and consumes very low power. These features make this device suitable for portable audio
applications. Table 2 shows the descriptions of each parameter specified in the datasheet.
8.2 Functional Block Diagram
IN1
IN2
NO1 COM1
NO2 COM2
8.3 Feature Description

Tolerant control inputs allow 5-V logic levels to be present on the IN pin at any value of VCC. Low ON-resistance
allows minimal signal distortion through device.
8.4 Device Functional Modes

Table 1 shows the functional modes for TS5A23166.
Table 1. Function Table

NO TO COM,
IN
COM TO NO
L OFF
H ON

TS5A23166
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information

The TS5A23166 dual SPST analog switch is a basic component that could be used in any electrical system
design. One example application is a gain selector, which is described in the Typical Application section.
9.2 Typical Application
Figure 21. Gain-Control Circuit for OP Amplifier
9.2.1 Design Requirements

By selecting values of R1 and R2, such that Rx >> ron(x), ron of TS5A23166 can be ignored. The gain of op amp
can be calculated as follow:
Vo / VI = 1+ R|| / R3 (1)
R|| = (R1+ron(1)) || (R2+ron(2)) (2)
9.2.2 Detailed Design Procedure

Place a switch in series with the input of the op amp. Because the op amp input impedance is very large, a
switch on ron(1) is irrelevant.

TS5A23166
Typical Application (continued)

9.2.3 Application Curve
160
140
120
100
I+ (nA)
80
60
40
20
0
-40 °C 25°C 85°C
TA (°C)
Figure 22. Power-Supply Current vs Temperature (V+ = 5 V)
10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines

Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Figure 23 shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
11.2 Layout Example

WORST BETTER BEST
2W
1W min.
W
Figure 23. Trace Example

TS5A23166
12 Device and Documentation Support
12.1 Device Support

12.1.1 Device Nomenclature
Table 2. Parameter Description

SYMBOL DESCRIPTION
VCOM Voltage at COM
VNO Voltage at NO
ron Resistance between COM and NO ports when the channel is ON
rpeak Peak on-state resistance over a specified voltage range
ron(flat) Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF-state under worst-case
INO(OFF)
input and output conditions
INO(PWROFF) Leakage current measured at the NO port during the power-down condition, V+ = 0
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF-state under worst-
ICOM(OFF)
case input and output conditions
ICOM(PWROFF) Leakage current measured at the COM port during the power-down condition, V+ = 0
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON-state and the output
INO(ON)
(COM) open
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON-state and the output
ICOM(ON)
(NO) open
VIH Minimum input voltage for logic high for the control input (IN)
VIL Maximum input voltage for logic low for the control input (IN)
VI Voltage at the control input (IN)
IIH, IIL Leakage current measured at the control input (IN)
Turnon time for the switch. This parameter is measured under the specified range of conditions and by the propagation
tON
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
Turnoff time for the switch. This parameter is measured under the specified range of conditions and by the propagation
tOFF
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)
QC output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Charge injection, QC = CL × ΔVCOM, CL is the load capacitance, and ΔVCOM is the change in analog output voltage.
CNO(OFF) Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CCOM(OFF) Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
CNO(ON) Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON) Capacitance at the COM port when the corresponding channel (COM to NO) is ON
CI Capacitance of control input (IN)
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
OISO
frequency, with the corresponding channel (NO to COM) in the OFF state.
BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root
THD mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental
harmonic.
I+ Static power-supply current with the control (IN) pin at V+ or GND

TS5A23166
12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2021
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TS5A23166DCUR ACTIVE VSSOP DCU 8 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (AM, JAMQ, JAMR)
JZ
TS5A23166DCURG4 ACTIVE VSSOP DCU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 JAMR
TS5A23166YZPR ACTIVE DSBGA YZP 8 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 JMN
TS5A23166YZTR ACTIVE DSBGA YZT 8 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 JMN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2021
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Jul-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS5A23166DCUR VSSOP DCU 8 3000 180.0 9.0 2.25 3.4 1.0 4.0 8.0 Q3
TS5A23166DCUR VSSOP DCU 8 3000 178.0 9.5 2.25 3.35 1.05 4.0 8.0 Q3
TS5A23166DCURG4 VSSOP DCU 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 Q3
TS5A23166YZPR DSBGA YZP 8 3000 178.0 9.2 1.02 2.02 0.63 4.0 8.0 Q1
TS5A23166YZTR DSBGA YZT 8 3000 178.0 9.2 1.02 2.02 0.75 4.0 8.0 Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Jul-2020
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS5A23166DCUR VSSOP DCU 8 3000 182.0 182.0 20.0
TS5A23166DCUR VSSOP DCU 8 3000 202.0 201.0 28.0
TS5A23166DCURG4 VSSOP DCU 8 3000 202.0 201.0 28.0
TS5A23166YZPR DSBGA YZP 8 3000 220.0 220.0 35.0
TS5A23166YZTR DSBGA YZT 8 3000 220.0 220.0 35.0
Pack Materials-Page 2
D: Max = 1.918 mm, Min =1.858 mm
E: Max = 0.918 mm, Min =0.858 mm

PACKAGE OUTLINE
DCU0008A SCALE 6.000
VSSOP - 0.9 mm max height
SMALL OUTLINE PACKAGE
3.2
TYP C
3.0
A
0.1 C
PIN 1 INDEX AREA SEATING
6X 0.5 PLANE
8
1
2X
2.1
1.5
1.9
NOTE 3
4
5
0.25
8X
0.17
2.4
B 0.08 C A B
2.2
NOTE 3
SEE DETAIL A
0.12 0.9
GAGE PLANE 0.6
0.1
0 -6 0.35 0.0
(0.13) TYP
0.20
DETAIL A
A 30
TYPICAL
4225266/A 09/2014
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-187 variation CA.
www.ti.com
EXAMPLE BOARD LAYOUT
DCU0008A VSSOP - 0.9 mm max height
SEE SOLDER MASK

8X (0.85) SYMM DETAILS
(R0.05) TYP
8X (0.3) 1 8
SYMM
6X (0.5)
4 5
(3.1)
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 25X
SOLDER MASK METAL UNDER SOLDER MASK

METAL
OPENING SOLDER MASK OPENING
EXPOSED METAL EXPOSED METAL
0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND
NON-SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
15.000
4225266/A 09/2014
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCU0008A VSSOP - 0.9 mm max height
8X (0.85)
SYMM
(R0.05) TYP
8X (0.3) 1 8
SYMM
6X (0.5)
4 5
(3.1)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE: 25X
4225266/A 09/2014
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
YZP0008 SCALE 8.000
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
B E A
BALL A1
CORNER
C
0.5 MAX
SEATING PLANE
0.19
0.15 0.05 C
BALL TYP
0.5 TYP
C
SYMM
1.5
TYP
D: Max = 1.918 mm, Min =1.858 mm
B
E: Max = 0.918 mm, Min =0.858 mm
0.5
TYP
A
0.25
8X 1 2
0.21
0.015 C A B
SYMM
4223082/A 07/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YZP0008 DSBGA - 0.5 mm max height
(0.5) TYP
8X ( 0.23)
1 2
(0.5) TYP
B
SYMM
SYMM
LAND PATTERN EXAMPLE

SCALE:40X
SOLDER MASK 0.05 MAX 0.05 MIN ( 0.23)

OPENING SOLDER MASK
OPENING
( 0.23)
METAL METAL UNDER
SOLDER MASK
NON-SOLDER MASK SOLDER MASK
DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS

NOT TO SCALE
4223082/A 07/2016
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YZP0008 DSBGA - 0.5 mm max height
(0.5) TYP
8X ( 0.25)
(R0.05) TYP
1 2
(0.5)
TYP
B
SYMM
METAL
TYP
SYMM
SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL
SCALE:40X
4223082/A 07/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated

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Changes from Revision I (March 2018) to Revision J Page

• Changed the Thermal Information table ................................................................................................................................. 4

Changes from Revision H (May 2015) to Revision I Page

Changes from Revision G (February 2013) to Revision H Page

Changes from Revision F (September 2012) to Revision G Page

• Changed pin numbers for YZT or YZP package pinout. ........................................................................................................ 3

2 Submit Documentation Feedback Copyright © 2005–2019, Texas Instruments Incorporated

Product Folder Links: TS5A23166

5 Pin Configuration and Functions

NO1 1 8 V+ GND D1 D2 NO2

Copyright © 2005–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

6.2 ESD Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

6.5 Electrical Characteristics: 5-V Supply

0 ≤ VNO ≤ V+, Switch ON, 25°C 0.9 1.1

VNO = 2.5 V, Switch ON, 25°C 0.75 0.9

VNO = 0 to 5.5 V, Switch OFF, 25°C –10 0.2 10 (2)

Product Folder Links: TS5A23166

Electrical Characteristics: 5-V Supply (continued)

VCOM = 0 to 5.5 V, Switch OFF, 25°C –10 0.2 10 (2)

Positive supply Switch ON or 25°C 5.5 V 0.01 0.1

Copyright © 2005–2019, Texas Instruments Incorporated Submit Documentation Feedback 5

6.6 Electrical Characteristics: 3.3-V Supply

0 ≤ VNO ≤ V+, Switch ON, 25°C 1.3 1.6

VNO = 2 V, Switch ON, 25°C 1.1 1.5

6 Submit Documentation Feedback Copyright © 2005–2019, Texas Instruments Incorporated

Product Folder Links: TS5A23166

Electrical Characteristics: 3.3-V Supply (continued)

Positive supply 25°C 0.001 0.05

6.7 Electrical Characteristics: 2.5-V Supply

Peak ON 0 ≤ VNO ≤ V+, Switch ON, 25°C 1.8 2.4

ON-state VNO = 1.8 V, Switch ON, 25°C 1.2 2.1

Electrical Characteristics: 2.5-V Supply (continued)

Input leakage 25°C –2 0.3 2

Positive supply 25°C 0.001 0.02

8 Submit Documentation Feedback Copyright © 2005–2019, Texas Instruments Incorporated

Product Folder Links: TS5A23166

6.8 Electrical Characteristics: 1.8-V Supply

Peak ON 0 ≤ VNO ≤ V+, Switch ON, 25°C 4.2 25

ON-state VNO = 0.6 V, 1.5 V, Switch ON, 25°C 1.6 3.9

Input leakage 25°C –2 0.3 2

Electrical Characteristics: 1.8-V Supply (continued)

Positive supply 25°C 0.001 0.01

6.9 Switching Characteristics: 5-V Supply

VCOM = V+, CL= 35 pF, 25°C 5V 1 4.5 7.5

VCOM = V+, CL = 35 pF, 25°C 5V 4.5 8 11

6.10 Switching Characteristics: 3.3-V Supply

6.11 Switching Characteristics: 2.5-V Supply

10 Submit Documentation Feedback Copyright © 2005–2019, Texas Instruments Incorporated

Product Folder Links: TS5A23166

6.12 Switching Characteristics: 1.8-V Supply

Copyright © 2005–2019, Texas Instruments Incorporated Submit Documentation Feedback 11

6.13 Typical Characteristics

Figure 1. ron vs VCOM Figure 2. ron vs VCOM (V+ = 3.3 V)