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TWI531036B - 封裝結構 - Google Patents

封裝結構 Download PDF

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Publication number
TWI531036B
TWI531036B TW102125170A TW102125170A TWI531036B TW I531036 B TWI531036 B TW I531036B TW 102125170 A TW102125170 A TW 102125170A TW 102125170 A TW102125170 A TW 102125170A TW I531036 B TWI531036 B TW I531036B
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TW
Taiwan
Prior art keywords
package
metal pad
substrate
copper
surface area
Prior art date
Application number
TW102125170A
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English (en)
Other versions
TW201405742A (zh
Inventor
莊曜群
莊其達
郭正錚
陳承先
Original Assignee
台灣積體電路製造股份有限公司
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Application filed by 台灣積體電路製造股份有限公司 filed Critical 台灣積體電路製造股份有限公司
Publication of TW201405742A publication Critical patent/TW201405742A/zh
Application granted granted Critical
Publication of TWI531036B publication Critical patent/TWI531036B/zh

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Description

封裝結構
本發明係有關於一種半導體結構，且特別是有關於一種封裝結構。
半導體裝置已用於各種電子產品中，如個人電腦、手機、數位相機、及其他電子器材。半導體裝置通常以依序沈積絕緣或介電層、導電層及半導體層材料到半導體基板上的方式製作，並以微影製程圖案化各材料層以在其上形成電路元件及零件。
半導體產業藉由持續縮減最小特徵尺寸以改良各種電子元件的積集度(例如電晶體、二極體、電阻器、電容器等等)，以允許更多元件可集成至一給定的區域中。在某些應用上，這些較小的電子元件亦需更小的封裝體，即佔用較少空間或高度的封裝體。
因此，新的封裝科技已開始發展。這些相對較新的半導體封裝科技面臨製程上的挑戰。
本發明提供一種封裝結構，包括：一晶粒封裝體，具有一包括一銅柱之連接結構，其中前述銅柱包括一第一表面區域；一基板，具有一焊料層填入一金屬墊之上的開口之，其中前述焊料層直接接觸於前述金屬墊，其中前述開口具有一第 二表面區域，其中前述金屬墊具有一第三表面區域，其中前述第一、前述第二、前述第三表面區域至少其一具有一拉長的形狀，其中前述第三表面區域寬於前述第二表面區域；以及其中前述焊料層與前述晶粒封裝體上之前述連接結構形成一接合結構。
本發明亦提供一種封裝結構，包括一封裝體，藉由一第一接合結構接合至一基板；其中前述第一接合結構包括：一銅柱，接合至前述封裝體中之一金屬墊；其中前述封裝體包括至少一半導體晶粒，一填入焊料之開口，形成於一介電材料中，其中前述填入焊料之開口形成於一第二金屬墊之上；其中在前述填入焊料之開口中之一焊料層直接接觸前述第二金屬墊；其中前述銅柱、前述第一金屬墊、前述填入焊料之開口以及前述第二金屬墊之複數個投影之軸線實質上重疊，以及前述銅柱、前述第一金屬墊以及前述填入焊料之開口至少其一之投影之軸線係經拉長的並指向前述封裝體之中心。
100‧‧‧封裝體結構
110、110’‧‧‧封裝體
115、125‧‧‧連接器
102、120、120’、130、130’‧‧‧基板
104‧‧‧互連結構
105‧‧‧金屬墊
106‧‧‧導孔
107、207‧‧‧鈍化層
108‧‧‧金屬間介電材料
123‧‧‧平面
111、111’‧‧‧凸塊下金屬層
112、112’、1121-6、610、610’‧‧‧銅柱
350‧‧‧線
117、117’、1171-6‧‧‧阻焊開口
150‧‧‧基底基板
210、210’、2101-6‧‧‧金屬墊
215‧‧‧金屬線
113、220、220’‧‧‧焊料層
300、300＊、400、500‧‧‧表面區域
D‧‧‧直徑
P‧‧‧節距
W‧‧‧寬度
S、S’‧‧‧間距
C、C1-6、C8‧‧‧中心
第1A圖為根據一些實施例中的封裝結構透視圖；第1B圖所示為在兩者接合前的封裝體之一部分以及基板之一部分截面圖實施例；第1C圖所示為基板之一部分的截面圖實施例；第2A圖所示為具有內連線金屬線之金屬墊俯視圖實施例；第2B圖所示為具有內連線金屬線之金屬墊俯視圖實施例；第3A圖所示為一封裝體及一基板在接合前之截面圖實施 例；第3B圖所示為第3A圖中之一銅柱與一阻焊開口(solder resist)之俯視圖實施例；第3C圖所示為一封裝體及一基板在接合後之截面圖實施例；第3D圖所示為第3C圖中之一銅柱與一阻焊開口(solder resist)之俯視圖實施例；第4A圖為一封裝體及一基板在接合後之截面圖實施例；第4B圖為第4A圖中之一銅柱與一阻焊開口(solder resist)之俯視圖實施例；第5A圖為一封裝體及一基板在接合後之截面圖實施例；第5B圖為第5A圖中之一銅柱與一阻焊開口(solder resist)之俯視圖實施例；第6圖為一在封裝體上之拉長銅柱之實施例；第7A-7F圖所示為封裝體的銅柱、阻焊開口、基板的金屬墊在接合前之多種配置之實施例；以及第8圖所示為一銅柱以及一封裝體的金屬墊之俯視圖實施例。
以下說明本發明實施例之製作與使用。然而，可輕易了解本發明實施例提供許多合適的發明概念而可實施於廣泛的各種特定背景。所揭示的特定實施例僅僅用於說明以特定方法製作及使用本發明，並非用以侷限本發明的範圍。
第1A圖為包括一接合至基板120(或稱接合基板)的 封裝結構100的透視圖，在一些實施例中，封裝結構100更進一步接合至另一基板130。封裝體110包括至少一半導體晶粒(未繪出)。半導體晶粒包括一半導體基板，以用於半導體積體電路製程中，積體電路可形成於其中及/或其上。半導體基板包括任何含矽的材料，包括但不限於，矽塊材(bulk silicon)、半導體晶圓、絕緣體上矽基板、或SiGe基板。亦可使用其他半導體材料包括第三到第五族元素。半導體基板可進一步包括多個隔離特徵(未繪出)，如淺溝槽隔離特徵(shallow trench isolation)，或者局部矽氧化特徵(LOCOS)。隔離特徵可定義並隔離各種微電子元件。可形成於半導體基板中之微電子元件實施例包括電晶體(例如金氧半場效電晶體，MOSFET)、互補式金氧半電晶體(CMOS)、雙極性接面電晶體(bipolar junction transistor)、高電壓電晶體、高頻率電晶體、p型通道及/或n型通道場效電晶體(PFET或NFET等等)、電阻器、二極體、電容器、電感器、熔斷器及其他合適之元件。可利用多種製程以形成多種元件，包括沈積、蝕刻、植入、光微影製程、退火及或其他合適製程。各微電子元件間可內連線以形成積體電路裝置如邏輯裝置、儲存裝置(例如SRAM)、射頻裝置、輸出/輸入裝置、單晶片系統裝置(system-on-chip device，SoC)、前述之組合或其他合適的裝置。
在一些實施例中，基板120包括一部分的半導體晶圓。基板120可包括Si、GaAs、絕緣體上矽、或其他合適材料。在一些實施例中，基板120亦包括被動裝置，如電阻器、電容器、電感器等等，或主動裝置，如電晶體。在一些實施例中， 基板120包括額外的積體電路。基板120可進一步包括基板穿孔(through substrate via)並可為一中介板。在一些實施例中，基板120可包括封裝晶粒。在一些實施例中，基板130可包括雙馬來酰亞胺三嗪樹脂(BT)、FR-4(由織造的玻璃纖維布與阻燃環氧樹脂粘合劑組成的的複合材料)、陶瓷、玻璃、塑膠、帶、膜，或其他的支持材料，可承載接受導電端子所需的導電墊或導電盤(lands)。
基板130可使用製作基板120的相同材料。在一些實施例中，基板130為一多層電路板。封裝體110藉由連接器115接合至基板120，而基板120係藉由連接器125接合至基板130。
第1B圖所示為接合前，封裝體110之一部分截面圖以及第1C圖所示為接合前，靠近接合結構的基板120之部分截面圖。第1B圖所示為包括具有內連線形成於其中的裝置(未繪出)之基板102。如前所述，基板102可包括一半導體基板，如矽基板，然其可包括其他半導體材料。互連結構104形成於基板102之上，其包括金屬線及導孔106形成於其中並接合至半導體裝置。金屬線及導孔106可以銅或銅合金形成，並可藉由雙鑲嵌製程形成。互連結構104可包括一習知的層間介電材料(未繪出)以及金屬間介電材料108。金屬間介電材料108可包括低介電常數材料，並具有約小於3的介電常數。低介電常數材料亦可為介電常數約小於2.5的超低介電常數材料。
封裝體110可包括凸塊下金屬層111(under bump metallurgy)以及銅柱112。在說明書中，銅柱112亦可視為一含銅凸塊或金屬凸塊。雖然此處以銅柱112作為範例，其他種金 屬凸塊，如焊接凸塊，亦可取代銅柱112作使用。在一些實施例中，一焊料層113形成在銅柱112之上。在一些實施例中，焊料層113未形成於銅柱112之上。在一些實施例中，一金屬阻障層(未繪出)形成於銅柱112與焊料層113之間以防止因銅及焊料混合而造成金屬間化合物(intermetallic compound)之形成。在一些實施例中，金屬阻障層係由鈦所形成。凸塊下金屬層111設置於金屬墊105之上，其連接至封裝體中之互連結構。在互連結構104與凸塊下金屬層111之間但未接觸金屬墊105處有一鈍化層107。在一些實施例中，鈍化層107係由聚亞醯胺所形成。在一些實施例中，鈍化層107包括一層以上的次層。金屬墊105可藉由金屬線連接至輸出/輸入結構或其他位於同水平的導電結構。在一些實施例中金屬墊105包括銅，並可為純銅或銅合金。在一些其他實施例中，亦可以其他導電材料取代銅。例如金屬墊105可包括鋁、鋁合金、金、或金合金等等。
在一些實施例中，凸塊下金屬層包括一擴散阻障層以及一晶種層。擴散阻障層可由TaN形成，但也可以是其他材料，如TiN、Ta、Ti等等。晶種層可為一銅晶種層形成於擴散阻障層上。銅晶種層可包括銅或銅與下列其一之合金，如Ag、Cr、Ni、Sn、Au、及前述之組合。在一些實施例中，凸塊下金屬層111包括一由鈦形成之擴散阻障層以及一由銅形成之晶種層。
第1C圖所示為根據一些實施例中包括基底基板150(base substrate)的基板120。基板120包括金屬線及導孔(未繪出)連接基板120相反兩側之金屬特徵。基板120的導孔包括 電鍍通孔(plating through holes，PTH)，其係填入有一或多種導電金屬。基板120以包括一金屬墊210，其部分受到鈍化層207的覆蓋。在一些實施例中，鈍化層207為一阻焊，其不須額外光阻層即可利用微影製程形成圖案。金屬墊210可藉由金屬線及導孔(未繪出)電性連接至一基板120底部的球狀陣列(ball grid array，BGA)。金屬線與導孔形成於多層介電層中，其可形成於一半導體層之上。
金屬墊210形成在上介電層之上。金屬墊210可以實質上之純Cu、AlCu、或其他金屬材料如W、Ni、Pa、Au、或前述之合金。金屬墊210部分受鈍化層207覆蓋。一焊料層220形成於金屬墊210之上以填入鈍化層中形成之開口，以利後續接合至封裝體110之焊料層113或銅柱112(如無焊料層113)。在一些實施例中，形成於鈍化層207中的開口可稱為阻焊開口117(solder resist opening，SRO)。金屬墊210可藉由金屬線接合至輸出/輸入結構或其他位於同水平的導電結構。在一些實施例中金屬墊210包括銅，並可為純銅或銅合金。在一些其他實施例中，亦可以其他導電材料取代銅。例如金屬墊210可包括鋁、鋁合金、金、或金合金等等。形成基板120的相關機制係如在2011年2月18日提出申請台灣專利申請號100105363之”封裝裝置及其製造方法”，併入作為參考。
如上所述，金屬墊105及210可藉由金屬線接合至輸出/輸入結構或其他位於同水平的導電結構。第2A圖所示為根據一些實施例中之具有內連線金屬線215之金屬墊210俯視圖。在第2A圖中之金屬墊210為圓形並在金屬墊間具有一節距P 及間距S(space)。金屬墊210的直徑為D。第2A圖更顯示出三條金屬線215無法置入於金屬墊210間的間距S而不造成短路。第2B圖所示為根據一些實施例中之具有同樣內連線金屬線215之金屬墊210’俯視圖。第2B圖中之每一金屬墊210’皆與第2A圖中之金屬墊210具有相同的表面區域。金屬墊210’亦具有一節距P。金屬墊210’係經拉長並具有一跑道的形狀。金屬墊210’之寬度為W，其亦為金屬墊210’圓形部分之直徑。由於金屬墊210’係受到拉長，金屬墊210’之W小於金屬墊210之D。三條金屬線215可置入各金屬墊210’間之間距S’中而不造成金屬墊210’之短路。拉長的金屬墊210’提供路由金屬線(routing metal lines)額外的空間以佈線。在一些實施例中，節距P係約介於30-200μm間。在一些實施例中金屬墊210之直徑D係約介於20-150μm間。在一些實施例中金屬墊210'之寬度W係約介於10-100μm間。
除可提供路由金屬線額外的佈線空間外，拉長的金屬墊具有其他優點。第3A圖所示為封裝體110之銅柱112直接覆於基板120的焊料層220在接合回焊前的截面圖。銅柱112與焊料層220係對準於其兩者之中心形成一實質上垂直於基板120平面的線。第3B圖所示為銅柱112及焊料層220之阻焊開口117之俯視圖。如第3A及3B圖所示之實施例，銅柱112及阻焊開口117皆為圓形並具有大致相同的直徑。銅柱112的俯視形狀同於在凸塊下金屬層111下方之銅柱112。銅柱112的俯視形狀亦同於在焊料層113下方之銅柱112。在一些實施例中焊料層113未形成於銅柱112之上。此處封裝體110以及基板120之相對 位置係為在連接焊料層220到銅柱112之前的情況。第3B圖所示為銅柱112完全重疊於阻焊開口117，其重疊區域為銅柱112或阻焊開口的表面區域300。在接合步驟前，銅柱112係對準於焊料層220，而銅柱112及焊料層220之中心實質上形成一垂直於基板120之平面123之線350。
由於封裝體110與基板120中所使用之不同材料具有不同熱膨脹係數的關係，其相對位置可能會在熱處理後位移，如回焊(reflow)。例如，包括一矽基板之封裝體110，其整體熱膨脹係數為2-3ppm/℃，其低於約為17ppm/℃之基板120整體熱膨脹係數。在熱處理後，基板120會較封裝體水平以及垂直膨脹地多，因而造成其相對位置改變。封裝體110以及基板120在中心的相對位置改變，相較於邊緣更為顯著。
第3C圖所示為接合後之第3A圖中的封裝體110以及基板120結構截面圖實施例。第3C圖顯示出基板120由於其較高的熱膨脹係數而較封裝體110更往邊緣偏移。第3D圖為第3C圖之連接後結構中的銅柱112及阻焊電阻117的俯視圖實施例。在第3D圖中，銅柱112及阻焊開口117的重疊表面區域300＊小於第3B圖中之重疊表面區域300(回焊前)。
第4A圖所示為接合回焊後在基板120之焊料層上的封裝體之銅柱112’截面圖實施例。銅柱受到拉長並具有一跑道形狀的截面圖。在接合製程前，銅柱112'係與焊料層220對準，並在銅柱112'與焊料層220的中心形成一實質上垂直於基板120平面的線。第4A圖顯示出基板120在中心的相對位置改變，相較於邊緣更為顯著。
第4B圖所示為銅柱112’以及焊料層220之阻焊開口117的俯視圖。銅柱112’以及阻焊開口117之重疊表面區域為400。表面區域400小於第3B圖中之表面區域300。然而，表面區域400大於第3D圖中之表面區域300＊。銅柱112’以及阻焊開口117之重疊表面區域越大使接合結構越強，其減少接合結構的應力以及界面脫層(interfacial delamination)以及虛焊(cold joint)。
第5A圖所示為接合回焊後在基板120之焊料層上的封裝體之銅柱112’截面圖實施例。銅柱112'以及焊料層220’皆具有拉長如跑道形狀的截面圖。在回焊(或接合)製程前，銅柱112'係與焊料層220’對準，並在銅柱112'與焊料層220’的中心形成一實質上垂直於基板120平面的線。第5B圖所示為銅柱112’以及焊料層220’之阻焊開口117’之俯視圖。銅柱112’以及阻焊開口117’之重疊表面區域為500。表面區域500小於第3B圖中之表面區域300，然其大於第3D圖中之表面區域300＊。銅柱112’以及阻焊開口117之重疊表面區域越大使接合結構越強，其減少接合結構的應力以及界面脫層(interfacial delamination)以及虛焊(cold joint)。
為了減少封裝體上接合結構的應力，拉長的接合結構係以其軸線大致指向基板之封裝體中心的方式排列。第6圖所示為兩個實施例，其為在封裝體角落的拉長銅柱610以及靠近封裝體邊緣中心的銅柱610’。第6圖所示為將拉長銅柱610以及610’配置成將兩者之軸線大致指向封裝結構110之中心C。同樣地，若金屬墊(以及金屬墊上的焊料層)亦皆拉長其形 狀，其應遵照與銅柱610以及610’的相似方向以最大化連接區域。如此拉長銅柱610以及610’拉長方向的安排以及所得的接合結構減少含有銅柱之接合結構上的應力。如前所述，由於封裝體110與其所連接之基板120間的熱膨脹係數差異，封裝體110與基板120在熱循環時膨脹與收縮的程度不同。藉由對準封裝體110上之銅柱之軸線，使之朝向封裝體110之中心，則銅柱在膨脹時(即加熱)與收縮時(即冷卻)可按照其下方封裝體110之基板的膨脹或收縮方向。
第3A-6圖已描述各種銅柱與焊料層的形狀與方向的各種實施例，其具有與阻焊開口相似之輪廓。焊料層220下方的金屬墊210之形狀以及方向亦影響接合結構的強度與界面脫層的可能性。第7A-7F圖所示為銅柱112、阻焊開口117以及阻焊開口117下方之金屬墊210在封裝體接合至基板120前之各種配置實施例的俯視圖。此些配置僅作為範例說明之用。亦有其他配置及型態的可能。
第7A圖所示為銅柱1121、阻焊開口1171以及阻焊開口1171下方之金屬墊2101之形狀與對準方式之俯視圖實施例。如前所述，焊料層220與阻焊開口117的形狀相當接近。此外，可具有一焊料層113在銅柱112之上。然而焊料層113所受保護的輪廓依循銅柱112的輪廓。如第7A圖所示，金屬墊2101之直徑大於阻焊開口1171的直徑，阻焊開口1171位於金屬墊2101表面之內。如前述，在第7A圖所示之實施例中，銅柱1121與阻焊開口1171的表面在接合後可能重疊較少區域。銅柱1121、阻焊開口1171以及阻焊開口1171下方之金屬墊2101的垂直投影為同 心的。此外此三種結構的中心C1實質上為上下交疊。
第7B圖所示為銅柱1122、阻焊開口1172以及阻焊開口1172下方之金屬墊2102之形狀與對準方式之俯視圖實施例。銅柱1122受到拉長且其投影呈現如跑道般的形狀。而阻焊開口1172以及阻焊開口1172下方之金屬墊2102則具有圓形表面區域。銅柱1122、阻焊開口1172以及阻焊開口1172下方之金屬墊2102之中心與軸線皆對準成大致相同或平行以使封裝體110以及基板120間之接合結構強健且平衡。如前述，在第7B圖所示之實施例中，銅柱1122與阻焊開口1172的表面在接合後可能重疊較多區域。銅柱1122、阻焊開口1172以及阻焊開口1172下方之金屬墊2102的垂直投影為同心的。此外此三種結構的中心C2實質上為上下交疊。在一些實施例中，如此之配置可使封裝體110以及基板120間之接合結構之整體壓力少於第7A圖中之配置方式，尤其是靠近接合後封裝體邊緣區域的接合結構。
第7C圖所示為銅柱1123、阻焊開口1173以及阻焊開口1173下方之金屬墊2103之形狀與對準方式之俯視圖實施例。銅柱1123、阻焊開口1173以及阻焊開口1173下方之金屬墊2103受到拉長且其投影呈現如跑道般的形狀。銅柱1123、阻焊開口1173以及阻焊開口1173下方之金屬墊2103之中心與軸線皆對準並朝向同一方向。此外此三種結構的中心C3實質上為上下交疊。在一些實施例中，如此之配置可使封裝體110以及基板120間之接合結構之整體壓力少於第7A圖中之配置方式，尤其是靠近接合後封裝體邊緣區域的接合結構。
第7D圖所示為銅柱1124、阻焊開口1174以及阻焊開 口1174下方之金屬墊2104之形狀與對準方式之俯視圖實施例。第7D圖所示，阻焊開口1174以及金屬墊2104之投影呈現如跑道般的形狀。阻焊開口1174以及金屬墊2104之軸線係對準以平均分散接合結構間的壓力。銅柱1124之投影則為圓形。此外此三種結構的中心C4實質上為上下交疊。在一些實施例中，如此之配置可使封裝體110以及基板120間之接合結構之整體壓力少於第7A圖中之配置方式，尤其是靠近接合後封裝體邊緣區域的接合結構。
第7E圖所示為銅柱1125、阻焊開口1175以及阻焊開口1175下方之金屬墊2105之形狀與對準方式之俯視圖實施例。第7E圖所示，銅柱1125以及金屬墊2105之投影呈現如跑道般的形狀。銅柱1125以及金屬墊2105之軸線係對準以平均分散接合結構間的壓力。阻焊開口1175之投影則為圓形。此外此三種結構的中心C5實質上為上下交疊。在一些實施例中，如此之配置可使封裝體110以及基板120間之接合結構之整體壓力少於第7A圖中之配置方式，尤其是靠近接合後封裝體邊緣區域的接合結構。
第7F圖所示為銅柱1126、阻焊開口1176以及阻焊開口1176下方之金屬墊2106之形狀與對準方式之俯視圖實施例。第7F圖所示，銅柱1126以及阻焊開口1176之投影為圓形，而金屬墊2106之投影呈現如跑道般的形狀。為了減少因熱循環而造成的壓力，金屬墊2106之軸線應實質上指向接合後封裝體的中心。此外此三種結構的中心C6實質上為上下交疊。
於第7A-7F圖中所述之實施例顯示出銅柱112較阻 焊開口117具有較大的表面區域。然此並非一限制條件。更不是必要之特徵。銅柱112之表面區域可等同或小於阻焊開口117的表面區域。而在第4A-5B圖中關於拉長銅柱112及/或阻焊開口117具有較低壓力的好處仍然適用。當銅柱112及/或阻焊開口117拉長時，兩者間交疊區域增加，例如35%，其使得接合完整性更佳。而金屬墊105與銅柱112間之形狀、配置以及關係亦近似於銅柱112與阻焊開口117。金屬墊105的表面區域同於或大於銅柱112的表面區域(投影)。第8圖所示為銅柱112與金屬墊105之俯視圖(投影圖)實施例。銅柱112與金屬墊105之中心C8實質上重疊。此外，銅柱112與金屬墊105之軸線亦實質上重疊。銅柱112與金屬墊105之其他配置及型態亦具有可行性。
上述實施例中提供在封裝體與接合基板間之各接合結構之較大的重疊表面區域。藉由應用拉長接合結構於封裝體及/或接合基板上並藉由定向前述接合結構，接合結構可設計成能夠承受因熱循環造成之壓力以減少虛焊。
在一些實施例中提供一種封裝結構。此封裝結構包括：一晶粒封裝體，具有一包括一銅柱之連接結構，其中前述銅柱包括一第一表面區域；一基板，具有一焊料層填入一金屬墊之上的開口之，其中前述焊料層直接接觸於前述金屬墊，其中前述開口具有一第二表面區域，其中前述金屬墊具有一第三表面區域，其中前述第一、前述第二、前述第三表面區域至少其一具有一拉長的形狀，其中前述第三表面區域寬於前述第二表面區域；以及其中前述焊料層與前述晶粒封裝體上之前述連接結構形成一接合結構。
在一些實施例中提供一種封裝結構。此封裝結構包括：一封裝體，藉由一第一接合結構接合至一基板；其中前述第一接合結構包括：一銅柱，接合至前述封裝體中之一金屬墊；其中前述封裝體包括至少一半導體晶粒，一填入焊料之開口，形成於一介電材料中，其中前述填入焊料之開口形成於一第二金屬墊之上；其中在前述填入焊料之開口中之一焊料層直接接觸前述第二金屬墊；其中前述銅柱、前述第一金屬墊、前述填入焊料之開口以及前述第二金屬墊之複數個投影之軸線實質上重疊，以及前述銅柱、前述第一金屬墊以及前述填入焊料之開口至少其一之投影之軸線係經拉長的並指向前述封裝體之中心。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作更動、替代與潤飾。舉例來說，任何所屬技術領域中具有通常知識者可輕易理解此處所述的許多特徵、功能、製程及材料可在本發明的範圍內作更動。再者，本發明之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟，任何所屬技術領域中具有通常知識者可從本發明揭示內容中理解現行或未來所發展出的製程、機器、製造、物質組成、裝置、方法及步驟，只要可以在此處所述實施例中實施大體相同功能或獲得大體相同結果皆可使用於本發明中。因此，本發明之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外，每一申請專利範圍構成個別的實施例，且本 發明之保護範圍也包括各個申請專利範圍及實施例的組合。
1122‧‧‧銅柱
1172‧‧‧阻焊開口
2102‧‧‧金屬墊
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Claims (10)

  1. 一種封裝結構，包括：一晶粒封裝體，具有一包括一銅柱之連接結構，其中該銅柱包括一第一表面區域；一基板，具有一焊料層填入一金屬墊之上的開口，其中該焊料層直接接觸於該金屬墊，其中該開口具有一第二表面區域，其中該金屬墊具有一第三表面區域，其中該第一、該第二、該第三表面區域至少其一具有一拉長的形狀，其中該第三表面區域寬於該第二表面區域，其中該第一及該第二表面區域之複數個軸線實質上重疊並指向該晶粒封裝體之一中心；以及其中該焊料層與該晶粒封裝體上之該連接結構形成一接合結構。
  2. 如申請專利範圍第1項所述之封裝結構，其中該開口受一圖案化之阻焊層圍繞。
  3. 如申請專利範圍第1項所述之封裝結構，其中該拉長形狀之一軸指向該晶粒封裝體之一中心。
  4. 如申請專利範圍第1項所述之封裝結構，其中該第一及該第二表面區域具有拉長的形狀。
  5. 如申請專利範圍第1項所述之封裝結構，其中該拉長形狀為一跑道形狀。
  6. 如申請專利範圍第4項所述之封裝結構，其中該第三表面區域亦受到拉長；其中該第三表面區域之一軸線實質上重疊於該第一及該第二表面區域之該複數個軸線。
  7. 如申請專利範圍第1項所述之封裝結構，更包括另一接合結 構；其中此兩個接合結構之節距介於30-200μm間。
  8. 如申請專利範圍第1項所述之封裝結構，其中該拉長形狀之一寬度介於10-100μm間。
  9. 如申請專利範圍第1項所述之封裝結構，其中該基板較該晶粒封裝體具有一較高的熱傳導係數。
  10. 如申請專利範圍第1項所述之封裝結構，其中具有一金屬墊電性連接至該晶粒封裝體中之該銅柱；以及其中具有在該金屬墊與該鄰近金屬墊間之該至少一路由金屬線；其中該至少一路由金屬線具有一平行於該拉長形狀之軸線。
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