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TWI421991B - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
TWI421991B
TWI421991B TW096143736A TW96143736A TWI421991B TW I421991 B TWI421991 B TW I421991B TW 096143736 A TW096143736 A TW 096143736A TW 96143736 A TW96143736 A TW 96143736A TW I421991 B TWI421991 B TW I421991B
Authority
TW
Taiwan
Prior art keywords
wiring
semiconductor wafer
connection region
wiring layer
via connection
Prior art date
Application number
TW096143736A
Other languages
English (en)
Other versions
TW200839991A (en
Inventor
Kazuyuki Nakagawa
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW200839991A publication Critical patent/TW200839991A/zh
Application granted granted Critical
Publication of TWI421991B publication Critical patent/TWI421991B/zh

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Description

半導體裝置及其製造方法
本發明係關於將半導體晶片倒裝晶片連接於布線基板上之半導體裝置及其製造方法。
本發明提案一種半導體裝置，其係將半導體晶片倒裝晶片連接於布線基板上(例如，參照專利文獻1)。本發明提案一種技術，其在該倒裝晶片連接時，藉由於半導體晶片施以擦洗(scrubbing)，以無焊劑地倒裝晶片接合(例如，參照專利文獻2)。
此外，在布線基板上形成布線，並以阻焊劑覆蓋布線上(例如，參照專利文獻3)。但是，半導體晶片與布線基板有線膨脹係數差，故有以下問題：因內部應力而產生布線基板上的布線斷線。為解決此，提案各種方法(例如，參照專利文獻4~6)。
圖23係表示以往之半導體裝置的平面圖。將半導體晶片12倒裝晶片連接於布線基板11上。在布線基板11與半導體晶片12之間隙間填充填充材(underfill)樹脂13。在布線基板11上，於半導體晶片12外周，與半導體晶片12分開而設置補強環14。在該半導體晶片12及補強環14上黏接散熱片(未圖示)，其用以將半導體晶片12所產生的熱散出於外部。
圖24係圖23之虛線所包圍部分D的放大平面圖。在布線基板11上設置布線31與布線層通孔連接區(via land)32。布 線31係連接布線層通孔連接區32與半導體晶片12。布線層通孔連接區32在半導體晶片12與補強環14間，設於從半導體晶片12對角線的延長線至1mm以內的區域。
圖25係表示以往之布線層通孔連接區及布線的剖面圖。在布線基板11上設置電源圖案33及布線層下表面通孔連接區34。兩者係利用間隙區域35而相互分開。此外，電源圖案33及布線層下表面通孔連接區34係由絕緣膜36所覆蓋。布線層通孔連接區32係設於絕緣膜36上。布線層下表面通孔連接區34與布線層通孔連接區32係由用以穿通絕緣膜36之通孔37所連接。從布線層通孔連接區32拉出之布線31係通過間隙區域35上方。此外，以往之半導體裝置中，布線31係從布線層通孔連接區32朝與半導體晶片12對角線的延長線方向大致相同的方向拉出。
再者，圖26係表示利用以往之方法將半導體晶片倒裝晶片連接於布線基板之狀態的剖面圖。在布線基板11上形成布線31，以阻焊劑41覆蓋布線基板11上，並在阻焊劑41形成開口42，以露出布線31。布線基板11的布線31與半導體晶片12的電極43係由焊錫凸塊24所連接。
【專利文獻1】日本特開2006-128712號公報
【專利文獻2】日本特開2000-349123號公報
【專利文獻3】日本特開平7-307363號公報
【專利文獻4】日本特開平11-163201號公報
【專利文獻5】日本特開2000-183469號公報
【專利文獻6】日本特開2001-60600號公報
以往之半導體裝置中，有以下問題：從布線層通孔連接區32拉出之布線31在間隙區域35上方斷線。作為該問題之要因，考慮以下者。1.半導體晶片12與布線基板11之線膨脹係數差等所造成的內部應力集中於距半導體晶片12對角線的延長線1mm以內的區域。2.半導體晶片12與補強環14間，因布線基板11上沒有補強材，故該內部應力造成布線基板11變形變大。3.該內部應力在半導體晶片12對角線的延長線方向最強。4.在布線31與布線層通孔連接區32之邊界附近，布線粗細急速變化，導致該內部應力集中。5.該內部應力集中於分開電源圖案33與布線層下表面通孔連接區34之間隙區域35上方。
此外，如圖26右側所示，利用以往之方法進行倒裝晶片連接之半導體裝置中，有產生焊錫凸塊24斷開不良之問題。此被認為是因為表面張力而欲形成球狀之焊錫凸塊24從阻焊劑41的開口42角承受應力所致。尤其，在倒裝晶片連接之步驟，於半導體晶片施以擦洗時，容易產生焊錫凸塊之斷開不良。
本發明係為解決如上述之課題所完成者，本發明之第一目的可得到一種半導體裝置，其可防止從布線層通孔連接區拉出之布線斷線。
本發明之第二目的可得到一種半導體裝置之製造方法，其可防止焊錫凸塊之斷開不良。
本發明一實施例之半導體裝置係包含：布線基板；半導體晶片；填充材樹脂；補強環；散熱片；設於布線基板上，且利用間隙區域而相互分開之電源圖案與布線層下表面通孔連接區；絕緣膜；布線層通孔連接區；通孔；及設於絕緣膜上，且通過間隙區域上方，並連接布線層通孔連接區與半導體晶片之布線。布線層通孔連接區係在半導體晶片與補強環之間，且設於距半導體晶片對角線的延長線1mm以內的區域。從布線層通孔連接區拉出布線的方向與半導體晶片對角線的延長線之角度係20度以上。
根據本實施例，可防止從布線層通孔連接區拉出之布線斷線。
 實施形態1.
圖1係表示本發明實施形態1之半導體裝置的部分缺口立體圖。半導體晶片12係倒裝晶片連接於布線基板11上。在布線基板11與半導體晶片12之間隙間填充填充材樹脂13。在布線基板11上，於半導體晶片12外周，與半導體晶片12分開而設置補強環14。該補強環14係在板狀構件中央設有開口部者。開口部形狀係取決於半導體晶片12的形狀。
在半導體晶片12及補強環14上係黏接散熱片15。散熱片15的形狀係與布線基板11外形大致相同大小的薄板狀。利 用該散熱片15，將半導體晶片12所產生的熱散出於外部。
此外，在布線基板11背面係設置焊錫球16。利用該焊錫球16，接合布線基板11背面側的外部電極與安裝基板(未圖示)。黏接，經由布線基板11及焊錫球16，可在半導體晶片12與安裝基板之間進行電源的輸入或信號輸出入。
圖2係圖1中A－A線剖面的剖面構造說明圖。布線基板11係重疊有複數絕緣層21之多層構造。在各絕緣層21係設置複數布線23及通孔22。不同絕緣層21的布線23係經由通孔22而相互連接，故可實現半導體裝置小型化。尤其，本實施形態中，在構成布線基板11基材之厚的芯絕緣層兩面，係具有各積層三層薄的增層絕緣層之構造。芯絕緣層係使用預備含浸，其係將環氧系樹脂含浸於玻璃斜紋，增層絕緣層係使用在環氧系樹脂混合有二氧化矽填充劑之物。增層絕緣層可使用具玻璃斜紋之物。在各絕緣層21係形成通孔22，其用以電性連接上下布線23。本實施形態中，在厚的芯絕緣層形成直徑大的通孔，在薄的增層絕緣層形成直徑小的通孔。
半導體晶片12的複數電極(未圖示)係經由焊錫凸塊24而分別電性連接布線基板11的特定布線。此外，用以黏接半導體晶片12與散熱片15之黏接材25係緩和對半導體晶片12壓力之楊氏係數(E)小的矽系黏接材。另一方面，用以黏接布線基板11與補強環14、及散熱片15與補強環14之黏接材26係耐熱性佳，成本具優勢之環氧系黏接材。
另外，布線基板11的材料係使用環氧系樹脂及(或)四氟 乙烯系樹脂。在此，環氧系樹脂係指將玻璃纖維或丙烯酸樹脂等混入環氧系樹脂者。四氟乙烯系樹脂係指將丙烯酸樹脂等混入四氟乙烯樹脂者。
說明本發明實施形態1之半導體裝置的製法。首先，如圖3所示，在半導體晶片12的電極上設置晶片側焊錫凸塊24a，並在布線基板11的布線上設置基板側焊錫凸塊24b。
其次，如圖4所示，在布線基板11上載置半導體晶片12，並在晶片側焊錫凸塊24a與基板側焊錫凸塊24b於相接觸的狀態下邊施以擦洗邊加熱。其結果，融化晶片側焊錫凸塊24a與基板側焊錫凸塊24b，兩者形成焊錫凸塊24而構成一體。利用焊錫凸塊24，將半導體晶片12所含之電極與布線基板11的複數布線電性連接。焊錫凸塊24的材料，例如可使用Pb含有量0.1wt%以下，極少的Pb無鉛焊錫；本實施形態中，可使用Sn-1wt% Ag-0.5wt% Cu組成的焊錫。但是，焊錫凸塊24的組成不限於前述之物。尤其，Pb無鉛焊錫中，因焊錫彈性率有變高傾向，故布線基板所產生的內部應力有變大的傾向。因此，後述之布線基板的斷線對策很重要。
其次，如圖5所示，在布線基板11與半導體晶片12之間隙間填充填充材樹脂13而凝固，並在半導體晶片12密著於布線基板11之狀態下固定。黏接，如圖6所示，利用黏接材26，將補強環14黏接於布線基板11。
其次，如圖7所示，在半導體晶片12上塗布黏接材25。黏接，如圖8所示，將膠狀黏接材26黏貼在補強環14上， 使散熱片15黏接半導體晶片12及補強環14上。針對補強環14，也可事先將兩面黏貼有黏接材26之物搭載於布線基板11上。
最後，如圖9所示，在形成於布線基板11背面之外部電極上設置焊錫球16。利用以上步驟，可製造圖1、2所示之半導體裝置。焊錫球16的組成雖無限制，但由Pb無鉛焊錫所構成。本實施形態中，該組成係構成Sn－3 wt% Ag－0.5 wt% Cu。
此外，如圖10所示，補強環14與散熱片15也可不經由黏接材26而使用由金屬板一體成型者。如圖11所示，也可為不使用補強環14、及黏接材26之構成。具補強環14之構成中，在補強環14與半導體晶片12間的區域，施加至布線基板11的內部應力有變大的傾向。亦即，與布線基板11相比，熱膨脹係數小的半導體晶片12以填充材樹脂13固定於布線基板11上，且在半導體晶片12周圍，補強環14固定於布線基板11上，且在該半導體晶片12與補強環14之間產生對布線基板11表面固定變弱之區域時，應力有集中於該部分之傾向。再者，該應力在半導體晶片12對角線的延長線與其附近的區域有變大的傾向。在該種情況，該區域之布線的斷線對策尤其重要。
圖12係表示本發明實施形態1之半導體裝置的平面圖。圖13係圖12之虛線所包圍部分B的放大平面圖。在布線基板11上設置布線31與布線層通孔連接區32。布線31係連接布線層通孔連接區32與半導體晶片12。布線層通孔連接區 32在半導體晶片12與補強環14間，有設於從半導體晶片12對角線的延長線至1mm以內的區域者。
圖14係表示從本發明實施形態1之布線層通孔連接區拉出之布線的放大平面圖。圖15係圖14之C-C'剖面圖。在布線基板11上設置電源圖案33及布線層下表面通孔連接區34。兩者係利用間隙區域35而相互分開。此外，電源圖案33及布線層下表面通孔連接區34係由絕緣膜36所覆蓋。布線層通孔連接區32係設於絕緣膜36上。布線層下表面通孔連接區34與布線層通孔連接區32係由用以穿通絕緣膜36之通孔37所連接。從布線層通孔連接區32拉出之布線31係通過間隙區域35上方。
在此，半導體晶片12與布線基板11之線膨脹係數差等所造成之內部應力在半導體晶片12對角線的延長線方向最強。因此，本實施形態1中，從布線層通孔連接區32拉出布線31之方向與半導體晶片12對角線的延長線之角度θ係20度以上，以30度以上最佳。藉此，布線層通孔連接區32附近，尤其在間隙區域35上方可緩和施加至布線31之內部應力，故可防止從布線層通孔連接區32拉出之布線31斷線。
實施形態2.
圖16係表示本發明實施形態2之布線層通孔連接區及布線一例的放大平面圖。圖17係表示其他例的放大平面圖。如圖所示，布線31係從與布線層通孔連接區32之邊界0.2mm以下處彎折。其他構成係與實施形態1相同。
藉此，布線層通孔連接區32附近，尤其在間隙區域35上方可緩和施加至布線31之內部應力，故可防止從布線層通孔連接區32拉出之布線31斷線。
實施形態3.
圖18係表示本發明實施形態3之布線層通孔連接區及布線一例的放大平面圖。如圖所示，間隙區域35上方之布線31的寬度b係比布線31最細部分的寬度a大。其他構成係與實施形態1相同。
藉此，內部應力最大之間隙區域35上方，因可提高布線31的強度，故可防止從布線層通孔連接區32拉出之布線31斷線。
實施形態4.
實施形態4之半導體裝置的製造方法，在將半導體晶片倒裝晶片連接於布線基板之步驟具特徵，其他步驟係與實施形態1相同。以下，說明實施形態4之倒裝晶片連接。
首先，如圖19所示，在布線基板11上形成布線31，以阻焊劑41覆蓋布線基板11上，並在阻焊劑41形成開口42，以露出布線31。在此，阻焊劑41的厚度係26 μm，開口的寬度係100 μm。在布線基板11的布線31上設置基板側焊錫凸塊24b，在半導體晶片12的電極43設置晶片側焊錫凸塊24a。在載置台44上載置布線基板11，並利用焊接頭45真空吸著半導體晶片12。此時，將載置台44及焊接頭45加熱至比焊錫融點低的特定預熱溫度(150℃左右)。
其次，如圖20所示，朝水平方向移動焊接頭45，再使半 導體晶片12位於布線基板11上方。黏接，下降焊接頭45，使基板側焊錫凸塊24b與晶片側焊錫凸塊24a相接觸。再者，在基板側焊錫凸塊24b與晶片側焊錫凸塊24a相接觸之狀態下，將半導體晶片12加熱至焊錫融點以上(260℃左右)，邊週期性朝水平方向或鉛直方向等擦洗，邊壓接於布線基板11。藉此，可使用無焊劑將半導體晶片12與布線基板11倒裝晶片接合。如圖21所示，該結果將基板側焊錫凸塊24b與晶片側焊錫凸塊24a相接合而形成焊錫凸塊24。之後，解除焊接頭45對半導體晶片12的吸著，並上升焊接頭45，結束焊接。
本實施形態4中，因阻焊劑41的厚度在26μm以下，故焊錫凸塊24的焊錫量比如圖22所示的阻焊劑41的開口42角與內接電極43之球的體積小。藉此，利用表面張力可使欲形成球狀之焊錫凸塊從阻焊劑的開口角承受之應力減少。因此，可防止焊錫凸塊之斷開不良。尤其，在倒裝晶片連接之步驟，於半導體晶片施以擦洗時，容易產生焊錫凸塊之斷開不良，故本發明有效。
11‧‧‧布線基板
12‧‧‧半導體晶片
13‧‧‧填充材樹脂
14‧‧‧補強環
15‧‧‧散熱片
24‧‧‧焊錫凸塊
31‧‧‧布線
32‧‧‧布線層通孔連接區
33‧‧‧電源圖案
34‧‧‧布線層下表面通孔連接區
35‧‧‧間隙區域
36‧‧‧絕緣膜
37‧‧‧通孔
41‧‧‧阻焊劑
42‧‧‧開口
43‧‧‧電極
圖1係表示本發明實施形態1之半導體裝置的部分缺口立體圖。
圖2係圖1中A-A線剖面的剖面構造說明圖。
圖3係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖4係用以說明本發明實施形態1之半導體裝置製造方法 的剖面圖。
圖5係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖6係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖7係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖8係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖9係用以說明本發明實施形態1之半導體裝置製造方法的剖面圖。
圖10係表示本發明實施形態1之半導體裝置其他例的剖面圖。
圖11係表示本發明實施形態1之半導體裝置另一其他例的剖面圖。
圖12係表示本發明實施形態1之半導體裝置的平面圖。
圖13係圖12之虛線所包圍部分B的放大平面圖。
圖14係表示從本發明實施形態1之布線層通孔連接區拉出之布線的放大平面圖。
圖15係圖14之C－C'剖面圖。
圖16係表示本發明實施形態2之布線層通孔連接區及布線一例的放大平面圖。
圖17係表示本發明實施形態2之布線層通孔連接區及布線其他例的放大平面圖。
圖18係表示本發明實施形態3之布線層通孔連接區及布線一例的放大平面圖。
圖19係用以說明本發明實施形態4之半導體裝置製造方法的剖面圖。
圖20係用以說明本發明實施形態4之半導體裝置製造方法的剖面圖。
圖21係用以說明本發明實施形態4之半導體裝置製造方法的剖面圖。
圖22係用以說明本發明實施形態4之半導體裝置製造方法的剖面圖。
圖23係表示以往之半導體裝置的平面圖。
圖24係圖23之虛線所包圍部分D的放大平面圖。
圖25係表示以往之布線層通孔連接區及布線的剖面圖。
圖26係表示利用以往之方法將半導體晶片倒裝晶片連接於布線基板之狀態的剖面圖。
12‧‧‧半導體晶片
13‧‧‧填充材樹脂
31‧‧‧布線
32‧‧‧布線層通孔連接區

Claims (8)

  1. 一種半導體裝置，其特徵在於包含：布線基板；半導體晶片，其係倒裝晶片連接於前述布線基板上；填充材(underfill)樹脂，其係填充於前述布線基板與前述半導體晶片之間隙；散熱片，其係黏接於前述半導體晶片上；電源圖案與布線層下表面通孔連接區(via land)，其係設於前述布線基板上，且利用間隙區域而相互分開；絕緣膜，其係覆蓋前述電源圖案與前述布線層下表面通孔連接區；布線層通孔連接區，其係設於前述絕緣膜上；通孔，其係穿通前述絕緣膜而連接前述布線層下表面通孔連接區與前述布線層通孔連接區；及布線，其係設於前述絕緣膜上，且通過前述間隙區域上方，並連接前述布線層通孔連接區與前述半導體晶片；前述布線層通孔連接區係在前述半導體晶片外側，且設於距前述半導體晶片對角線的延長線1mm以內的區域，從前述布線層通孔連接區拉出前述布線之方向與前述半導體晶片對角線的延長線之角度係20度以上。
  2. 如請求項1之半導體裝置，其中從前述布線層通孔連接區拉出前述布線之方向與前述半導體晶片對角線的延長線之角度係30度以上。
  3. 一種半導體裝置，其特徵在於包含：布線基板；半導體晶片，其係倒裝晶片連接於前述布線基板上；填充材樹脂，其係填充於前述布線基板與前述半導體晶片之間隙；散熱片，其係黏接於前述半導體 晶片上；電源圖案與布線層下表面通孔連接區，其係設於前述布線基板上，且利用間隙區域而相互分開；絕緣膜，其係覆蓋前述電源圖案與前述布線層下表面通孔連接區；布線層通孔連接區，其係設於前述絕緣膜上；通孔，其係穿通前述絕緣膜而連接前述布線層下表面通孔連接區與前述布線層通孔連接區；及布線，其係設於前述絕緣膜上，且通過前述間隙區域上方，並連接前述布線層通孔連接區與前述半導體晶片；前述布線層通孔連接區係在前述半導體晶片外側，且設於距前述半導體晶片對角線的延長線1mm以內的區域，前述布線在距與前述布線層通孔連接區之邊界0.2mm以下處彎折。
  4. 一種半導體裝置，其特徵在於包含：布線基板；半導體晶片，其係倒裝晶片連接於前述布線基板上；填充材樹脂，其係填充於前述布線基板與前述半導體晶片之間隙；散熱片，其係黏接於前述半導體晶片外側上；電源圖案與布線層下表面通孔連接區，其係設於前述布線基板上，且利用間隙區域而相互分開；絕緣膜，其係覆蓋前述電源圖案與前述布線層下表面通孔連接區；布線層通孔連接區，其係設於前述絕緣膜上；通孔，其係穿通前述絕緣膜而連接前述布線層下表面通孔連接區與前述布線層通孔連接區；及布線，其係設於前述絕緣膜上，且通過前述間隙區域上方，並連接前述布線層通孔連接區與前述半導體晶片；前述布線層通孔連接區係在前述半導體晶片外側，且設於距前述半 導體晶片對角線的延長線1mm以內的區域，前述間隙區域上方之前述布線的寬度大於前述布線最細部分的寬度。
  5. 如請求項1~4中任一項之半導體裝置，其中包含補強環，其係黏接於前述半導體晶片周圍的前述布線基板上，前述布線層通孔連接區係設於前述半導體晶片與前述補強環間的區域。
  6. 一種半導體裝置之製造方法，其特徵在於包含以下步驟：在布線基板上形成布線，並以阻焊劑覆蓋前述布線基板上，且在前述阻焊劑形成開口，以露出前述布線之步驟；及藉由經由焊錫凸塊而連接前述布線基板的布線與半導體晶片的電極，將前述半導體晶片倒裝晶片連接於前述布線基板上之步驟；使前述焊錫凸塊的焊錫量小於前述阻焊劑的開口角與內接於前述電極之球的體積。
  7. 如請求項6之半導體裝置之製造方法，其中於使前述半導體晶片倒裝晶片連接於前述布線基板上之步驟中，於前述半導體晶片施以擦洗(scrubbing)。
  8. 如請求項6或7之半導體裝置之製造方法，其中包含補強環，其係黏接於前述半導體晶片周圍的前述布線基板上，布線層通孔連接區係設於前述半導體晶片與前述補強環間的區域。
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