JPS551157A - Method of fabricating semiconductor device - Google Patents
Method of fabricating semiconductor deviceInfo
- Publication number
- JPS551157A JPS551157A JP11079078A JP11079078A JPS551157A JP S551157 A JPS551157 A JP S551157A JP 11079078 A JP11079078 A JP 11079078A JP 11079078 A JP11079078 A JP 11079078A JP S551157 A JPS551157 A JP S551157A
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- regions
- adhere
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
Abstract
PURPOSE: To provide the subject method comprising the steps of: causing a second isolating film having an etching speed different from that of a first isolating film to adhere on the whole surface of said fitst isolating film, forming in said second film a window greater than that provided in the first isolating film, and causing an Al wiring to adhere onto the second isolating film through the window of the first isolating film, thereby to prevent the breaking of the wire in the contact hole.
CONSTITUTION: P+ type buried regions 2 through 4 are diffusion-formed in a N type Si substrate, and the whole surface of the substrate 1 is covered with a siO2 film, and windows, are formed in the element forming region and wiring diffusion region. Then, a wiring layer 11 of a gate oxidized film 9 and polycrystal Si is formed on the substrate 1 exposed between the regions 2 and 3, and a polycrystal Si wiring layer 12 is formed in the film 5 remaining between the regions 2 and 4. Thereafter, by the diffusion, a source region 6 contacting the region 2, a drain region 7 contacting the region 3, and a wiring contact part 8 integrated with the region 4 are respectively provided, and a PSG film 13 is caused to adhere on the whole surface of these regions. Then, in the film 13 there is formed a window greater than that of the film 5 provided beforehand, and step-like wall surfaces are formed in said window, and an Al wiring layer 10 contacting these regions is caused to adhere thereto.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11079078A JPS551157A (en) | 1978-09-11 | 1978-09-11 | Method of fabricating semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11079078A JPS551157A (en) | 1978-09-11 | 1978-09-11 | Method of fabricating semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48113934A Division JPS5746215B2 (en) | 1973-10-12 | 1973-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS551157A true JPS551157A (en) | 1980-01-07 |
Family
ID=14544690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11079078A Pending JPS551157A (en) | 1978-09-11 | 1978-09-11 | Method of fabricating semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS551157A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5278098A (en) * | 1991-03-05 | 1994-01-11 | Sgs-Thomson Microelectronics, Inc. | Method for self-aligned polysilicon contact formation |
| JPH065792U (en) * | 1992-06-22 | 1994-01-25 | 石垣機工株式会社 | Screw press with concentrator |
-
1978
- 1978-09-11 JP JP11079078A patent/JPS551157A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5278098A (en) * | 1991-03-05 | 1994-01-11 | Sgs-Thomson Microelectronics, Inc. | Method for self-aligned polysilicon contact formation |
| JPH065792U (en) * | 1992-06-22 | 1994-01-25 | 石垣機工株式会社 | Screw press with concentrator |
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