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JPS568849A - Manufacture of semiconductor integrated circuit - Google Patents

Manufacture of semiconductor integrated circuit

Info

Publication number
JPS568849A
JPS568849A JP8425879A JP8425879A JPS568849A JP S568849 A JPS568849 A JP S568849A JP 8425879 A JP8425879 A JP 8425879A JP 8425879 A JP8425879 A JP 8425879A JP S568849 A JPS568849 A JP S568849A
Authority
JP
Japan
Prior art keywords
film
wiring
films
layer
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8425879A
Other languages
Japanese (ja)
Other versions
JPS6154254B2 (en
Inventor
Mitsutaka Morimoto
Hiroki Muta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8425879A priority Critical patent/JPS568849A/en
Publication of JPS568849A publication Critical patent/JPS568849A/en
Publication of JPS6154254B2 publication Critical patent/JPS6154254B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the junction capacitance and steps on a surface by a method wherein the surfaces of an impurity diffused layer which is to be a wiring within an element and polycrystalline Si which is to be a wiring between elements are covered with thin metalic silicate compounds. CONSTITUTION:An Si nitride film 34 is formed on a P-type Si substrate 31, and by utilizing it as a mask a channel stopper 32 and a field oxide film 33 are formed. Next after a film 34 of a region where an element region is to be formed is removed, an Si oxide film 35 is formed, and on it patterned polycrystalline Si layers 36G, 36C and Si nitride films 37G, 37C are formed. Next by utilizing films 34, 37G and a film 36G which is to be a gate electrode as a mask, an N-type impurity diffusion region 38 which has shallow junction depth and is to be source and drain is formed. Next films 34, 37G, 37C are removed, and at the same time when an N-type diffusion layer 40 which has deep junction depth and is to be a wiring within an element is formed, N-type impurity is diffused also into the film 36G and the film 36C which is to be a wiring between elements. Next surfaces of a layer 40 and films 36G, 36C are covered with a thin metalic silicide layer.
JP8425879A 1979-07-03 1979-07-03 Manufacture of semiconductor integrated circuit Granted JPS568849A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8425879A JPS568849A (en) 1979-07-03 1979-07-03 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8425879A JPS568849A (en) 1979-07-03 1979-07-03 Manufacture of semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS568849A true JPS568849A (en) 1981-01-29
JPS6154254B2 JPS6154254B2 (en) 1986-11-21

Family

ID=13825421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8425879A Granted JPS568849A (en) 1979-07-03 1979-07-03 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS568849A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818965A (en) * 1981-07-28 1983-02-03 Toshiba Corp Manufacturing method of semiconductor device
JPS6442862A (en) * 1987-08-11 1989-02-15 Seiko Epson Corp Manufacture of high-withstand voltage mos semiconductor device
US5364923A (en) * 1992-09-30 1994-11-15 Dow Corning Toray Silicone Co., Ltd. Organopolysiloxane graft epoxy resins and a method for the preparation thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818965A (en) * 1981-07-28 1983-02-03 Toshiba Corp Manufacturing method of semiconductor device
JPS6442862A (en) * 1987-08-11 1989-02-15 Seiko Epson Corp Manufacture of high-withstand voltage mos semiconductor device
US5364923A (en) * 1992-09-30 1994-11-15 Dow Corning Toray Silicone Co., Ltd. Organopolysiloxane graft epoxy resins and a method for the preparation thereof

Also Published As

Publication number Publication date
JPS6154254B2 (en) 1986-11-21

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