JPS6442862A - Manufacture of high-withstand voltage mos semiconductor device - Google Patents

Abstract

PURPOSE:To rationalize a process, to eliminate crystal defect and to contrive the improvement of electrical characteristics and the improvement of a yield by a method wherein the implantation of a high-concentration impurity is performed through an Si oxide film and sidewalls consisting of the Si oxide film are prevented from being formed on the side surfaces of a gate electrode. CONSTITUTION:An oxidation-resistant film 123 is patterned, an impurity is ion-implanted in channel stoppers 102 and drain low-concentration impurity regions 103, an Si substrate 101 is selectively oxidized using the film 123 as a mask and the film 123 is removed. Then, a gate oxide film 105 and a gate electrode are formed and after source and drain high-concentration impurity regions 119 and 109 are formed, the surface, which is located on the regions 119 and 109, of the substrate 101 is perforated. Moreover, a metal layer or its silicide layer is formed on the gate electrode and the regions 119 and 109 pinching selective oxide films 104 between them in a self-alignment manner. Thereby, the improvement of electrical characteristics can be contrived and the improvement of a yield can be contrived by a reduction in the side and the rationalization of process.