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JPS5571055A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method

Info

Publication number
JPS5571055A
JPS5571055A JP14416278A JP14416278A JPS5571055A JP S5571055 A JPS5571055 A JP S5571055A JP 14416278 A JP14416278 A JP 14416278A JP 14416278 A JP14416278 A JP 14416278A JP S5571055 A JPS5571055 A JP S5571055A
Authority
JP
Japan
Prior art keywords
layer
resistance
low
wiring layer
resistance wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14416278A
Other languages
Japanese (ja)
Other versions
JPS6157709B2 (en
Inventor
Yasunobu Osa
Satoshi Meguro
Koichi Nagasawa
Akira Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14416278A priority Critical patent/JPS5571055A/en
Publication of JPS5571055A publication Critical patent/JPS5571055A/en
Publication of JPS6157709B2 publication Critical patent/JPS6157709B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To facilitate manufacture by a method wherein a high fusing point metal layer is first formed and then partly removed to have a high resistance polysilicon layer formed thereon to bridge said metal layer in an IC having resistance polycrystal silicon layer and a low-resistance layer.
CONSTITUTION: An insulator layer 11 consisting of a thick field oxidized film SiO2 is formed on a semiconductor substrate 10, and a low-resistance wiring layer 30 is formed with a high fusing point metal layer like molybdenum on a principal surface other than the portion where to form a high-resistance wiring layer on said insulator layer 11. Next, a high-resistance polysilicon layer 17 is formed on said low-resistance wiring layer 30 and on said portion where to form the high-resistance wiring layer. In the drawing, 12 represents a gate SiO2 film.
COPYRIGHT: (C)1980,JPO&Japio
JP14416278A 1978-11-24 1978-11-24 Semiconductor device and its manufacturing method Granted JPS5571055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14416278A JPS5571055A (en) 1978-11-24 1978-11-24 Semiconductor device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14416278A JPS5571055A (en) 1978-11-24 1978-11-24 Semiconductor device and its manufacturing method

Publications (2)

Publication Number Publication Date
JPS5571055A true JPS5571055A (en) 1980-05-28
JPS6157709B2 JPS6157709B2 (en) 1986-12-08

Family

ID=15355632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14416278A Granted JPS5571055A (en) 1978-11-24 1978-11-24 Semiconductor device and its manufacturing method

Country Status (1)

Country Link
JP (1) JPS5571055A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122769A (en) * 1982-01-18 1983-07-21 Seiko Epson Corp Manufacturing method of semiconductor device
JPS59208855A (en) * 1983-05-13 1984-11-27 Hitachi Ltd Wiring structure
US5223455A (en) * 1987-07-10 1993-06-29 Kabushiki Kaisha Toshiba Method of forming refractory metal film

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122769A (en) * 1982-01-18 1983-07-21 Seiko Epson Corp Manufacturing method of semiconductor device
JPS59208855A (en) * 1983-05-13 1984-11-27 Hitachi Ltd Wiring structure
JPH0572747B2 (en) * 1983-05-13 1993-10-12 Hitachi Ltd
US5223455A (en) * 1987-07-10 1993-06-29 Kabushiki Kaisha Toshiba Method of forming refractory metal film

Also Published As

Publication number Publication date
JPS6157709B2 (en) 1986-12-08

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