JP6148160B2 - ウエーハの加工方法 - Google Patents
ウエーハの加工方法 Download PDFInfo
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- JP6148160B2 JP6148160B2 JP2013240945A JP2013240945A JP6148160B2 JP 6148160 B2 JP6148160 B2 JP 6148160B2 JP 2013240945 A JP2013240945 A JP 2013240945A JP 2013240945 A JP2013240945 A JP 2013240945A JP 6148160 B2 JP6148160 B2 JP 6148160B2
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- 238000003672 processing method Methods 0.000 title claims description 20
- 229920005989 resin Polymers 0.000 claims description 75
- 239000011347 resin Substances 0.000 claims description 75
- 238000000034 method Methods 0.000 claims description 33
- 238000000576 coating method Methods 0.000 claims description 28
- 238000005192 partition Methods 0.000 claims description 24
- 230000000873 masking effect Effects 0.000 claims description 22
- 239000011248 coating agent Substances 0.000 claims description 19
- 238000001020 plasma etching Methods 0.000 claims description 13
- 238000005530 etching Methods 0.000 claims description 12
- 238000002844 melting Methods 0.000 claims description 7
- 230000008018 melting Effects 0.000 claims description 7
- 238000002360 preparation method Methods 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 description 40
- 238000005520 cutting process Methods 0.000 description 13
- 238000004891 communication Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910018503 SF6 Inorganic materials 0.000 description 1
- 239000011149 active material Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Dicing (AREA)
Description
分割予定ラインに対応して格子状に形成された仕切り部を備えた枠体を準備する枠体準備工程と、
ウエーハの表面または裏面にパウダー状の樹脂を敷設するとともに該枠体の仕切り部を分割予定ラインに対応して位置付けることにより、ウエーハの表面または裏面における分割予定ラインに対応する領域以外の領域をパウダー状の樹脂で被覆する樹脂被覆工程と、
該樹脂被覆工程が実施されたウエーハの表面または裏面に被覆されたパウダー状の樹脂を溶融して固化した後に該枠体を除去することにより、分割予定ラインに対応する領域以外の領域をマスキングするマスキング工程と、
該マスキング工程が実施されたウエーハをプラズマエッチングすることにより、分割予定ラインに沿って個々のデバイス分割するエッチング工程と、を含む、
ことを特徴とするウエーハの加工方法が提供される。
また、上記樹脂被覆工程は、枠体の仕切り部を分割予定ラインに対応して位置付けた状態でパウダー状の樹脂を敷設する。
以下、この半導体ウエーハ2を分割予定ライン21に沿って個々のデバイス22に分割するウエーハの加工方法について説明する。
樹脂被覆工程の他の実施形態においては、図5の(a)に示すように枠体3の仕切り部31を分割予定ライン21に対応して位置付ける。次に図5の(b)に示すようにパウダー状樹脂供給手段5を作動して枠体3の上方からパウダー状の樹脂50を供給する。この結果、図5の(c)に示すように枠体3の仕切り部31によって区画された中空の領域32にパウダー状の樹脂50が敷設される。
このようにしてエッチング工程が実施され分割予定ライン21に沿って分割された個々のデバイス22は、保持テーブル4に保持された状態で次工程であるピックアップ工程に搬送される。
21:分割予定ライン
22:デバイス
3:枠体
4:保持テーブル
5:パウダー状樹脂供給手段
6:加熱ヒーター
7:プラズマエッチング装置
72:下部電極
73:上部電極
74:高周波電圧印加手段
75:ガス供給手段
Claims (3)
- 表面に格子状に形成された分割予定ラインによって区画された複数の領域にデバイスが形成されたウエーハを分割予定ラインに沿って分割するウエーハの加工方法であって、
分割予定ラインに対応して格子状に形成された仕切り部を備えた枠体を準備する枠体準備工程と、
ウエーハの表面または裏面にパウダー状の樹脂を敷設するとともに該枠体の仕切り部を分割予定ラインに対応して位置付けることにより、ウエーハの表面または裏面における分割予定ラインに対応する領域以外の領域をパウダー状の樹脂で被覆する樹脂被覆工程と、
該樹脂被覆工程が実施されたウエーハの表面または裏面に被覆されたパウダー状の樹脂を溶融して固化した後に該枠体を除去することにより、分割予定ラインに対応する領域以外の領域をマスキングするマスキング工程と、
該マスキング工程が実施されたウエーハをプラズマエッチングすることにより、分割予定ラインに沿って個々のデバイス分割するエッチング工程と、を含む、
ことを特徴とするウエーハの加工方法。 - 該樹脂被覆工程は、該枠体の仕切り部を分割予定ラインに対応して位置付けて該枠体に超音波振動を付与することにより、ウエーハの表面または裏面に敷設されたパウダー状の樹脂を分割予定ラインに対応する領域から除去する、請求項1記載のウエーハの加工方法。
- 該樹脂被覆工程は、該枠体の仕切り部を分割予定ラインに対応して位置付けた状態でパウダー状の樹脂を敷設する、請求項1記載のウエーハの加工方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2013240945A JP6148160B2 (ja) | 2013-11-21 | 2013-11-21 | ウエーハの加工方法 |
US14/542,905 US9123797B2 (en) | 2013-11-21 | 2014-11-17 | Resin powder wafer processing utilizing a frame with a plurality of partitions |
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JP2013240945A JP6148160B2 (ja) | 2013-11-21 | 2013-11-21 | ウエーハの加工方法 |
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JP2015103556A JP2015103556A (ja) | 2015-06-04 |
JP6148160B2 true JP6148160B2 (ja) | 2017-06-14 |
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JP6858452B2 (ja) * | 2017-06-23 | 2021-04-14 | 株式会社ディスコ | 識別マーク付きウェーハ治具 |
US12183609B2 (en) * | 2022-03-03 | 2024-12-31 | Micron Technology, Inc. | Wafer carrier with reticle template for marking reticle fields on a semiconductor wafer |
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JPH10193190A (ja) * | 1997-01-14 | 1998-07-28 | Sumitomo Metal Ind Ltd | 粉末の均一充填法 |
US20040038442A1 (en) * | 2002-08-26 | 2004-02-26 | Kinsman Larry D. | Optically interactive device packages and methods of assembly |
US7645635B2 (en) * | 2004-08-16 | 2010-01-12 | Micron Technology, Inc. | Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages |
JP2006108429A (ja) * | 2004-10-06 | 2006-04-20 | Disco Abrasive Syst Ltd | ウェーハの加工方法及びデバイス |
JP2006120834A (ja) | 2004-10-21 | 2006-05-11 | Disco Abrasive Syst Ltd | ウェーハの分割方法 |
US20090298300A1 (en) * | 2008-05-09 | 2009-12-03 | Applied Materials, Inc. | Apparatus and Methods for Hyperbaric Rapid Thermal Processing |
JP5380058B2 (ja) * | 2008-11-28 | 2014-01-08 | 富士フイルム株式会社 | インプリント材料及びインプリント方法 |
JP2012195388A (ja) * | 2011-03-15 | 2012-10-11 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
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JP2015103556A (ja) | 2015-06-04 |
US9123797B2 (en) | 2015-09-01 |
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