IT8322980A0 - Memoria a semiconduttori a celle di memoria dinamica. - Google Patents

Memoria a semiconduttori a celle di memoria dinamica.

Info

Publication number: IT8322980A0
Authority: IT; Italy
Prior art keywords: cell semiconductor; dynamic; memory cell; memory; semiconductor memory
Prior art date: 1982-09-24

Application number

IT8322980A

Other languages

English (en)

Other versions

IT1167388B (it

Inventor

Yoshiaki Onishi

Hiroshi Kawamoto

Tokumasa Yasui

Original Assignee

Hitachi Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1982-09-24

Filing date

1983-09-23

Publication date

1983-09-23

1983-09-23 Application filed by Hitachi Ltd filed Critical Hitachi Ltd

1983-09-23 Publication of IT8322980A0 publication Critical patent/IT8322980A0/it

1987-05-13 Application granted granted Critical

1987-05-13 Publication of IT1167388B publication Critical patent/IT1167388B/it

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches

Landscapes

Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Databases & Information Systems (AREA)
Microelectronics & Electronic Packaging (AREA)
Dram (AREA)

IT22980/83A 1982-09-24 1983-09-23 Memoria a semiconduttori a celle di memoria dinamica IT1167388B (it)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP57164831A JPS5956292A (ja)	1982-09-24	1982-09-24	半導体記憶装置

Publications (2)

Publication Number	Publication Date
IT8322980A0 true IT8322980A0 (it)	1983-09-23
IT1167388B IT1167388B (it)	1987-05-13

Family

ID=15800754

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT22980/83A IT1167388B (it)	1982-09-24	1983-09-23	Memoria a semiconduttori a celle di memoria dinamica

Country Status (10)

Country	Link
US (1)	US4564925A (it)
JP (1)	JPS5956292A (it)
KR (1)	KR940009078B1 (it)
DE (1)	DE3334560A1 (it)
FR (1)	FR2533739B1 (it)
GB (1)	GB2127640B (it)
HK (1)	HK70987A (it)
IT (1)	IT1167388B (it)
MY (1)	MY8700611A (it)
SG (1)	SG36787G (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS60136084A (ja) *	1983-12-26	1985-07-19	Hitachi Ltd	半導体集積回路装置
JPS60211692A (ja) *	1984-04-06	1985-10-24	Hitachi Ltd	半導体記憶装置
JPS60242587A (ja) *	1984-05-16	1985-12-02	Hitachi Micro Comput Eng Ltd	ダイナミツク型ｒａｍ
US4633102A (en) *	1984-07-09	1986-12-30	Texas Instruments Incorporated	High speed address transition detector circuit for dynamic read/write memory
JPS6151692A (ja) *	1984-08-22	1986-03-14	Hitachi Ltd	記憶装置
US4661931A (en) *	1985-08-05	1987-04-28	Motorola, Inc.	Asynchronous row and column control
JPH0640439B2 (ja) *	1986-02-17	1994-05-25	日本電気株式会社	半導体記憶装置
JPH06101229B2 (ja) *	1986-09-09	1994-12-12	三菱電機株式会社	ダイナミツク・ランダム・アクセス・メモリ
US4780850A (en) *	1986-10-31	1988-10-25	Mitsubishi Denki Kabushiki Kaisha	CMOS dynamic random access memory
JPS63138598A (ja) *	1986-11-28	1988-06-10	Mitsubishi Electric Corp	不揮発性半導体記憶装置
JPH01251496A (ja) *	1988-03-31	1989-10-06	Toshiba Corp	スタティック型ランダムアクセスメモリ
JP2892757B2 (ja) *	1990-03-23	1999-05-17	三菱電機株式会社	半導体集積回路装置
DE4228213C2 (de) *	1991-09-19	1997-05-15	Siemens Ag	Integrierte Halbleiterspeicherschaltung und Verfahren zu ihrem Betreiben

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5240937B2 (it) *	1972-05-16	1977-10-15
US3806898A (en) *	1973-06-29	1974-04-23	Ibm	Regeneration of dynamic monolithic memories
US4156938A (en) *	1975-12-29	1979-05-29	Mostek Corporation	MOSFET Memory chip with single decoder and bi-level interconnect lines
JPS5914827B2 (ja) *	1976-08-23	1984-04-06	株式会社日立製作所	アドレス選択システム
DE2935121A1 (de) *	1978-09-07	1980-03-27	Texas Instruments Inc	Schreib/lese-halbleiterspeicher
US4339809A (en) *	1980-09-19	1982-07-13	Rca Corporation	Noise protection circuits
US4338679A (en) *	1980-12-24	1982-07-06	Mostek Corporation	Row driver circuit for semiconductor memory
DE3101520A1 (de) *	1981-01-19	1982-08-26	Siemens AG, 1000 Berlin und 8000 München	Monolithisch integrierter halbleiterspeicher
JPS57186289A (en) *	1981-05-13	1982-11-16	Hitachi Ltd	Semiconductor memory

1982
- 1982-09-24 JP JP57164831A patent/JPS5956292A/ja active Pending
1983
- 1983-08-04 FR FR838312884A patent/FR2533739B1/fr not_active Expired - Lifetime
- 1983-08-23 KR KR1019830003932A patent/KR940009078B1/ko not_active IP Right Cessation
- 1983-09-21 GB GB08325232A patent/GB2127640B/en not_active Expired
- 1983-09-23 IT IT22980/83A patent/IT1167388B/it active
- 1983-09-23 DE DE19833334560 patent/DE3334560A1/de not_active Withdrawn
- 1983-09-23 US US06/535,056 patent/US4564925A/en not_active Expired - Fee Related
1987
- 1987-04-23 SG SG367/87A patent/SG36787G/en unknown
- 1987-10-01 HK HK709/87A patent/HK70987A/xx unknown
- 1987-12-30 MY MY611/87A patent/MY8700611A/xx unknown

Also Published As

Publication number	Publication date
SG36787G (en)	1987-07-24
GB8325232D0 (en)	1983-10-26
DE3334560A1 (de)	1984-04-05
IT1167388B (it)	1987-05-13
GB2127640A (en)	1984-04-11
MY8700611A (en)	1987-12-31
KR940009078B1 (ko)	1994-09-29
HK70987A (en)	1987-10-09
KR840005888A (ko)	1984-11-19
JPS5956292A (ja)	1984-03-31
GB2127640B (en)	1986-01-02
US4564925A (en)	1986-01-14
FR2533739A1 (fr)	1984-03-30
FR2533739B1 (fr)	1991-06-07

Publication	Publication Date	Title
IT8319579A0 (it)	1983-02-14	Memoria a semiconduttori.
DE3381545D1 (de)	1990-06-13	Halbleiterspeicheranordnung.
DE3483134D1 (de)	1990-10-11	Dynamische halbleiterspeicheranordnung mit geteilten speicherzellenbloecken.
DE3382212D1 (de)	1991-04-18	Halbleiterspeicher.
DE3585711D1 (de)	1992-04-30	Halbleiterspeicheranordnung.
DE3177169D1 (de)	1990-05-03	Halbleiterspeicheranordnung.
DE3583091D1 (de)	1991-07-11	Halbleiterspeicheranordnung.
DE3577944D1 (de)	1990-06-28	Halbleiterspeicheranordnung.
DE3689004D1 (de)	1993-10-14	Halbleiterspeicherzelle.
DE3485625D1 (de)	1992-05-07	Halbleiterspeicheranordnung.
DE3582376D1 (de)	1991-05-08	Halbleiterspeicheranordnung.
DE3586377D1 (de)	1992-08-27	Halbleiterspeicheranordnung.
DE3484180D1 (de)	1991-04-04	Halbleiterspeicheranordnung.
DE3576236D1 (de)	1990-04-05	Halbleiterspeicheranordnung.
DE3176699D1 (de)	1988-05-05	Non-volatile semiconductor memory cell
DE3481355D1 (de)	1990-03-15	Halbleiterspeicheranordnung.
DE3577367D1 (de)	1990-05-31	Halbleiterspeicheranordnung.
DE3575225D1 (de)	1990-02-08	Halbleiterspeicheranordnung.
DE3580993D1 (de)	1991-02-07	Halbleiterspeicheranordnung.
DE3586556D1 (de)	1992-10-01	Halbleiterspeicheranordnung.
DE3576754D1 (de)	1990-04-26	Halbleiterspeicheranordnung.
IT8322980A0 (it)	1983-09-23	Memoria a semiconduttori a celle di memoria dinamica.
IT8322951A0 (it)	1983-09-21	Dispositivo di memoria a semiconduttori.
DE3586675D1 (de)	1992-10-29	Halbleiterspeicheranordnung.
DE3578254D1 (de)	1990-07-19	Halbleiterspeicheranordnung.

Legal Events

Date	Code	Title	Description
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19950927