DE3576236D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number: DE3576236D1
Authority: DE; Germany
Prior art keywords: semiconductor memory; memory arrangement; arrangement; semiconductor; memory
Prior art date: 1984-10-22
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE8585307615T

Other languages

English (en)

Inventor

Tomohisa C O Mitsubishi D Wada

Hirofumi C O Mitsubi Shinohara

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Mitsubishi Electric Corp

Original Assignee

Mitsubishi Electric Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1984-10-22

Filing date

1985-10-22

Publication date

1990-04-05

1985-10-22 Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp

1990-04-05 Application granted granted Critical

1990-04-05 Publication of DE3576236D1 publication Critical patent/DE3576236D1/de

2005-10-23 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Static Random-Access Memory (AREA)

DE8585307615T 1984-10-22 1985-10-22 Halbleiterspeicheranordnung. Expired - Lifetime DE3576236D1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP59223322A JPS61104394A (ja)	1984-10-22	1984-10-22	半導体記憶装置

Publications (1)

Publication Number	Publication Date
DE3576236D1 true DE3576236D1 (de)	1990-04-05

Family

ID=16796334

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8585307615T Expired - Lifetime DE3576236D1 (de)	1984-10-22	1985-10-22	Halbleiterspeicheranordnung.

Country Status (4)

Country	Link
US (1)	US4751683A (de)
EP (1)	EP0179651B1 (de)
JP (1)	JPS61104394A (de)
DE (1)	DE3576236D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS62170097A (ja) *	1986-01-21	1987-07-27	Fujitsu Ltd	半導体記憶装置
JPS63104290A (ja) *	1986-10-21	1988-05-09	Nec Corp	半導体記憶装置
JP2569554B2 (ja) *	1987-05-13	1997-01-08	三菱電機株式会社	ダイナミツクｒａｍ
JPH0766665B2 (ja) *	1988-03-31	1995-07-19	株式会社東芝	半導体記憶装置
US5046052A (en) *	1988-06-01	1991-09-03	Sony Corporation	Internal low voltage transformation circuit of static random access memory
JPH0814989B2 (ja) *	1989-05-09	1996-02-14	日本電気株式会社	内部同期型スタティックｒａｍ
JP3228759B2 (ja) *	1990-01-24	2001-11-12	セイコーエプソン株式会社	半導体記憶装置及びデータ処理装置
NL9000544A (nl) *	1990-03-09	1991-10-01	Philips Nv	Schrijf-erkenningscircuit bevattende schrijfdetector en bistabiel element voor vier-fase hand-shake signalering.
US5121358A (en) *	1990-09-26	1992-06-09	Sgs-Thomson Microelectronics, Inc.	Semiconductor memory with power-on reset controlled latched row line repeaters
US5280452A (en) *	1991-07-12	1994-01-18	International Business Machines Corporation	Power saving semsing circuits for dynamic random access memory
JP3230848B2 (ja) *	1991-09-20	2001-11-19	三菱電機株式会社	スタティックランダムアクセスメモリ装置
US5282174A (en) *	1992-01-31	1994-01-25	At&T Bell Laboratories	Dual-port memory with read and read/write ports
JPH1145598A (ja) *	1997-07-25	1999-02-16	Nec Corp	半導体記憶装置
JPH11213674A (ja) *	1998-01-20	1999-08-06	Sony Corp	電圧供給回路
JP2000243089A (ja) *	1999-02-19	2000-09-08	Fujitsu Ltd	デコーダ回路及びデコード方法
US6088289A (en)	1999-09-27	2000-07-11	Cypress Semiconductor Corp.	Circuit and method for controlling a wordline and/or stabilizing a memory cell
JP2001101893A (ja) *	1999-09-29	2001-04-13	Mitsubishi Electric Corp	スタティック型半導体記憶装置
JP2005078741A (ja) *	2003-09-02	2005-03-24	Renesas Technology Corp	半導体記憶装置
US7203102B2 (en)	2004-10-27	2007-04-10	Infineon Technologies, Ag	Semiconductor memory having tri-state driver device
EP1750276B1 (de) *	2005-07-29	2017-03-08	Semiconductor Energy Laboratory Co., Ltd.	Halbleiterbauelement
JP5100035B2 (ja) *	2005-08-02	2012-12-19	ルネサスエレクトロニクス株式会社	半導体記憶装置
US8072834B2 (en) *	2005-08-25	2011-12-06	Cypress Semiconductor Corporation	Line driver circuit and method with standby mode of operation

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US28905A (en) *		1860-06-26		Rotary engine
DE2457921C2 (de) *	1974-12-07	1976-12-09	Ibm Deutschland	Verfahren und schaltungsanordnung zur erhoehung der schreibgeschwindigkeit in integrierten datenspeichern
JPS6057156B2 (ja) *	1978-05-24	1985-12-13	株式会社日立製作所	半導体メモリ装置
JPS55101185A (en) *	1979-01-29	1980-08-01	Chiyou Lsi Gijutsu Kenkyu Kumiai	Semiconductor memory device
JPS55113195A (en) *	1979-02-23	1980-09-01	Fujitsu Ltd	Reading method of memory unit
JPS5833634B2 (ja) *	1979-02-28	1983-07-21	富士通株式会社	メモリセルアレイの駆動方式
JPS55160390A (en) *	1979-05-29	1980-12-13	Nec Corp	Driving method of dynamic memory cell
JPS598913B2 (ja) *	1980-04-01	1984-02-28	富士通株式会社	記憶装置
US4360903A (en) *	1980-09-10	1982-11-23	Mostek Corporation	Clocking system for a self-refreshed dynamic memory
US4536859A (en) *	1981-08-31	1985-08-20	Sharp Kabushiki Kaisha	Cross-coupled inverters static random access memory
US4460984A (en) *	1981-12-30	1984-07-17	International Business Machines Corporation	Memory array with switchable upper and lower word lines
US4446536A (en) *	1982-06-21	1984-05-01	Mcdonnell Douglas Corporation	Complementary metal oxide semiconductors address drive circuit
JPS59229785A (ja) *	1983-06-10	1984-12-24	Hitachi Ltd	バイポ−ラ型ｒａｍ
JPS6196588A (ja) *	1984-10-16	1986-05-15	Mitsubishi Electric Corp	半導体記憶装置

1984
- 1984-10-22 JP JP59223322A patent/JPS61104394A/ja active Pending
1985
- 1985-09-03 US US06/771,709 patent/US4751683A/en not_active Expired - Lifetime
- 1985-10-22 EP EP85307615A patent/EP0179651B1/de not_active Expired
- 1985-10-22 DE DE8585307615T patent/DE3576236D1/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0179651A2 (de)	1986-04-30
US4751683A (en)	1988-06-14
EP0179651B1 (de)	1990-02-28
EP0179651A3 (en)	1987-10-07
JPS61104394A (ja)	1986-05-22

Publication	Publication Date	Title
DE3585711D1 (de)	1992-04-30	Halbleiterspeicheranordnung.
DE3583091D1 (de)	1991-07-11	Halbleiterspeicheranordnung.
DE3577944D1 (de)	1990-06-28	Halbleiterspeicheranordnung.
DE3481957D1 (de)	1990-05-17	Halbleiteranordnung.
DE3686994D1 (de)	1992-11-26	Halbleiterspeicher.
DE3687322D1 (de)	1993-02-04	Halbleiterspeicheranordnung.
DE3485174D1 (de)	1991-11-21	Halbleiterspeicheranordnung.
DE3582376D1 (de)	1991-05-08	Halbleiterspeicheranordnung.
DE3485625D1 (de)	1992-05-07	Halbleiterspeicheranordnung.
DE3586377D1 (de)	1992-08-27	Halbleiterspeicheranordnung.
DE3576236D1 (de)	1990-04-05	Halbleiterspeicheranordnung.
DE3484180D1 (de)	1991-04-04	Halbleiterspeicheranordnung.
DE3582653D1 (de)	1991-05-29	Halbleiteranordnung.
DE3577367D1 (de)	1990-05-31	Halbleiterspeicheranordnung.
DE3481355D1 (de)	1990-03-15	Halbleiterspeicheranordnung.
DE3675445D1 (de)	1990-12-13	Halbleiterspeicheranordnung.
DE3680562D1 (de)	1991-09-05	Halbleiterspeicheranordnung.
DE3575225D1 (de)	1990-02-08	Halbleiterspeicheranordnung.
DE3586556D1 (de)	1992-10-01	Halbleiterspeicheranordnung.
DE3580993D1 (de)	1991-02-07	Halbleiterspeicheranordnung.
DE3576754D1 (de)	1990-04-26	Halbleiterspeicheranordnung.
DE3582960D1 (de)	1991-07-04	Halbleiterspeicheranordnung.
DE3578254D1 (de)	1990-07-19	Halbleiterspeicheranordnung.
DE3586675D1 (de)	1992-10-29	Halbleiterspeicheranordnung.
DE3486094D1 (de)	1993-04-15	Halbleiterspeicheranordnung.

Legal Events

Date	Code	Title
1991-03-14	8364	No opposition during term of opposition
1996-02-01	8320	Willingness to grant licences declared (paragraph 23)
2001-11-08	8339	Ceased/non-payment of the annual fee