CN104679476A - Noise type random number generation device - Google Patents
Noise type random number generation device Download PDFInfo
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- CN104679476A CN104679476A CN201510105707.3A CN201510105707A CN104679476A CN 104679476 A CN104679476 A CN 104679476A CN 201510105707 A CN201510105707 A CN 201510105707A CN 104679476 A CN104679476 A CN 104679476A
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Abstract
The invention provides a noise type random number generation device. A noise current source comprises a common-source and common-grid current source, a resistor, a first common-source amplifier, a first mirror image device, a first CMOS (Complementary Metal-Oxide-Semiconductor Transistor) tube, a second CMOS tube, a third CMOS tube, a fourth CMOS tube, a first capacitor and a second capacitor, wherein a grid electrode of the first CMOS tube is connected with that of the second CMOS tube, so that first current is output by a drain electrode of the second CMOS tube; a grid electrode of the third CMOS tube is connected with that of the fourth CMOS tube, so that second current is output by a drain electrode of the fourth CMOS tube; a drain electrode of the second CMOS tube and a drain electrode of the fourth CMOS tube are respectively connected with a current comparator, so that the first current and the second current respectively flow into the current comparator, so as to obtain a random number sequence, thereby increasing the random number generation speed.
Description
Technical field
The present invention relates to the communications field, particularly relate to a kind of noisy-type generating random number device.
Background technology
Usually random number sequence can be produced by comparer after Resistance Thermal Noise being amplified, namely based on the true random number (Truly Random Number Generator is called for short TRNG) of Resistance Thermal Noise.
In prior art, first by low noise amplifier, noise signal is amplified, the impact of offset voltage and the impact of 1/f noise is effectively controlled again by increasing backfeed loop, and subtract by post-processing module the impact that relative operation weakens coupled noise, thus improve the randomness of output sequence further.
But realizing in the process based on the true random number of Resistance Thermal Noise, due to the imbalance of noise amplifier, the coupled interference of substrate and power supply, the finite bandwidth of amplifier and the impact of 1/f noise, cause the speed generating true random number lower.
Summary of the invention
The invention provides a kind of noisy-type generating random number device, the problem that the speed in order to solve generation true random number is lower.
First aspect of the present invention is to provide a kind of noisy-type generating random number device, comprising: noise current source and current comparator, wherein,
Described noise current source, comprising: cascode current source, resistance, the first common-source amplifier, the first mirror image device, the first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the first electric capacity and the second electric capacity;
The first end of described resistance is connected with the grid of described cascode current source, described first common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described first common-source amplifier is connected with the drain electrode of described first CMOS tube, the grid of described first CMOS tube and the grid of the second CMOS tube respectively, the grid of described first CMOS tube is connected with the grid of the second CMOS tube, exports the first electric current to make the drain electrode of described second CMOS tube;
The first end of described resistance is connected with the grid of described second common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described second common-source amplifier respectively with the drain electrode of the 3rd CMOS tube, the first end of described second electric capacity, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the first end of described second electric capacity is connected with the grid of described 3rd CMOS tube and the grid of described 4th CMOS tube respectively, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the second electric current is exported to make the drain electrode of described 4th CMOS tube.
The drain electrode of described second CMOS tube is connected with described current comparator respectively with the drain electrode of described 4th CMOS tube, to make described first electric current and described second electric current flow into described current comparator respectively, obtains random number series.
Optionally, described cascode current source, also comprises: the 5th CMOS tube and the 6th CMOS tube;
The drain electrode of described 5th CMOS tube is connected with the source electrode of described 6th CMOS tube, and first end, the grid of the first common-source amplifier and the first end of described first electric capacity that the drain electrode of described 6th CMOS tube is organized with described electricity are respectively connected.
Optionally, described cascode current source, also comprises: the 7th CMOS tube, the 8th CMOS tube,
The grid of described 7th CMOS tube is connected with the grid of described 5th CMOS tube, the grid of described 8th CMOS tube is connected with the grid of described 6th CMOS tube, the drain electrode of described 8th CMOS tube is connected with the grid of described 7th CMOS tube and the grid of described 5th CMOS tube respectively, and the drain electrode of described 7th CMOS tube is connected with the source electrode of described 8th CMOS tube.
Optionally, described cascode current source, also comprises: the 9th CMOS tube, the tenth CMOS tube, the 11 CMOS tube and the 12 CMOS tube;
The drain electrode of described 8th CMOS tube is connected with the drain electrode of described 9th CMOS tube, the source electrode of described 9th CMOS tube is connected with the drain electrode of described tenth CMOS tube, the source electrode of described 11 CMOS tube is connected with the drain electrode of described 12 CMOS tube, the grid of described 9th CMOS tube is connected with the grid of described 11 CMOS tube, and the grid of described tenth CMOS tube is connected with the grid of described 12 CMOS tube.
Optionally, described first common-source amplifier is PMOS; Described second common-source amplifier is PMOS.
Optionally, described first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the 5th CMOS tube and the 6th CMOS tube, the 9th CMOS tube, the tenth CMOS tube, the 11 CMOS tube and the 12 CMOS tube are NMOS tube.
Optionally, described current comparator is high speed current comparator.
Noisy-type generating random number device provided by the invention, described noise current source, comprising: cascode current source, resistance, the first common-source amplifier, the first mirror image device, the first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the first electric capacity and the second electric capacity, the first end of described resistance is connected with the grid of described cascode current source, described first common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described first common-source amplifier is connected with the drain electrode of described first CMOS tube, the grid of described first CMOS tube and the grid of the second CMOS tube respectively, the grid of described first CMOS tube is connected with the grid of the second CMOS tube, exports the first electric current to make the drain electrode of described second CMOS tube, the first end of described resistance is connected with the grid of described second common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described second common-source amplifier respectively with the drain electrode of the 3rd CMOS tube, the first end of described second electric capacity, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the first end of described second electric capacity is connected with the grid of described 3rd CMOS tube and the grid of described 4th CMOS tube respectively, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the second electric current is exported to make the drain electrode of described 4th CMOS tube.The drain electrode of described second CMOS tube is connected with described current comparator respectively with the drain electrode of described 4th CMOS tube, to make described first electric current and described second electric current flow into described current comparator respectively, obtains random number series.Improve the speed generating random number.
Accompanying drawing explanation
Fig. 1 is the structural representation of noisy-type generating random number device one embodiment of the present invention;
Fig. 2 is the noise current source structural representation of noisy-type generating random number device one embodiment of the present invention.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
When the noisy-type generating random number device that the embodiment of the present invention provides can be applied to and generate random number based on Resistance Thermal Noise.Below the noisy-type generating random number device that the present embodiment provides is described in detail.
Fig. 1 is the structural representation of noisy-type generating random number device one embodiment of the present invention, Fig. 2 is the noise current source structural representation of noisy-type generating random number device one embodiment of the present invention, as depicted in figs. 1 and 2, the noisy-type generating random number device of the present embodiment, comprise: noise current source 1 and current comparator 2, wherein
Described noise current source 1, comprising: cascode current source 11, resistance 12, first common-source amplifier 13, second common-source amplifier 14, first CMOS tube 15, second CMOS tube 16, the 3rd CMOS tube 17, the 4th CMOS tube 18, first electric capacity 191 and the second electric capacity 192;
The first end of described resistance 12 is connected with the grid of described cascode current source 11, described first common-source amplifier 13 and the first end of described first electric capacity 191 respectively, the drain electrode of described first common-source amplifier 13 is connected with the drain electrode of described first CMOS tube 15, the grid of described first CMOS tube 15 and the grid of the second CMOS tube 16 respectively, the grid of described first CMOS tube 15 is connected with the grid of the second CMOS tube 16, exports the first electric current I noiseA to make the drain electrode of described second CMOS tube 16, the first end of described resistance 12 is connected with the grid of described second common-source amplifier 14 and the first end of described first electric capacity 191 respectively, the drain electrode of described second common-source amplifier 14 respectively with the drain electrode of the 3rd CMOS tube 17, the first end of described second electric capacity 192, the grid of described 3rd CMOS tube 17 is connected with the grid of described 4th CMOS tube 18, the first end of described second electric capacity 192 is connected with the grid of described 3rd CMOS tube 17 and the grid of described 4th CMOS tube 18 respectively, the grid of described 3rd CMOS tube 17 is connected with the grid of described 4th CMOS tube 18, the second electric current I noiseB is exported to make the drain electrode of described 4th CMOS tube 18.The drain electrode of described second CMOS tube 12 is connected with described current comparator 2 respectively with the drain electrode of described 4th CMOS tube 18, to make described first electric current and described second electric current flow into described current comparator 2 respectively, obtains random number series.
Concrete, bias current injects the bias voltage that thermal resistance 12Rs produces: V
bias=I
bias* R
s, by the size of the value adjustment bias voltage Vbias of adjustment bias current Ibias.
The source of noise voltage vnoise is mainly channel noise and the resistance 12 of the 5th CMOS tube 111, so these two devices of Main Analysis, the power spectrum density of the noise voltage at noise voltage vnoise place is:
Wherein, C
lfor C1 electric capacity, i
rsfor the output current of resistance 12, i
2be the output current that the 5th CMos pipe 111 drains, gm1 is that the 5th overstating of CMos pipe 111 is led, r
ds2be the output resistance of the 5th CMos pipe 111, r
ds1be the output resistance of the 6th CMOS tube 112, R
sfor the resistance of resistance 12;
Further, the root-mean-square value of the noise voltage of noise voltage vnoise is:
So:
At C
lwhen=1pF,
V
noiseat more than 6mV.
It is to be understood that, theoretical calculation carries out simple pre-estimation with amplifier equivalent input capacitance 1pF, consider rear stage high bandwidth amplifier, the size reducing CL electric capacity is further needed during actual design, above-mentioned estimation only does quantitative predication to resistance and channel noise in addition, actual value can be worth therewith and there are differences, and reason is that the parasitic junction capacitance that there is 1/f noise and MOS device all exists impact to end value.
Inoise is analyzed as follows:
i
noise＝v
noise*gm3
General value is as follows: Ibias ≈ 250nA, Rs ≈ 2M Ω, quiescent point is close to 0.5V, the mutual conductance gm3 of common-source amplifier is with 10uS, amplifier equivalent input capacitance 1pF estimates, only white noise probably just has about 60nA, and when equivalent input capacitance is less than 1pF, actual value can much larger than this value.
High frequency noise filtering link.No matter because the noise signals such as the high frequency that resistance noise source, amplifying element or other link are introduced in the first link, medium and low frequency and 1/f noise are in the lump by high broadband common source type amplifier, so the output of amplifier can be the superposition of multiple noise power spectrum, only relative to amplifier input more powerful, how much understand in bandwidth in addition some change.In order to utilize current comparator to compare electric current, need to do high-frequency except operation to the current branch of equal attribute.
In the present embodiment, described noise current source, comprising: cascode current source, resistance, the first common-source amplifier, the first mirror image device, the first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the first electric capacity and the second electric capacity, the first end of described resistance is connected with the grid of described cascode current source, described first common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described first common-source amplifier is connected with the drain electrode of described first CMOS tube, the grid of described first CMOS tube and the grid of the second CMOS tube respectively, the grid of described first CMOS tube is connected with the grid of the second CMOS tube, exports the first electric current to make the drain electrode of described second CMOS tube, the first end of described resistance is connected with the grid of described second common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described second common-source amplifier respectively with the drain electrode of the 3rd CMOS tube, the first end of described second electric capacity, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the first end of described second electric capacity is connected with the grid of described 3rd CMOS tube and the grid of described 4th CMOS tube respectively, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the second electric current is exported to make the drain electrode of described 4th CMOS tube.The drain electrode of described second CMOS tube is connected with described current comparator respectively with the drain electrode of described 4th CMOS tube, to make described first electric current and described second electric current flow into described current comparator respectively, obtains random number series.Improve the speed generating random number.
On the basis of above-described embodiment, cascode current source 11, can also comprise: the 5th CMOS tube 111 and the 6th CMOS tube 112;
The drain electrode of described 5th CMOS tube 111 is connected with the source electrode of described 6th CMOS tube 112, and the first end of 12, the grid of the first common-source amplifier 13 and described first electric capacity 191 are organized in the drain electrode of described 6th CMOS tube 112 respectively first end with described electricity is connected.
Further, described cascode current source 11, also comprises: the 7th CMOS tube 113, the 8th CMOS tube 114,
The grid of described 7th CMOS tube 113 is connected with the grid of described 5th CMOS tube 111, the grid of described 8th CMOS tube 114 is connected with the grid of described 6th CMOS tube 112, the drain electrode of described 8th CMOS tube 114 is connected with the grid of described 7th CMOS tube 113 and the grid of described 5th CMOS tube 111 respectively, and the drain electrode of described 7th CMOS tube 113 is connected with 114 source electrodes of described 8th CMOS tube.
On the basis of above-described embodiment, described cascode current source 11, can also comprise: the 9th CMOS tube 115, the tenth CMOS tube the 116, the 11 CMOS tube the 117 and the 12 CMOS tube 118;
The drain electrode of described 8th CMOS tube 114 is connected with the drain electrode of described 9th CMOS tube 115, the source electrode of described 9th CMOS tube 115 is connected with the drain electrode of described tenth CMOS tube 116, the source electrode of described 11 CMOS tube 117 is connected with the drain electrode of described 12 CMOS tube 118, the grid of described 9th CMOS tube 115 is connected with the grid of described 11 CMOS tube 117, and the grid of described tenth CMOS tube 116 is connected with the grid of described 12 CMOS tube 118.
Optionally, the first common-source amplifier in the present embodiment is PMOS; Described second common-source amplifier is PMOS.
Optionally, described first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the 5th CMOS tube and the 6th CMOS tube, the 9th CMOS tube, the tenth CMOS tube, the 11 CMOS tube and the 12 CMOS tube are NMOS tube.
Optionally, described current comparator is high speed current comparator.
In the present embodiment, Resistance Thermal Noise (white noise) is amplified, no matter for noise signals such as high frequency, medium and low frequency and 1/f noises that resistance noise source, amplifying element or other link are introduced in the lump by high broadband common source type amplifier, the noise current signal that acquisition amplitude is larger, filtered by the high frequency white noise signal of a High frequency filter link by a wherein branch road afterwards, realize digital quantization finally by electric current comparing element, obtain the random number of two-forty.Can the present invention be found out and not rely on the realization of low noise high bandwidth amplifier, the present invention in other words only makes requirement to high bandwidth, by filter away high frequency noise link, the radio-frequency component of a wherein branch road is removed, and another road is not removed, and this two-way electric current is compared.In addition, relative voltage comparer, current comparator is less on misalignment rate, so when high frequency white noise currents discharge amplitude is larger, even if not by technology such as the Offset controls requiring higher feedback, only compare noise current by current comparator, the quantification also more easily obtaining low imbalance exports.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (7)
1. a noisy-type generating random number device, is characterized in that, comprising: noise current source and current comparator, wherein,
Described noise current source, comprising: cascode current source, resistance, the first common-source amplifier, the first mirror image device, the first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the first electric capacity and the second electric capacity;
The first end of described resistance is connected with the grid of described cascode current source, described first common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described first common-source amplifier is connected with the drain electrode of described first CMOS tube, the grid of described first CMOS tube and the grid of the second CMOS tube respectively, the grid of described first CMOS tube is connected with the grid of the second CMOS tube, exports the first electric current to make the drain electrode of described second CMOS tube;
The first end of described resistance is connected with the grid of described second common-source amplifier and the first end of described first electric capacity respectively, the drain electrode of described second common-source amplifier respectively with the drain electrode of the 3rd CMOS tube, the first end of described second electric capacity, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the first end of described second electric capacity is connected with the grid of described 3rd CMOS tube and the grid of described 4th CMOS tube respectively, the grid of described 3rd CMOS tube is connected with the grid of described 4th CMOS tube, the second electric current is exported to make the drain electrode of described 4th CMOS tube,
The drain electrode of described second CMOS tube is connected with described current comparator respectively with the drain electrode of described 4th CMOS tube, to make described first electric current and described second electric current flow into described current comparator respectively, obtains random number series.
2. device according to claim 1, is characterized in that, described cascode current source, also comprises: the 5th CMOS tube and the 6th CMOS tube;
The drain electrode of described 5th CMOS tube is connected with the source electrode of described 6th CMOS tube, and first end, the grid of the first common-source amplifier and the first end of described first electric capacity that the drain electrode of described 6th CMOS tube is organized with described electricity are respectively connected.
3. device according to claim 2, is characterized in that, described cascode current source, also comprises: the 7th CMOS tube, the 8th CMOS tube,
The grid of described 7th CMOS tube is connected with the grid of described 5th CMOS tube, the grid of described 8th CMOS tube is connected with the grid of described 6th CMOS tube, the drain electrode of described 8th CMOS tube is connected with the grid of described 7th CMOS tube and the grid of described 5th CMOS tube respectively, and the drain electrode of described 7th CMOS tube is connected with the source electrode of described 8th CMOS tube.
4. device according to claim 3, is characterized in that, described cascode current source, also comprises: the 9th CMOS tube, the tenth CMOS tube, the 11 CMOS tube and the 12 CMOS tube;
The drain electrode of described 8th CMOS tube is connected with the drain electrode of described 9th CMOS tube, the source electrode of described 9th CMOS tube is connected with the drain electrode of described tenth CMOS tube, the source electrode of described 11 CMOS tube is connected with the drain electrode of described 12 CMOS tube, the grid of described 9th CMOS tube is connected with the grid of described 11 CMOS tube, and the grid of described tenth CMOS tube is connected with the grid of described 12 CMOS tube.
5. the device according to any one of claim 1-4, is characterized in that, described first common-source amplifier is PMOS; Described second common-source amplifier is PMOS.
6. device according to claim 5, it is characterized in that, described first CMOS tube, the second CMOS tube, the 3rd CMOS tube, the 4th CMOS tube, the 5th CMOS tube and the 6th CMOS tube, the 9th CMOS tube, the tenth CMOS tube, the 11 CMOS tube and the 12 CMOS tube are NMOS tube.
7. device according to claim 6, is characterized in that, described current comparator is high speed current comparator.
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