CN102769447A - Fully Differential High Speed Low Power Comparator - Google Patents
Fully Differential High Speed Low Power Comparator Download PDFInfo
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Abstract
Description
技术领域 technical field
本发明涉及一种全差分高速低功耗比较器，尤其是一种通过控制静态电流以达到低功耗的高速比较器。The invention relates to a fully differential high-speed and low-power comparator, in particular to a high-speed comparator which achieves low power consumption by controlling static current.
背景技术 Background technique
比较器是DC-DC开关电源系统中重要的子模块之一，其性能尤其是速度、功耗、噪声、失调对整个DC-DC系统的性能产生重要影响。为了提高基于交叉耦合对管线性OTA比较器的响应速度，在差分对输入管的负载端引入线性-非线性自适应电流镜结构，并且通过与交叉耦合对管结构的相互配合，使电流镜在不增大宽长比的前提下产生更大的镜像电流，但这种结构作为比较器产生的静态功耗很大。传统的比较器具有高速、高精度、抗电源噪声干扰能力强的特点，但是由于传统比较器在比较状态结束后仍有很大的静态电流，导致传统比较器静态功耗大，这也是传统比较器结构在低功耗应用中受到严重制约的重要原因。The comparator is one of the important sub-modules in the DC-DC switching power supply system, and its performance, especially the speed, power consumption, noise, and offset, has an important impact on the performance of the entire DC-DC system. In order to improve the response speed of the linear OTA comparator based on the cross-coupled pair tube, a linear-nonlinear adaptive current mirror structure is introduced at the load end of the differential pair input tube, and through the mutual cooperation with the cross-coupled pair tube structure, the current mirror is in A larger mirror current is generated without increasing the aspect ratio, but the static power consumption generated by this structure as a comparator is very large. The traditional comparator has the characteristics of high speed, high precision, and strong ability to resist power supply noise interference. However, because the traditional comparator still has a large quiescent current after the end of the comparison state, the traditional comparator has a large static power consumption. This is also a traditional comparator. An important reason why the structure of the device is severely constrained in low-power applications.
发明内容 Contents of the invention
本发明所要解决的技术问题是提供一种能够能够有效的降低静态功耗，提高响应速度和精度，提出一种新型全差分高速低功耗比较器。The technical problem to be solved by the present invention is to provide a comparator that can effectively reduce static power consumption, improve response speed and precision, and propose a new type of fully differential high-speed low-power comparator.
本发明为解决上述技术问题采用以下技术方案：本发明所设的一种全差分高速低功耗比较器，包括由两个开关管M4、M5构成的差分放大级,由八个开关管M13、M6、M10、M7、M14、M9、M11、M8构成的自适应电流镜负载极，由两个开关管M1、M2构成的电流传输级，其特征在于：还包括一个支路电流开关，所述电流开关与输出级通过至少一个推挽反相器相连。The present invention adopts the following technical solutions to solve the above-mentioned technical problems: a fully differential high-speed low-power comparator provided by the present invention includes a differential amplification stage composed of two switch tubes M4 and M5, and is composed of eight switch tubes M13, The self-adaptive current mirror load pole composed of M6, M10, M7, M14, M9, M11 and M8, and the current transmission stage composed of two switching tubes M1 and M2 are characterized in that: a branch current switch is also included, and the The current switch is connected to the output stage via at least one push-pull inverter.
作为本发明的一种优化结构：所述支路电流开关高电平导通时，与输出级通过奇数个推挽反相器相连，所述支路电流开关低电平导通时，与输出级通过偶数个推挽反相器相连。As an optimized structure of the present invention: when the branch current switch is turned on at a high level, it is connected to the output stage through an odd number of push-pull inverters; when the branch current switch is turned on at a low level, it is connected to the output stage The stages are connected through an even number of push-pull inverters.
作为本发明的一种优化结构：所述支路电流开关为NMOS管时，与输出级通过奇数个推挽反相器相连，所述支路电流开关为PMOS管时，与输出级通过偶数个推挽反相器相连。As an optimized structure of the present invention: when the branch current switch is an NMOS tube, it is connected to the output stage through an odd number of push-pull inverters; when the branch current switch is a PMOS tube, it is connected to the output stage through an even number of Push-pull inverter connected.
作为本发明的一种优化结构：所述支路电流开关为N型开关管M12时，与输出级通过一个推挽反相器相连；所述支路电流开关为PMOS管时，与输出级通过两个推挽反相器相连。As an optimized structure of the present invention: when the branch current switch is an N-type switch tube M12, it is connected to the output stage through a push-pull inverter; when the branch current switch is a PMOS tube, it is connected to the output stage through Two push-pull inverters are connected.
作为本发明的一种优化结构：所述开关管M10的漏极与N型开关管M12的源极相连，开关管M1的漏极与N型开关管M12的漏极相连，所述推挽反相器的输出端与N型开关管M12的栅极相连。As an optimized structure of the present invention: the drain of the switching tube M10 is connected to the source of the N-type switching tube M12, the drain of the switching tube M1 is connected to the drain of the N-type switching tube M12, and the push-pull reverse The output terminal of the phase converter is connected to the gate of the N-type switch transistor M12.
作为本发明的一种优化结构：所述比较器的输出端与至少一个推挽反相器连接,该推挽反相器的输出端连接后续负载。As an optimized structure of the present invention: the output terminal of the comparator is connected to at least one push-pull inverter, and the output terminal of the push-pull inverter is connected to a subsequent load.
作为本发明的一种优化结构：所述开关管M20的漏极与输出端相连，所述推挽反相器的输出级与N型开关管M12的源极相连。As an optimized structure of the present invention: the drain of the switching tube M20 is connected to the output terminal, and the output stage of the push-pull inverter is connected to the source of the N-type switching tube M12.
作为本发明的一种优化结构：所述推挽反相器由PMOS管和NMOS管构成。As an optimized structure of the present invention: the push-pull inverter is composed of a PMOS transistor and an NMOS transistor.
本发明采用以上技术方案与现有技术相比，解决了传统的OTA比较器静态功耗大的技术问题，并且大大提高比较器的输出摆率，提高比较器的增益和速度。Compared with the prior art, the present invention solves the technical problem of large static power consumption of the traditional OTA comparator by adopting the above technical scheme, and greatly improves the output slew rate of the comparator, and improves the gain and speed of the comparator.
附图说明 Description of drawings
图1为传统OTA比较器；Figure 1 is a traditional OTA comparator;
图2为本发明全差分高速低功耗比较器的结构；Fig. 2 is the structure of the fully differential high-speed low-power comparator of the present invention;
图3为本发明中的线性-非线性电流镜；Fig. 3 is the linear-nonlinear current mirror among the present invention;
图4为方波输入信号的输出延迟；Fig. 4 is the output delay of the square wave input signal;
图5为在N型开关管M12作用下流过开关管M1的电流；Fig. 5 is the current flowing through the switch tube M1 under the action of the N-type switch tube M12;
图6为本发明交流小信号的增益。Fig. 6 is the gain of the AC small signal of the present invention.
具体实施方式 Detailed ways
下面结合附图对本发明的技术方案做进一步的详细说明：Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail:
图1是传统OTA比较器电路，包括线性电流镜负载和差分放大级。在动态小信号时，交叉耦合对NMOS管M7、M8构成正反馈，增大其增益，而在动态大信号的情况下，该电路的线性电流镜并不能提供足够大的瞬态电流，而改良OTA比较器的瞬态特性。另外，静态时，该电路静态电流由固定尾电流组成，故在同样的增益、瞬态特性下，其静态功耗很大。Figure 1 is a traditional OTA comparator circuit, including a linear current mirror load and a differential amplifier stage. In the case of dynamic small signals, the cross-coupling forms positive feedback to the NMOS transistors M7 and M8 to increase their gain, while in the case of dynamic large signals, the linear current mirror of the circuit cannot provide a large enough transient current, and the improved Transient characteristics of the OTA comparator. In addition, when static, the static current of the circuit is composed of a fixed tail current, so under the same gain and transient characteristics, its static power consumption is very large.
如图2所示：本发明设计的全差分高速低功耗比较器包括开关管M1、开关管M2、开关管M4至N型开关管M12，其中开关管M1的栅极与开关管M2的栅极相连，且开关管M1的栅极与自身的漏极相连，使M1的电阻减小。开关管M2的漏极与开关管M11的漏极、反相器F1的输入级相连。开关管M6至M11的源极相连并接地，开关管M4的源极与开关管M5的源极相连,输入信号Vin1和Vin2分别与开关管M4的栅极和开关管M5的栅极相连，开关管M4的漏极与开关管M10的栅极、开关管M6的栅极，开关管M8的栅极相连，开关管M5的漏极与开关管M9的栅极、开关管M11的栅极、开关管M7的栅极相连。N型开关管M12与反相器F1的输出端相连。开关管M13的栅极和开关管M14的栅极分别连接固定电位Vbn，开关管M13的漏极与开关管M4的漏极相连，开关管M14的漏极与开关管M5的漏极相连，开关管M14的源极与开关管M8的漏极、开关管M9的漏极相连，开关管M4的源极与开关管M15的漏极相连，开关管M5的源极与开关管M16的漏极相连，尾电流恒流偏值Vbp分别连接开关管M15的栅极和开关管M16的栅极，以提供恒定的尾电流。As shown in Figure 2: the fully differential high-speed low-power comparator designed by the present invention includes a switch tube M1, a switch tube M2, a switch tube M4 to an N-type switch tube M12, wherein the grid of the switch tube M1 and the grid of the switch tube M2 The poles are connected, and the gate of the switching tube M1 is connected to its own drain, so that the resistance of M1 is reduced. The drain of the switch tube M2 is connected to the drain of the switch tube M11 and the input stage of the inverter F1. The sources of the switching tubes M6 to M11 are connected and grounded, the source of the switching tube M4 is connected to the source of the switching tube M5, the input signals Vin1 and Vin2 are respectively connected to the gate of the switching tube M4 and the gate of the switching tube M5, and the switch The drain of the tube M4 is connected to the grid of the switching tube M10, the grid of the switching tube M6, and the grid of the switching tube M8, and the drain of the switching tube M5 is connected to the grid of the switching tube M9, the grid of the switching tube M11, the switch The gate of the tube M7 is connected. The N-type switch tube M12 is connected to the output terminal of the inverter F1. The grid of the switching tube M13 and the grid of the switching tube M14 are respectively connected to a fixed potential Vbn, the drain of the switching tube M13 is connected to the drain of the switching tube M4, the drain of the switching tube M14 is connected to the drain of the switching tube M5, and the switch The source of the tube M14 is connected to the drain of the switching tube M8 and the drain of the switching tube M9, the source of the switching tube M4 is connected to the drain of the switching tube M15, and the source of the switching tube M5 is connected to the drain of the switching tube M16 , the tail current constant current bias value Vbp are respectively connected to the gate of the switch M15 and the gate of the switch M16 to provide a constant tail current.
如图3所示，本发明设计原理中所用到的线性-非线性自适应电流镜结构是在传统的电流镜基础上引入了一个开关管M13，其栅极电位Vbn为恒定偏置。在正常工作时开关管M10工作在饱和区，开关管M6的工作状态受开关管M13的控制。As shown in FIG. 3 , the linear-nonlinear adaptive current mirror structure used in the design principle of the present invention introduces a switch tube M13 on the basis of the traditional current mirror, and its gate potential Vbn is a constant bias. In normal operation, the switch tube M10 works in a saturation region, and the working state of the switch tube M6 is controlled by the switch tube M13.
电流I1恒定时，开关管M13的宽长比不变，若Vbn足够大，则开关管M13的漏极电位足够高，开关管M6工作在饱和区；若Vbn足够小，则开关管M13的漏极电位足够低，开关管M6工作在线性或深线性电阻区。此外，电流I1恒定时，保持Vbn不变，通过调节M13管的宽长比也可以控制M6管的工作状态。将M13管的宽长比调到足够大，开关管M13的过驱动电压就会相应减小，其漏极电位也就足够高，开关管M6就会工作在饱和区；将开关管M13的宽长比调到足够小，开关管M13的过驱动电压就会相应增大，其漏极电位也就足够低，开关管M6就会工作在线性电阻区。When the current I1 is constant, the width-to-length ratio of the switch tube M13 remains unchanged. If Vbn is large enough, the drain potential of the switch tube M13 is high enough, and the switch tube M6 works in the saturation region; if Vbn is small enough, the drain of the switch tube M13 The electrode potential is low enough, and the switch tube M6 works in the linear or deep linear resistance region. In addition, when the current I1 is constant, Vbn is kept constant, and the working state of the M6 tube can also be controlled by adjusting the width-to-length ratio of the M13 tube. Adjust the width-to-length ratio of the M13 tube to be large enough, the overdrive voltage of the switch tube M13 will be reduced accordingly, and its drain potential will be high enough, and the switch tube M6 will work in the saturation region; the width of the switch tube M13 will be When the length ratio is adjusted to be small enough, the overdrive voltage of the switch tube M13 will increase correspondingly, and its drain potential will be low enough, and the switch tube M6 will work in the linear resistance region.
对下面的公式中用到的部分参数做说明：μn为n沟道器件的表面迁移率，Cox为单位面积栅氧化物电容，W为有效沟道宽度，L为有效沟道长度，I1为流经开关管M1的电流，其它以此类推。VGS为栅源电压，VTN为N管的阈值电压。正常工作时开关管M6工作在线性区或深线性电阻区，开关管M13、开关管M10工作在饱和区。流过开关管M6的电流I1为：Explain some of the parameters used in the following formula: μ n is the surface mobility of n-channel devices, C ox is the gate oxide capacitance per unit area, W is the effective channel width, L is the effective channel length, I 1 is the current flowing through the switch tube M1, and so on for the others. V GS is the gate-source voltage, and V TN is the threshold voltage of the N tube. During normal operation, the switch tube M6 works in the linear region or the deep linear resistance zone, and the switch tube M13 and the switch tube M10 work in the saturation zone. The current I1 flowing through the switch tube M6 is:
开关管M6在深线性区时，VDS<<(VGS-VTN)/2，I1约等于：When the switch tube M6 is in the deep linear region, V DS <<(V GS -V TN )/2, I1 is approximately equal to:
若不考虑沟道长度调制效应，流过开关管M10的电流为：If the channel length modulation effect is not considered, the current flowing through the switch M10 is:
由(2)，(3)式可得线性-非线性电流镜的镜像电流和基准电流之间的关系为：From (2) and (3), the relationship between the mirror current and the reference current of the linear-nonlinear current mirror can be obtained as:
由(4)可知，在宽长比不变的条件下，线性-非线性电流镜比传统电流镜产生更大的镜像电流，这将大大提高比较器的输出摆率。It can be seen from (4) that under the condition of constant width-to-length ratio, the linear-nonlinear current mirror generates a larger mirror current than the traditional current mirror, which will greatly increase the output slew rate of the comparator.
该全差分高速低功耗比较器中Vbn为固定偏置，使开关管M13和开关管M14正常工作时处于饱和态。Vbp为PMOS尾电流的恒流偏置，确保流过开关管M15、开关管M16的电流不随电源电压变化，实现该比较器在电源电压变化的条件可以正常工作。电路结构中引入了线性-非线性电流镜结构，其中开关管M10、开关管M11、开关管M13、开关管M14工作在饱和区，开关管M6、开关管M7、开关管M8、开关管M9工作在线性电阻区。利用线性/非线性自适应电流镜带来的电流传输系数的倍增，提高电路跨导和比较器输出摆率，从而提高比较器的增益和速度。Vbn in the fully differential high-speed low-power comparator is a fixed bias, so that the switching tube M13 and the switching tube M14 are in a saturated state when they work normally. Vbp is the constant current bias of the PMOS tail current, which ensures that the current flowing through the switch tube M15 and the switch tube M16 does not change with the power supply voltage, so that the comparator can work normally under the condition of the power supply voltage change. A linear-nonlinear current mirror structure is introduced into the circuit structure, in which the switch tube M10, switch tube M11, switch tube M13, and switch tube M14 work in the saturation region, and the switch tube M6, switch tube M7, switch tube M8, and switch tube M9 work in the linear resistance region. The multiplication of the current transmission coefficient brought by the linear/nonlinear adaptive current mirror is used to increase the circuit transconductance and the output slew rate of the comparator, thereby increasing the gain and speed of the comparator.
当Vin1=Vin2时，流经开关管M4和开关管M5的电流大小相等。开关管M4和开关管M5管的漏极电位也相等，流过开关管M6、开关管M7、开关管M8、开关管M9管的电流分别为：When Vin1=Vin2, the currents flowing through the switch tube M4 and the switch tube M5 are equal in magnitude. The drain potentials of the switching tube M4 and the switching tube M5 are also equal, and the currents flowing through the switching tube M6, the switching tube M7, the switching tube M8, and the switching tube M9 are respectively:
若Vin1变小，则流经开关管M4的电流变大、开关管M5的电流变小，V2随之升高，V3降低,VD6降低，VD7升高。对于开关管M7，此时其漏源电压降低，且栅源电压降低，故流经开关管M7的电流I7减少，同理，流经开关管M6的电流I6增多。但由于此时VD6降低，致使V2升高，I13继续增大，进一步引起VD6下降。由I13增大，导致I14减小，V3下降，进而引起VD7、V2上升。使I8增大，但由于I14降低，导致I9减小的更多，进而引起V3进一步降低。V3、VD6下降，引起I7进一步减小，则I6进一步增大，V2进一步升高。经过一系列正反馈过程，使开关管M7和开关管M9管进入亚阈值区域。在亚阈值区域里流过开关管M7和开关管M9的电流I7、I9分别为：If Vin1 becomes smaller, the current flowing through the switch tube M4 becomes larger, the current of the switch tube M5 becomes smaller, V2 increases accordingly, V3 decreases, VD6 decreases, and VD7 increases. For the switch tube M7, the drain-source voltage and the gate-source voltage decrease at this time, so the current I 7 flowing through the switch tube M7 decreases, and similarly, the current I 6 flowing through the switch tube M6 increases. But because VD6 decreases at this time, V2 increases, and I 13 continues to increase, which further causes VD6 to decrease. The increase of I 13 leads to the decrease of I 14 , the decrease of V 3 , and the increase of VD7 and V2. Make I 8 increase, but because I 14 decreases, I 9 decreases even more, which in turn causes V 3 to further decrease. V3, VD6 decrease, causing I 7 to further decrease, then I 6 to further increase, and V2 to further increase. After a series of positive feedback processes, the switching tube M7 and the switching tube M9 enter the sub-threshold region. The currents I 7 and I 9 flowing through the switch tube M7 and the switch tube M9 in the sub-threshold region are respectively:
VD6继续降低，VD7继续升高，V3继续降低，V2继续升高，直到锁存过程结束，V3被锁存于低电位，V2锁存在高电位。经过线性-非线性电流镜作用，流过开关管M10的电流很大，流过开关管M11的电流几乎为0，致使开关管M1、开关管M2的栅极电位比较低，并使V1电位为高。比较行为结束后流过开关管M10的大电流保持不变，这就使比较器的静态功耗比较大，Vin变小的情况亦是如此。VD6 continues to decrease, VD7 continues to increase, V3 continues to decrease, and V2 continues to increase until the latch process ends, V3 is latched at low potential, and V2 is latched at high potential. After the linear-nonlinear current mirror effect, the current flowing through the switching tube M10 is very large, and the current flowing through the switching tube M11 is almost zero, so that the gate potentials of the switching tubes M1 and M2 are relatively low, and the potential of V1 is high. The large current flowing through the switch tube M10 remains unchanged after the comparison action ends, which makes the static power consumption of the comparator relatively large, and the same is true when Vin becomes smaller.
为降低比较器的静态功耗，在电路中添加一个N型N型开关管M12。利用电路输出电位V1控制N型开关管M12的状态，以控制左边路里电流的通过与否。在Vin1<Vin2时，在比较器比较结束后，V1为高，使N型开关管M12断开，这就大大降低了比较器的静态功耗。Vin1>Vin2时，开关管M1中无静态电流，N型开关管M12控制状态不受限制。同样，N型开关管M12也可以为P型，通过将比较器的输出端与偶数个反相器串联，譬如两个，即可控制M12的导通和断开。In order to reduce the static power consumption of the comparator, an N-type N-type switch tube M12 is added to the circuit. The state of the N-type switch tube M12 is controlled by the circuit output potential V1 to control whether the current in the left path passes or not. When Vin1<Vin2, after the comparison of the comparator, V1 is high, so that the N-type switch M12 is disconnected, which greatly reduces the static power consumption of the comparator. When Vin1>Vin2, there is no quiescent current in the switch tube M1, and the control state of the N-type switch tube M12 is not limited. Similarly, the N-type switch M12 can also be a P-type, and by connecting the output terminal of the comparator in series with an even number of inverters, for example two, the on and off of the M12 can be controlled.
为提高比较器输出端驱动大容性负载的能力，在比较器输出端增加了一个推挽反相器。以增大电路充放电流的能力，也可以增加一组推挽反相器，以驱动更大的容性负载。To improve the ability of the comparator output to drive large capacitive loads, a push-pull inverter is added to the comparator output. To increase the ability of the circuit to charge and discharge current, a set of push-pull inverters can also be added to drive a larger capacitive load.
为避免当V1为高时，电位不够高，导致反相器F1有静态功耗，故增加开关管M20。当V1=1，Vout=0时，M20有效，维持V1=1，当没有M20管时，此时V1为高阻态，要求倒相器尺寸大，提供大电容维持V1高电平，因此增加M20管的另外的好处是反相器尺寸可降低，因此M20管宽长比不能大。In order to avoid that when V1 is high, the potential is not high enough, resulting in static power consumption of the inverter F1, so the switch tube M20 is added. When V1=1, Vout=0, M20 is valid and maintains V1=1. When there is no M20 tube, V1 is in a high-impedance state at this time, which requires a large inverter size and provides a large capacitor to maintain the high level of V1, so increase Another advantage of the M20 tube is that the size of the inverter can be reduced, so the width-to-length ratio of the M20 tube cannot be large.
仿真结果Simulation results
在0.18μm CMOS工艺条件下，利用cadence对本发明比较器进行仿真，电源电压为3.3V，尾电流单个支路为8.85μA，比较器工作频率为10MHz。电路器件参数设计如表1所示。Under the condition of 0.18μm CMOS process, the comparator of the present invention is simulated by using cadence, the power supply voltage is 3.3V, the single branch of the tail current is 8.85μA, and the operating frequency of the comparator is 10MHz. The circuit device parameter design is shown in Table 1.
表1电路结构中各个器件的参数Table 1 The parameters of each device in the circuit structure
仿真结果表明：在tt工艺角下，比较器的延迟时间为9.69ns，功耗为58.4μW，仿真结果如图4所示，图4为方波输入信号的上升沿及下降沿的延迟。由图5可以看出，若输入信号Vin1<Vin2，在其比较过程中M1有电流通过，一旦比较结束，镜像电流就被截断，此支路静态功耗几乎为0,符合预期效果。图6为交流小信号的增益。The simulation results show that: in the tt process corner, the delay time of the comparator is 9.69ns, and the power consumption is 58.4μW. The simulation results are shown in Figure 4, which shows the delay of the rising and falling edges of the square wave input signal. It can be seen from Figure 5 that if the input signal Vin1<Vin2, current flows through M1 during the comparison process. Once the comparison is over, the mirror current is cut off, and the static power consumption of this branch is almost 0, which is in line with the expected effect. Figure 6 shows the gain of AC small signals.
性能参数对比Comparison of performance parameters
在相同工艺条件下，对传统OTA比较器和本发明的全差分高速低功耗比较器进行仿真。在元件参数均一样，电源电压为3.3V的情况下，输入占空比为50%，周期为100ns的方波信号，上升时间、下降时间均为1ns，负载电容为1pf，其性能对比如表2：Under the same process conditions, the traditional OTA comparator and the fully differential high-speed low-power comparator of the present invention are simulated. When the component parameters are the same, the power supply voltage is 3.3V, the input duty cycle is 50%, the period is 100ns square wave signal, the rise time and fall time are 1ns, and the load capacitance is 1pf, the performance comparison is shown in the table 2:
表2性能参数对比Table 2 Comparison of performance parameters
由上表可知，在同等的仿真条件下，本发明的全差分高速低功耗比较器在延时和功耗方面均优于传统OTA比较器，在差分信号为0.3V下，功耗延迟积能够降低77%。As can be seen from the above table, under the same simulation conditions, the fully differential high-speed low-power comparator of the present invention is superior to the traditional OTA comparator in terms of delay and power consumption. When the differential signal is 0.3V, the power consumption delay product Able to reduce by 77%.
虽然上述结实内容展示本发明的说明性实施例，但应注意在不脱离由所附的权利要求书所界定的本发明的范围的情形下本文中可进行各种改变及修改，如NMOS和PMOS的互换等。虽然可能以单数形式描述或主张本发明的元件，但除非明确陈述对于单数的限制，否则也可预期复数形式。While the foregoing description shows illustrative embodiments of the invention, it should be noted that various changes and modifications may be made therein without departing from the scope of the invention as defined by the appended claims, such as NMOS and PMOS exchange etc. Although elements of the invention may be described or claimed in the singular, the plural is also contemplated unless limitation to the singular is explicitly stated.
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| CN104504354A (en) * | 2014-12-04 | 2015-04-08 | 广州中大微电子有限公司 | High-performance anti-noise comparer suitable for RFID (Radio Frequency Identification Devices) and RFID chip |
| CN104796123B (en) * | 2015-04-29 | 2017-08-15 | 西安交通大学 | The non-constant biasing low-power consumption continuous time comparator of performance boost is carried out in upset point |
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| CN106026938A (en) * | 2016-05-23 | 2016-10-12 | 四川和芯微电子股份有限公司 | Fully differential comparator |
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| CN106603047A (en) * | 2016-11-23 | 2017-04-26 | 江苏进睿芯电子科技有限公司 | High-slew-rate and high-gain comparator |
| CN109379074A (en) * | 2018-11-21 | 2019-02-22 | 灿芯半导体(上海)有限公司 | A kind of level shifting circuit |
| US11128287B1 (en) | 2020-03-23 | 2021-09-21 | Analog Devices, Inc. | Comparator with configurable operating modes |
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