KR950004454A - 반도체장치 제조방법 및 기판처리방법 - Google Patents
반도체장치 제조방법 및 기판처리방법 Download PDFInfo
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- KR950004454A KR950004454A KR1019940018974A KR19940018974A KR950004454A KR 950004454 A KR950004454 A KR 950004454A KR 1019940018974 A KR1019940018974 A KR 1019940018974A KR 19940018974 A KR19940018974 A KR 19940018974A KR 950004454 A KR950004454 A KR 950004454A
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Abstract
Description
Claims (31)
- 변형점을 갖는 유리기판상에 기저막을 형성하는 단계; 상기 기저막 형성단계후 상기 유리기판의 상기 변형점보다 높은 제1온도에서 상기 유리기판을 열어닐링하는 단계; 2℃/분 이하의 속도로 상기 제1온도로 부터 상기 변형점보다 낮은 제2온도로 상기 기판을 냉각하는 단계; 상기 기저막 상에 실리콘막을 형성하는 단계; 및 상기 제1온도를 초과하지 않는 제3온도에서 상기 기판을 열어닐링하는 단계를 포함하는 반도체장치 제조방법.
- 제1항에 있어서, 상기 기저막 상에 실리콘막을 형성하는 상기 단계와 상기 제1온도를 초과하지 않는 제3온도에서 상기 기판을 열어닐링하는 상기 단계사이에서 적어도 하나의 패터닝 단계가 수행되는 방법.
- 제1항에 있어서, 결정화를 조장하기 위한 금속원소가 상기 실리콘막에 의도적으로 첨가되는 방법.
- 제1항에 있어서, 상기 기저막이 플라즈마 CVD에 의해 형성된 산화규소층, 질화규소층, 질화알루미늄층 또는 이들의 다수층을 포함하는 방법.
- 제1항에 있어서, 상기 유리기판의 상기 변형점보다 높은 제1온도에서 상기 유리기판을 열어닐링하는 상기 단계가 산화분위기 또는 질화분위기에서 수행하는 방법.
- 변형점을 갖는 유리기판상에서 기저막을 형성하는 단계; 상기 기저막 형성 단계후 상기 유리기판의 상기 변형점보다 높은 제1온도에서 상기 유리기판을 열어닐링하는 단계; 2℃/분 이하의 속도로 상기 제1온도로 부터 상기 변형점 이하의 제2온도로 상기 기판을 냉각하는 단계; 상기 기저막 상에 비단결정 실리콘 막을 형성하는 단계; 상기 실리콘막의 결정화를 조장하는 촉매원소를 상기 실리콘막과 접촉하여 선택적으로 제공하는 단계; 및 상기 실리콘막의 결정화 온도보다 30℃ 낮은 온도로 부터 상기 결정화 온도보다 30℃ 높은 온도까지의 범위내 온도에서 상기 기판을 열어닐링하는 단계를 포함하는 반도체 장치제조방법.
- 변형점을 갖는 유리기판상에 기저막을 형성하는 단계; 상기 유리기판을 1000ppm 이상 수축시키기 위해서 상기 기저막 형성 단계후 상기 변형점보다 높은 제1온도에서 상기 유리기판을 열어닐링하는 단계; 상기 기저막상에 비단결정 실리콘막을 형성하는 단계; 상기 실리콘막의 결정화를 조장하는 촉매원소를 상기 실리콘막과 접촉하여 선택적으로 제공하는 단계; 및 열어닐링에 의해 상기 촉매원소의 위치로 부터 상기 비단결정 실리콘막을 결정화하는 단계를 포함하는 반도체장치제조방법.
- 변형점을 갖는 유리기판을 준비하는 단계; 상기 유리기판의 상기 변형점보다 높은 제1온도에서 상기 유리기판을 열어닐링하는 단계; 2℃/분 이하의 속도로 상기 제1온도로 부터 상기 변형점보다 낮은 제2온도로 상기 기판을 냉각하는 단계; 상기 냉각 단계후 상기 기판상에 기저막을 형성하는 단계; 상기 제1온도보다 높지 않은 제3온도에서 상기 기판을 열 처리하는 단계를 포함하는 반도체장치제조방법.
- 8항에 있어서, 비단결정 실리콘막이 상기 제1온도보다 높지 않은 제3온도에서 상기 기판을 열처리하는 상기 단계동안 결정화되는 방법.
- 제8항에 있어서, 상기 기판상에 기저막을 형성하는 상기 단계와 상기 제1온도보다 높지 않은 제3온도에서 상기 기판을 열처리하는 상기 단계 사이에 적어도 하나의 패터닝 단계가 수행되는 방법.
- 제9항에 있어서, 결정화를 조장하기 위한 금속원소가 상기 실리콘막에 의도적으로 첨가되는 방법.
- 제8항에 있어서, 상기 기저막이 플라즈마 CVD에 의해 산화규소층, 질화규소층, 질화알루미늄층 또는 그들의 다수층을 포함하는 방법.
- 상기 유리기판의 변형점보다 높은 제1온도에서 유리기판을 열어닐링하는 단계; 상기 열어닐닝 단계후 상기 유리기판상에 기저막을 형성하는 단계; 2℃/분 이하의 속도로 상기 제1온도로 부터 상기 변형점보다 낮은 제2온도로 상기 기판을 냉각하는 단계; 상기 기저막에 비단결정 실리콘막을 형성하는 단계; 상기 실리콘막의 결정화를 조장하는 촉매원소를 상기 실리콘막과 접촉하여 선택적으로 제공하는 단계; 및 상기 실리콘막의 결정화온도보다 30℃ 낮은 온도로 부터 상기 결정화온도보다 30℃ 높은 온도까지의 범위내의 온도에서 상기 기판을 열어닐링하는 단계를 포함하는 반도체장치제조방법.
- 유리기판을 1000ppm 이상 수축시키기위하여 유리기판의 변형점보다 높은 제1온도에서 유리기판을 열어닐링하는 단계; 상기 열어닐링 단계후 상기 유리기판상에 기저막을 형성하는 단계; 상기 기저막상에 비단결정 실리콘막을 형성하는 단계; 상기 실리콘막의 결정화를 조장하는 촉매원소를 상기 실리콘막과 접촉하여 선택적으로 제공하는 단계 및 열어닐링에 의해 상기 촉매원소의 위치로 부터 상기 실리콘막을 결정화시키는 단계를 포함하는 반도체장치제조방법.
- 기판을 실질적으로 수평으로 유지하면서 상기 기판을 가열하는 단계를 포함하는 기판 열처리 방법.
- 제15항에 있어서, 상기 기판이 수평으로 부터 ±30° 내에서 유지되는 방법.
- 제15항에 있어서, 상기 기판이 변형점을 갖는 유리로 만들어지고 상기 기판이 상기 변형점보다 높게 가열되는 방법.
- 제17항에 있어서, 상기 유리기판상에 버퍼층을 형성하는 단계를 추가로 포함하는 방법.
- 제18항에 있어서, 상기 버퍼층이 산화규소로 만들어진 막인 방법.
- 제15항에 있어서, 상기 기판을 수축시키기 위하여 상기 기판을 가열하는 상기 단계후 질소, 암모니아 또는 일산화질소의 분위기에서 0.01 내지 0.5℃/분의 속도로 상기기판을 냉각하는 단계를 추가로 포함하는 방법.
- 제15항에 있어서, 상기 기판이 유리로 만들어지고, 실리콘막이 버퍼층을 경유하여 상기 유리 기판위에 형성되는 방법.
- 제21항에 있어서, 상기 실리콘막이 결정화를 조장하기 위하여 불순물로 도핑되고, 가열에 의해 결정화되는 방법.
- 제15항에 있어서, 섬형상의 실리콘막이 상기 기판상에 형성되는 방법.
- 제15항에 있어서, 실리콘막이 버퍼층을 경유하여 유리로 만들어진 상기 기판상에 형성되고, 박막 트랜지스터가 상기 실리콘막을 사용하여 형성되는 방법.
- 제15항에 있어서, 섬형상의 실리콘막이 상기 기판상에 형성되고, 상기 기판 가열단계가 상기 실리콘막상에 산화막을 형성하기 위하여 산화 분위기에서 수행되는 방법.
- 기판을 실질적으로 수평으로 유지하면서 제1온도에서 상기 기판을 가열하는 제1단계; 상기 제1단계후 상기 제1온도보다 낮은 제2온도에서 상기 기판을 가열하는 제2단계; 및 10 내지 300℃/분의 속도로 적어도 상기 기판의 변형점까지 상기 기판의 변형점까지 상기 기판을 냉각하는 단계를 포함하는 기판 열처리방법.
- 유리기판상에 반도체 장치를 제조하는 방법으로서, 상기 반도체장치의 형성전에 상기 기판을 실질적으로 수평으로 유지하면서 후에 이용되는 공정온도보다 높은 온도로 상기 유리기판을 열처리하는 단계; 및 상기 기판을 실질적으로 수평으로 유지하면서 질소, 암모니아, 또는 일산화이질소의 분위기에서 0.01 내지 0.5℃/분의 속도로 상기 유리기판을 냉각하는 단계를 포함하는 유리기판상에 반도체장치를 제조하는 방법.
- 제27항에 있어서, 상기 기판이 수평으로부터 ±30°내에 유지되는 방법.
- 유리로 만들어진 기판을 열처리하는 단계; 상기 열처리 단계후 0.01 내지 0.5℃/분의 속도로 상기 기판을 냉각하는 단계; 상기 냉각 단계후 상기 유리기판상에 비단결정 실리콘막을 형성하는 단계; 상기 실리콘막을 결정화시키기 위하여 상기 실리콘막을 결정화시키기 위하여 상기 실리콘막과 함께 상기 기판을 열처리하는 단계; 및 2℃/분을 초과하는 속도로 상기 결정화된 실리콘막과 함께 상기 기판을 냉각하는 단계를 포함하는 기판처리방법.
- 제29항에 있어서, 상기 기판을 열처리하는 상기 단계동안, 상기 기판이 실질적으로 수평으로 유지되는 방법.
- 제29항에 있어서, 상기 기판이 수평으로 부터 ±30°내에 유지되는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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-
1995
- 1995-11-03 US US08/552,678 patent/US5837619A/en not_active Expired - Lifetime
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KR100554763B1 (ko) * | 2001-01-29 | 2006-02-22 | 세이코 엡슨 가부시키가이샤 | 반도체 장치, 회로 기판, 전기 광학 장치 및 전자기기 |
US7112818B2 (en) | 2001-01-29 | 2006-09-26 | Seiko Epson Corporation | Semiconductor film transistor |
KR100742816B1 (ko) * | 2002-07-29 | 2007-07-25 | 가부시끼가이샤 도시바 | 반도체 장치 |
Also Published As
Publication number | Publication date |
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US5837619A (en) | 1998-11-17 |
KR0165140B1 (ko) | 1999-02-01 |
US5492843A (en) | 1996-02-20 |
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