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KR900013380A - 전압 제어회로 - Google Patents

전압 제어회로 Download PDF

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Publication number
KR900013380A
KR900013380A KR1019900001909A KR900001909A KR900013380A KR 900013380 A KR900013380 A KR 900013380A KR 1019900001909 A KR1019900001909 A KR 1019900001909A KR 900001909 A KR900001909 A KR 900001909A KR 900013380 A KR900013380 A KR 900013380A
Authority
KR
South Korea
Prior art keywords
voltage
channel mos
series
substrate
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019900001909A
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English (en)
Other versions
KR940001251B1 (ko
Inventor
마코토 이토
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR900013380A publication Critical patent/KR900013380A/ko
Application granted granted Critical
Publication of KR940001251B1 publication Critical patent/KR940001251B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205Substrate bias-voltage generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073Charge pumps of the Schenkel-type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/819Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Dc-Dc Converters (AREA)

Abstract

내용 없음

Description

전압 제어회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 전압 제어회로가 내장된 반도체집적회로의 일부를 나타낸 구성설명도,
제2도는 제1도중의 전압제어회로의 1실시예를 나타낸 회로도.

Claims (3)

  1. 반도체집적회로에 설치된 전압발생회로의 전압출력단(a)과 기준전위단(1)의 사이에 복수개의 P채널 MOS트랜지스터〔P2-P(n-1)〕가 직렬접속되고, 이 각 P채널 MOS트랜지스터〔P2-P(n-1)〕는 가각 소오스 · 기판이 서로 접속됨과 더불어 각각 게이트 · 드레인이 서로 접속되어 있는 것을 특징으로 하는 전압제어회로.
  2. 제1항에 있어서, 상기 전압발생회로의 전압출력단(a)과 상기 직렬접속된 복수개의 P채널 MOS트랜지스터〔P2-P(n-1)〕의 일단측과의 사이에 소오스 · 기판이 서로 접속됨과 더불어 그 게이트에 상기 제어대상인 전압발생회로의 활성화제어신호(EN)에 동기되어 활성화제어신호(EN)가 공급되는 1개의 P채널 MOS트랜지스터(P1)가 삽입되어 있는 것을 특징으로 하는 전압제어회로.
  3. 제1항 또는 제2항에 있어서, 상기 직렬접속된 복수개의 P채널 MOS트랜지스터〔P2-P(n-1)〕의 다른단측과 상기 전압발생회로의 기준전위단(1)의 사이에 기판 · 게이트 · 드레인이 서로 접속되어 있는 1개의 P채널 MOS트랜지스터(Pn)나 1개의 다이오드가 삽입되어 있는 것을 특징으로 하는 전압제어회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900001909A 1989-02-16 1990-02-16 전압 제어회로 Expired - Fee Related KR940001251B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1036479A JPH02215154A (ja) 1989-02-16 1989-02-16 電圧制御回路
JP01-036479 1989-02-16

Publications (2)

Publication Number Publication Date
KR900013380A true KR900013380A (ko) 1990-09-05
KR940001251B1 KR940001251B1 (ko) 1994-02-18

Family

ID=12470952

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900001909A Expired - Fee Related KR940001251B1 (ko) 1989-02-16 1990-02-16 전압 제어회로

Country Status (5)

Country Link
US (1) US5029282A (ko)
EP (1) EP0382929B1 (ko)
JP (1) JPH02215154A (ko)
KR (1) KR940001251B1 (ko)
DE (1) DE68917900T2 (ko)

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Also Published As

Publication number Publication date
DE68917900D1 (de) 1994-10-06
KR940001251B1 (ko) 1994-02-18
DE68917900T2 (de) 1995-02-02
EP0382929B1 (en) 1994-08-31
US5029282A (en) 1991-07-02
EP0382929A2 (en) 1990-08-22
JPH02215154A (ja) 1990-08-28
EP0382929A3 (en) 1990-09-26

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