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KR880014438A - Cmos 직접회로 - Google Patents

Cmos 직접회로 Download PDF

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Publication number
KR880014438A
KR880014438A KR1019880006148A KR880006148A KR880014438A KR 880014438 A KR880014438 A KR 880014438A KR 1019880006148 A KR1019880006148 A KR 1019880006148A KR 880006148 A KR880006148 A KR 880006148A KR 880014438 A KR880014438 A KR 880014438A
Authority
KR
South Korea
Prior art keywords
transistor
integrated circuit
junction
width
diode
Prior art date
Application number
KR1019880006148A
Other languages
English (en)
Other versions
KR960013760B1 (ko
Inventor
요세피우스 마리아 벤드릭 헨드리쿠스
게라르두스 레오나르두스 마리아 반 데르산덴 코르네리스
Original Assignee
이반 밀러 레르너
엔.브이.필립스 글로아이람펜파브리켄
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이반 밀러 레르너, 엔.브이.필립스 글로아이람펜파브리켄 filed Critical 이반 밀러 레르너
Publication of KR880014438A publication Critical patent/KR880014438A/ko
Application granted granted Critical
Publication of KR960013760B1 publication Critical patent/KR960013760B1/ko

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dc-Dc Converters (AREA)

Abstract

내용 없음

Description

CMOS 집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 기저(Suvstrate)바이어스 전압 발생기의 도시도.

Claims (5)

  1. 외부의 클럭 발생기에 의해 구동되고, 집적회로내의 다른 회로를 제어하는 기저 바이어스 전압 발생기를 구비하는 CMOS 집적회로에 있어서, 기저 바이어스 전압과 기준 전압의 비교를 위한 비교 회로의 출력에 의해 구동되는 스위칭 수단에 의해 켜지는 집적 발진기에 의해 구동되는 다른 저 바이어스 전압 펌프를 포함하는 것을 특징으로 하는 CMOS 집적회로.
  2. 제1항에 있어서, 집적 발진기는 스위칭 수단과 함께 NOR 게이트로 구성되는 다수의 직렬 접속된 인버터단의 링 발진기인 것을 특징으로 하는 CMOS 집적회로.
  3. 제 1 또는 2항에 있어서, 비교 회로는 PMOS 트랜지스터, NMOS 트랜지스터 및 양의 공급 전압 및 기저 전압 사이에 포함된 다이오드로서 접속된 제2PMOS 트랜지스터의 직렬 조합과 인버터로 구성되는데, 제1PMOS 트랜지스터 및 NMOS 트랜지스터는 게이트 전극에 의해 접속되고, 드레인의 접합점은 인버터의 입력에 접속되며, 상기 다이오드는 NMOS 트랜지스터와 기판 사이에 접속되어 있는 것을 특징으로 하는 CMOS 집적회로.
  4. 제1접합점과 발진기의 출력 사이의 커패시턴스, 제1접합점과 접지 사이에 다이오드로서 접속된 제1NMOS 트랜지스터 및 제1접합점과 기관 사이에 다이오드로서 접속된 제2NMOS 트랜지스터를 포함한 기저바이어스 전압 발생기를 구비한 CMOS 집적회로에 있어서, 제2트랜지스터의 넓이/길이 비가 제1트랜지스터의 넓이/길이 비보다 매우 큰 것을 특징으로 하는 CMOS 집적회로.
  5. 제4항에 있어서, 제2트랜지스터의 넓이/길이 비가 제1트랜지스터의 넓이/길이 비보다 계수 5만큼 큰 것을 특징으로 하는 CMOS 집접 회로.
    ※ 참고사항：최초출원 내용에 의하여 공개하는 것임.
KR1019880006148A 1987-05-29 1988-05-26 Cmos 집적 회로 KR960013760B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8701278 1987-05-29
NL8701278A NL8701278A (nl) 1987-05-29 1987-05-29 Geintegreerde cmos-schakeling met een substraatvoorspanningsgenerator.

Publications (2)

Publication Number Publication Date
KR880014438A true KR880014438A (ko) 1988-12-23
KR960013760B1 KR960013760B1 (ko) 1996-10-10

Family

ID=19850082

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880006148A KR960013760B1 (ko) 1987-05-29 1988-05-26 Cmos 집적 회로

Country Status (6)

Country Link
US (1) US4820936A (ko)
EP (1) EP0293045B1 (ko)
JP (1) JPS63307771A (ko)
KR (1) KR960013760B1 (ko)
DE (1) DE3880735T2 (ko)
NL (1) NL8701278A (ko)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5140177A (en) * 1988-12-02 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Complementary circuit device returnable to normal operation from latch-up phenomenon
JPH0783254B2 (ja) * 1989-03-22 1995-09-06 株式会社東芝 半導体集積回路
JPH04129264A (ja) * 1990-09-20 1992-04-30 Fujitsu Ltd 半導体集積回路
US5081371A (en) * 1990-11-07 1992-01-14 U.S. Philips Corp. Integrated charge pump circuit with back bias voltage reduction
US5117125A (en) * 1990-11-19 1992-05-26 National Semiconductor Corp. Logic level control for impact ionization sensitive processes
US5162668A (en) * 1990-12-14 1992-11-10 International Business Machines Corporation Small dropout on-chip voltage regulators with boosted power supply
JP2902804B2 (ja) * 1991-04-08 1999-06-07 株式会社東芝 基板バイアス電圧発生回路
US5146110A (en) * 1991-05-22 1992-09-08 Samsung Electronics Co., Ltd. Semiconductor memory with substrate voltage generating circuit for removing unwanted substrate current during precharge cycle memory mode of operation
WO1993009592A1 (en) * 1991-10-30 1993-05-13 Xilinx, Inc. Regulator for pumped voltage generator
JP2937591B2 (ja) * 1991-12-09 1999-08-23 沖電気工業株式会社 基板バイアス発生回路
KR950002015B1 (ko) * 1991-12-23 1995-03-08 삼성전자주식회사 하나의 오실레이터에 의해 동작되는 정전원 발생회로
US5347172A (en) * 1992-10-22 1994-09-13 United Memories, Inc. Oscillatorless substrate bias generator
KR0124046B1 (ko) * 1993-11-18 1997-11-25 김광호 반도체메모리장치의 승압레벨 감지회로
JPH07322606A (ja) * 1994-05-27 1995-12-08 Sony Corp 昇圧回路及びこれを用いた固体撮像装置
US5731736A (en) * 1995-06-30 1998-03-24 Dallas Semiconductor Charge pump for digital potentiometers
JPH09162713A (ja) * 1995-12-11 1997-06-20 Mitsubishi Electric Corp 半導体集積回路
CH691010A5 (fr) * 1997-01-09 2001-03-30 Asulab Sa Appareil électrique fonctionnant à l'aide d'une source photovoltaïque, notamment pièce d'horlogerie.
DE69805011T2 (de) * 1997-01-09 2002-12-12 Asulab S.A., Marin Mit photovoltaischer Zelle funktionierendes elektronisches Gerät, insbesondere Zeitmesswerk
US6014053A (en) * 1997-05-12 2000-01-11 Philips Electronics North America Corporation Amplifier MOS biasing circuit for a avoiding latch-up
KR100505597B1 (ko) * 1998-03-17 2005-10-12 삼성전자주식회사 래치업을억제하는벌크바이어스전압발생회로및그발생방법
US6141200A (en) * 1998-04-20 2000-10-31 International Business Machines Corporation Stacked PFET off-chip driver with a latch bias generator for overvoltage protection
US6140630A (en) * 1998-10-14 2000-10-31 Micron Technology, Inc. Vcc pump for CMOS imagers
US6825878B1 (en) 1998-12-08 2004-11-30 Micron Technology, Inc. Twin P-well CMOS imager
US7709777B2 (en) * 2003-06-16 2010-05-04 Micron Technology, Inc. Pumps for CMOS imagers
US7061296B2 (en) * 2003-12-19 2006-06-13 Infineon Technologies Ag Circuit arrangement for generating a digital clock signal
FR2896057A1 (fr) * 2006-01-12 2007-07-13 St Microelectronics Sa Procede et dispositif de generation d'un nombre aleatoire dans un peripherique usb
US8638135B2 (en) * 2011-10-13 2014-01-28 Freescale Semiconductor, Inc. Integrated circuit having latch-up recovery circuit
US10516385B2 (en) 2017-03-31 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Ring oscillator, controlling circuit and methods for realignment
US10461723B2 (en) * 2017-11-30 2019-10-29 Taiwan Semiconductor Manufacturing Co., Ltd. Full range realignment ring oscillator

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4142114A (en) * 1977-07-18 1979-02-27 Mostek Corporation Integrated circuit with threshold regulation
JPS5559756A (en) * 1978-10-30 1980-05-06 Fujitsu Ltd Semiconductor device
JPS55107255A (en) * 1979-02-12 1980-08-16 Mitsubishi Electric Corp Substrate potential generating circuit device
DE2966592D1 (en) * 1979-03-05 1984-03-01 Motorola Inc Substrate bias regulator
JPS5632758A (en) * 1979-08-27 1981-04-02 Fujitsu Ltd Substrate bias generating circuit
JPS6033314B2 (ja) * 1979-11-22 1985-08-02 富士通株式会社 基板バイアス電圧発生回路
JPS5785253A (en) * 1980-11-17 1982-05-27 Toshiba Corp Semiconductor device
JPS57186351A (en) * 1981-05-12 1982-11-16 Fujitsu Ltd Semiconductor device
JPS57193054A (en) * 1981-05-22 1982-11-27 Fujitsu Ltd Substrate bias generating circuit
US4439692A (en) * 1981-12-07 1984-03-27 Signetics Corporation Feedback-controlled substrate bias generator
JPS5965467A (ja) * 1982-10-06 1984-04-13 Matsushita Electronics Corp 基板電位発生回路
JPS59193056A (ja) * 1983-04-15 1984-11-01 Hitachi Ltd 基板バイアス電圧発生回路

Also Published As

Publication number Publication date
US4820936A (en) 1989-04-11
NL8701278A (nl) 1988-12-16
EP0293045B1 (en) 1993-05-05
EP0293045A1 (en) 1988-11-30
KR960013760B1 (ko) 1996-10-10
DE3880735D1 (de) 1993-06-09
DE3880735T2 (de) 1993-11-11
JPS63307771A (ja) 1988-12-15

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