[go: up one dir, main page]

KR900010950A - 기판으로부터 전기절연된 반도체막의 제조방법 - Google Patents

기판으로부터 전기절연된 반도체막의 제조방법

Info

Publication number
KR900010950A
KR900010950A KR1019890017960A KR890017960A KR900010950A KR 900010950 A KR900010950 A KR 900010950A KR 1019890017960 A KR1019890017960 A KR 1019890017960A KR 890017960 A KR890017960 A KR 890017960A KR 900010950 A KR900010950 A KR 900010950A
Authority
KR
South Korea
Prior art keywords
substrate
manufacturing
semiconductor film
electrically insulating
insulating semiconductor
Prior art date
Application number
KR1019890017960A
Other languages
English (en)
Other versions
KR930004714B1 (ko
Inventor
다까시 에시다
Original Assignee
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰 가부시끼가이샤 filed Critical 후지쓰 가부시끼가이샤
Publication of KR900010950A publication Critical patent/KR900010950A/ko
Application granted granted Critical
Publication of KR930004714B1 publication Critical patent/KR930004714B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/7602Making of isolation regions between components between components manufactured in an active substrate comprising SiC compounds
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/035Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon carbide [SiC] technology
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/135Removal of substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
KR1019890017960A 1988-12-06 1989-12-05 기판으로부터 전기절연된 반도체막의 제조방법 KR930004714B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP88-309070 1988-12-06
JP63309070A JP2680083B2 (ja) 1988-12-06 1988-12-06 半導体基板及びその製造方法

Publications (2)

Publication Number Publication Date
KR900010950A true KR900010950A (ko) 1990-07-11
KR930004714B1 KR930004714B1 (ko) 1993-06-03

Family

ID=17988521

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890017960A KR930004714B1 (ko) 1988-12-06 1989-12-05 기판으로부터 전기절연된 반도체막의 제조방법

Country Status (5)

Country Link
US (1) US4997787A (ko)
EP (1) EP0372412B1 (ko)
JP (1) JP2680083B2 (ko)
KR (1) KR930004714B1 (ko)
DE (1) DE68921559T2 (ko)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0574669A (ja) * 1991-09-18 1993-03-26 Rohm Co Ltd 半導体装置の製造方法
JP3058954B2 (ja) * 1991-09-24 2000-07-04 ローム株式会社 絶縁層の上に成長層を有する半導体装置の製造方法
US6344663B1 (en) * 1992-06-05 2002-02-05 Cree, Inc. Silicon carbide CMOS devices
US5581712A (en) * 1994-11-17 1996-12-03 Intel Corporation Method and apparatus for managing live insertion of CPU and I/O boards into a computer system
US5563428A (en) * 1995-01-30 1996-10-08 Ek; Bruce A. Layered structure of a substrate, a dielectric layer and a single crystal layer
US6303508B1 (en) 1999-12-16 2001-10-16 Philips Electronics North America Corporation Superior silicon carbide integrated circuits and method of fabricating
EP1401021A4 (en) * 2001-05-25 2008-03-26 Mitsubishi Electric Corp Power semiconductor device
EP2398049A3 (en) * 2003-08-22 2012-12-19 The Kansai Electric Power Co., Inc. Semiconductor device and method of producing the same, and power conversion apparatus incorporating this semiconductor device
JP2006237125A (ja) * 2005-02-23 2006-09-07 Kansai Electric Power Co Inc:The バイポーラ型半導体装置の運転方法およびバイポーラ型半導体装置
EP2033212B1 (en) 2006-06-29 2013-10-16 Cree, Inc. Method of forming a silicon carbide pmos device
US7728402B2 (en) 2006-08-01 2010-06-01 Cree, Inc. Semiconductor devices including schottky diodes with controlled breakdown
US8432012B2 (en) 2006-08-01 2013-04-30 Cree, Inc. Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same
KR101529331B1 (ko) 2006-08-17 2015-06-16 크리 인코포레이티드 고전력 절연 게이트 바이폴라 트랜지스터
US8835987B2 (en) 2007-02-27 2014-09-16 Cree, Inc. Insulated gate bipolar transistors including current suppressing layers
US8294507B2 (en) 2009-05-08 2012-10-23 Cree, Inc. Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits
US8193848B2 (en) 2009-06-02 2012-06-05 Cree, Inc. Power switching devices having controllable surge current capabilities
US8629509B2 (en) 2009-06-02 2014-01-14 Cree, Inc. High voltage insulated gate bipolar transistors with minority carrier diverter
US8541787B2 (en) 2009-07-15 2013-09-24 Cree, Inc. High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability
US8354690B2 (en) 2009-08-31 2013-01-15 Cree, Inc. Solid-state pinch off thyristor circuits
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US8415671B2 (en) 2010-04-16 2013-04-09 Cree, Inc. Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices
US9029945B2 (en) 2011-05-06 2015-05-12 Cree, Inc. Field effect transistor devices with low source resistance
US9142662B2 (en) 2011-05-06 2015-09-22 Cree, Inc. Field effect transistor devices with low source resistance
US9640617B2 (en) 2011-09-11 2017-05-02 Cree, Inc. High performance power module
US9373617B2 (en) 2011-09-11 2016-06-21 Cree, Inc. High current, low switching loss SiC power module
JP2014531752A (ja) 2011-09-11 2014-11-27 クリー インコーポレイテッドCree Inc. 改善したレイアウトを有するトランジスタを備える高電流密度電力モジュール
US10120424B2 (en) * 2017-01-19 2018-11-06 Intel Corporation Conductive stress-relief washers in microelectronic assemblies

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1439822A (en) * 1973-02-06 1976-06-16 Standard Telephones Cables Ltd Gallium arsenide photocathodes
US4142925A (en) * 1978-04-13 1979-03-06 The United States Of America As Represented By The Secretary Of The Army Method of making silicon-insulator-polysilicon infrared image device utilizing epitaxial deposition and selective etching
US4512825A (en) * 1983-04-12 1985-04-23 The United States Of America As Represented By The Secretary Of The Navy Recovery of fragile layers produced on substrates by chemical vapor deposition
WO1987006060A1 (en) * 1986-03-28 1987-10-08 Fairchild Semiconductor Corporation Method for joining two or more wafers and the resulting structure
US4891329A (en) * 1988-11-29 1990-01-02 University Of North Carolina Method of forming a nonsilicon semiconductor on insulator structure

Also Published As

Publication number Publication date
DE68921559T2 (de) 1995-11-02
JP2680083B2 (ja) 1997-11-19
EP0372412A1 (en) 1990-06-13
KR930004714B1 (ko) 1993-06-03
EP0372412B1 (en) 1995-03-08
DE68921559D1 (de) 1995-04-13
JPH02154417A (ja) 1990-06-13
US4997787A (en) 1991-03-05

Similar Documents

Publication Publication Date Title
KR900010950A (ko) 기판으로부터 전기절연된 반도체막의 제조방법
DE3071589D1 (en) Method for forming an insulating film on a semiconductor substrate surface
KR850004353A (ko) 반도체 집적회로 장치의 제조방법
DE69738278D1 (de) Herstellungsverfahren von einem dünnen Halbleiterfilm, der elektronische Anordnungen enthält
KR910017562A (ko) 반도체 기판에 형성된 절연체를 평탄화시키는 방법 및 장치
DE69111929D1 (de) Halbleiteranordnung auf einem dielektrischen isolierten Substrat.
KR890004408A (ko) 반도체장치 제조시에 기판상에 형성되는 레지스트층의 애슁법
KR920003834A (ko) 반도체 집적회로 장치의 제어방법
KR900008918A (ko) 배선기판과 그 제조방법, 박막 캐리어, 반도체 장치 및 그 장착구조와 반도체 장치장착 방법
DE68923894D1 (de) Halbleitersubstrat mit dielektrischer Isolierung.
KR890015366A (ko) 반도체 박막형성법
KR860005566A (ko) 기판에 도전회로를 형성하는 방법
KR910003762A (ko) 게터링 시이트를 가진 절연체위에 반도체를 구비한 구조의 기판과 그 제조방법
AU583423B2 (en) Semiconductor device free from the electrical shortage through a semiconductor layer and method for manufacturing same
JPS56140646A (en) Method of manufacturing semiconductor circuit on semiconductor silicon substrate
KR870005450A (ko) 반도체층을 통한 전기적 단락이 없는 반도체 장치와 그 제조방법
KR840009181A (ko) 반도체 장치의 제조방법
KR890016649A (ko) 박막 저항 소자를 가진 반도체 장치 제조 방법
KR860008699A (ko) 마이크로 전자회로를 위한 세라믹 기판의 제조방법
KR900008697A (ko) 반도체 웨이퍼 제조방법
FR2638893B1 (fr) Substrat electriquement isolant
EP0042175A3 (en) Semiconductor device having a semiconductor layer formed on an insulating substrate and method for making the same
EP0415336A3 (en) Method for manufacturing thick film circuit substrate
KR870004737A (ko) 두꺼운 필름의 전기 성분 제조 공정
KR850005729A (ko) 반도체 장치의 제조방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19891205

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19891205

Comment text: Request for Examination of Application

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19921116

Patent event code: PE09021S01D

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

Comment text: Decision on Publication of Application

Patent event code: PG16051S01I

Patent event date: 19930510

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19930823

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19931112

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19931111

End annual number: 3

Start annual number: 1

PR1001 Payment of annual fee

Payment date: 19960517

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 19970527

Start annual number: 5

End annual number: 5

PR1001 Payment of annual fee

Payment date: 19980526

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 19990518

Start annual number: 7

End annual number: 7

PR1001 Payment of annual fee

Payment date: 20000524

Start annual number: 8

End annual number: 8

PR1001 Payment of annual fee

Payment date: 20010524

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20020522

Start annual number: 10

End annual number: 10

FPAY Annual fee payment

Payment date: 20030523

Year of fee payment: 11

PR1001 Payment of annual fee

Payment date: 20030523

Start annual number: 11

End annual number: 11

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee