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KR890700922A - 반도체 장치와 그 제조방법 - Google Patents

반도체 장치와 그 제조방법

Info

Publication number
KR890700922A
KR890700922A KR1019880701119A KR880701119A KR890700922A KR 890700922 A KR890700922 A KR 890700922A KR 1019880701119 A KR1019880701119 A KR 1019880701119A KR 880701119 A KR880701119 A KR 880701119A KR 890700922 A KR890700922 A KR 890700922A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
KR1019880701119A
Other languages
English (en)
Other versions
KR960011862B1 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR890700922A publication Critical patent/KR890700922A/ko
Application granted granted Critical
Publication of KR960011862B1 publication Critical patent/KR960011862B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR88701119A 1987-01-30 1988-09-16 Semiconductor device and method of fabricating the same KR960011862B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1244587 1987-01-30
JP62241932A JPS63308386A (ja) 1987-01-30 1987-09-25 半導体装置とその製造方法
PCT/JP1988/000078 WO1988005961A1 (fr) 1987-01-30 1988-01-29 Dispositif a semi-conducteurs et procede de production

Publications (2)

Publication Number Publication Date
KR890700922A true KR890700922A (ko) 1989-04-28
KR960011862B1 KR960011862B1 (en) 1996-09-03

Family

ID=26348070

Family Applications (1)

Application Number Title Priority Date Filing Date
KR88701119A KR960011862B1 (en) 1987-01-30 1988-09-16 Semiconductor device and method of fabricating the same

Country Status (6)

Country Link
US (1) US4980308A (ko)
EP (1) EP0299087B1 (ko)
JP (1) JPS63308386A (ko)
KR (1) KR960011862B1 (ko)
DE (1) DE3888885T2 (ko)
WO (1) WO1988005961A1 (ko)

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JPH0344067A (ja) * 1989-07-11 1991-02-25 Nec Corp 半導体基板の積層方法
US5629218A (en) * 1989-12-19 1997-05-13 Texas Instruments Incorporated Method for forming a field-effect transistor including a mask body and source/drain contacts
US5198379A (en) * 1990-04-27 1993-03-30 Sharp Kabushiki Kaisha Method of making a MOS thin film transistor with self-aligned asymmetrical structure
EP0457596B1 (en) * 1990-05-17 1995-12-06 Sharp Kabushiki Kaisha Process for fabricating a thin film transistor
JP2621642B2 (ja) * 1990-11-13 1997-06-18 日本電気株式会社 半導体装置およびその製造方法
US5347154A (en) * 1990-11-15 1994-09-13 Seiko Instruments Inc. Light valve device using semiconductive composite substrate
US5618739A (en) * 1990-11-15 1997-04-08 Seiko Instruments Inc. Method of making light valve device using semiconductive composite substrate
US5206749A (en) * 1990-12-31 1993-04-27 Kopin Corporation Liquid crystal display having essentially single crystal transistors pixels and driving circuits
US5362671A (en) * 1990-12-31 1994-11-08 Kopin Corporation Method of fabricating single crystal silicon arrayed devices for display panels
US5376561A (en) * 1990-12-31 1994-12-27 Kopin Corporation High density electronic circuit modules
US5258320A (en) * 1990-12-31 1993-11-02 Kopin Corporation Single crystal silicon arrayed devices for display panels
US5444557A (en) * 1990-12-31 1995-08-22 Kopin Corporation Single crystal silicon arrayed devices for projection displays
US5751261A (en) * 1990-12-31 1998-05-12 Kopin Corporation Control system for display panels
US5258325A (en) * 1990-12-31 1993-11-02 Kopin Corporation Method for manufacturing a semiconductor device using a circuit transfer film
US5661371A (en) * 1990-12-31 1997-08-26 Kopin Corporation Color filter system for light emitting display panels
US5528397A (en) * 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
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JP2777942B2 (ja) * 1991-11-07 1998-07-23 富士通株式会社 Ｍｏｓトランジスタの製造方法
US5273921A (en) * 1991-12-27 1993-12-28 Purdue Research Foundation Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor
US5366924A (en) * 1992-03-16 1994-11-22 At&T Bell Laboratories Method of manufacturing an integrated circuit including planarizing a wafer
US5234860A (en) * 1992-03-19 1993-08-10 Eastman Kodak Company Thinning of imaging device processed wafers
US5213990A (en) * 1992-04-01 1993-05-25 Texas Instruments, Incorporated Method for forming a stacked semiconductor structure
US5315143A (en) * 1992-04-28 1994-05-24 Matsushita Electric Industrial Co., Ltd. High density integrated semiconductor device
US5227313A (en) * 1992-07-24 1993-07-13 Eastman Kodak Company Process for making backside illuminated image sensors
US5318916A (en) * 1992-07-31 1994-06-07 Research Triangle Institute Symmetric self-aligned processing
JPH0677447A (ja) * 1992-08-26 1994-03-18 Seiko Instr Inc 半導体薄膜素子の製造方法
JPH06252400A (ja) * 1992-12-28 1994-09-09 Sony Corp 横型絶縁ゲート型電界効果トランジスタの製法
US5591678A (en) * 1993-01-19 1997-01-07 He Holdings, Inc. Process of manufacturing a microelectric device using a removable support substrate and etch-stop
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
KR940018962A (ko) * 1993-01-29 1994-08-19 이헌조 알루미나를 이용한 수직형 박막 트랜지스터 제조방법
US6004865A (en) * 1993-09-06 1999-12-21 Hitachi, Ltd. Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
JP3488730B2 (ja) * 1993-11-05 2004-01-19 株式会社ルネサステクノロジ 半導体集積回路装置
JPH07335907A (ja) * 1994-06-14 1995-12-22 Sony Corp Ｓｏｉ基板に形成したｃｍｏｓトランジスタおよびそのｓｏｉ基板の製造方法
US5497019A (en) * 1994-09-22 1996-03-05 The Aerospace Corporation Silicon-on-insulator gate-all-around MOSFET devices and fabrication methods
US5705405A (en) * 1994-09-30 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of making the film transistor with all-around gate electrode
JP4319251B2 (ja) * 1994-11-22 2009-08-26 エヌエックスピー ビー ヴィ 半導体素子を有し導体トラックが形成されている基板が接着層により結合されている支持本体を有する半導体装置
JP3512496B2 (ja) * 1994-11-25 2004-03-29 株式会社半導体エネルギー研究所 Ｓｏｉ型半導体集積回路の作製方法
DE69525739T2 (de) * 1994-12-23 2002-10-02 Koninklijke Philips Electronics N.V., Eindhoven Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind
US5674758A (en) * 1995-06-06 1997-10-07 Regents Of The University Of California Silicon on insulator achieved using electrochemical etching
DE69700241T2 (de) * 1996-03-01 1999-11-04 Mitsubishi Denki K.K., Tokio/Tokyo Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden
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US5811322A (en) * 1996-07-15 1998-09-22 W. L. Gore & Associates, Inc. Method of making a broadband backside illuminated MESFET with collecting microlens
KR100267013B1 (ko) * 1998-05-27 2000-09-15 윤종용 반도체 장치 및 그의 제조 방법
US6982460B1 (en) * 2000-07-07 2006-01-03 International Business Machines Corporation Self-aligned gate MOSFET with separate gates
TW490745B (en) * 2000-05-15 2002-06-11 Ibm Self-aligned double gate MOSFET with separate gates
US6759282B2 (en) * 2001-06-12 2004-07-06 International Business Machines Corporation Method and structure for buried circuits and devices
US6753239B1 (en) * 2003-04-04 2004-06-22 Xilinx, Inc. Bond and back side etchback transistor fabrication process
TWI248681B (en) * 2004-03-29 2006-02-01 Imec Inter Uni Micro Electr Method for fabricating self-aligned source and drain contacts in a double gate FET with controlled manufacturing of a thin Si or non-Si channel
JP2006120726A (ja) * 2004-10-19 2006-05-11 Seiko Epson Corp 薄膜装置の製造方法、電気光学装置、及び電子機器
US7354809B2 (en) * 2006-02-13 2008-04-08 Wisconsin Alumi Research Foundation Method for double-sided processing of thin film transistors
US7960218B2 (en) 2006-09-08 2011-06-14 Wisconsin Alumni Research Foundation Method for fabricating high-speed thin-film transistors
DK2164347T3 (en) * 2007-07-10 2016-09-26 Dsm Ip Assets Bv autolysates
US11876011B2 (en) * 2010-11-18 2024-01-16 Monolithic 3D Inc. 3D semiconductor device and structure with single-crystal layers
US20230352333A1 (en) * 2010-11-18 2023-11-02 Monolithic 3D Inc. 3d semiconductor devices and structures with at least two single-crystal layers
US12136562B2 (en) * 2010-11-18 2024-11-05 Monolithic 3D Inc. 3D semiconductor device and structure with single-crystal layers
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Also Published As

Publication number Publication date
DE3888885T2 (de) 1994-11-03
EP0299087A4 (en) 1989-06-13
EP0299087A1 (en) 1989-01-18
EP0299087B1 (en) 1994-04-06
JPS63308386A (ja) 1988-12-15
US4980308A (en) 1990-12-25
KR960011862B1 (en) 1996-09-03
WO1988005961A1 (fr) 1988-08-11
DE3888885D1 (de) 1994-05-11

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