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KR101603971B1 - 기판 처리 장치 및 기판 처리 방법 - Google Patents

기판 처리 장치 및 기판 처리 방법 Download PDF

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Publication number
KR101603971B1
KR101603971B1 KR1020140097244A KR20140097244A KR101603971B1 KR 101603971 B1 KR101603971 B1 KR 101603971B1 KR 1020140097244 A KR1020140097244 A KR 1020140097244A KR 20140097244 A KR20140097244 A KR 20140097244A KR 101603971 B1 KR101603971 B1 KR 101603971B1
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KR
South Korea
Prior art keywords
process gas
substrate
gas
hole
layer
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KR1020140097244A
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English (en)
Korean (ko)
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KR20160015454A (ko
Inventor
신평수
Original Assignee
피에스케이 주식회사
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Application filed by 피에스케이 주식회사 filed Critical 피에스케이 주식회사
Priority to KR1020140097244A priority Critical patent/KR101603971B1/ko
Priority to JP2014164897A priority patent/JP5972324B2/ja
Priority to CN201410413061.0A priority patent/CN105321846B/zh
Priority to TW103129201A priority patent/TWI559398B/zh
Publication of KR20160015454A publication Critical patent/KR20160015454A/ko
Application granted granted Critical
Publication of KR101603971B1 publication Critical patent/KR101603971B1/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/016—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including vertical IGFETs

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020140097244A 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법 Active KR101603971B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020140097244A KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법
JP2014164897A JP5972324B2 (ja) 2014-07-30 2014-08-13 基板処理装置及び基板処理方法
CN201410413061.0A CN105321846B (zh) 2014-07-30 2014-08-20 基板处理装置及基板处理方法
TW103129201A TWI559398B (zh) 2014-07-30 2014-08-25 基板處理裝置及基板處理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020140097244A KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법

Publications (2)

Publication Number Publication Date
KR20160015454A KR20160015454A (ko) 2016-02-15
KR101603971B1 true KR101603971B1 (ko) 2016-03-17

Family

ID=55248970

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020140097244A Active KR101603971B1 (ko) 2014-07-30 2014-07-30 기판 처리 장치 및 기판 처리 방법

Country Status (4)

Country Link
JP (1) JP5972324B2 (zh)
KR (1) KR101603971B1 (zh)
CN (1) CN105321846B (zh)
TW (1) TWI559398B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111115561B (zh) * 2019-12-05 2023-05-12 中国科学院微电子研究所 一种微纳通孔的制备方法及具有微纳通孔的结构
KR102540773B1 (ko) * 2021-01-19 2023-06-12 피에스케이 주식회사 패러데이 실드 및 기판 처리 장치

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100558922B1 (ko) * 2004-12-16 2006-03-10 (주)퓨전에이드 박막 증착장치 및 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0793366B2 (ja) * 1984-10-08 1995-10-09 日本電信電話株式会社 半導体メモリおよびその製造方法
US5413670A (en) * 1993-07-08 1995-05-09 Air Products And Chemicals, Inc. Method for plasma etching or cleaning with diluted NF3
US6296780B1 (en) * 1997-12-08 2001-10-02 Applied Materials Inc. System and method for etching organic anti-reflective coating from a substrate
KR100807223B1 (ko) * 2006-07-12 2008-02-28 삼성전자주식회사 상변화 물질층, 상변화 물질층 형성 방법 및 이를 이용한상변화 메모리 장치의 제조 방법
JP2010177652A (ja) * 2009-02-02 2010-08-12 Toshiba Corp 半導体装置の製造方法
KR101573697B1 (ko) * 2009-02-11 2015-12-02 삼성전자주식회사 수직 폴딩 구조의 비휘발성 메모리 소자 및 그 제조 방법
KR101603731B1 (ko) * 2009-09-29 2016-03-16 삼성전자주식회사 버티칼 낸드 전하 트랩 플래시 메모리 디바이스 및 제조방법
US9536970B2 (en) * 2010-03-26 2017-01-03 Samsung Electronics Co., Ltd. Three-dimensional semiconductor memory devices and methods of fabricating the same
KR101209003B1 (ko) * 2010-10-14 2012-12-06 주식회사 유진테크 3차원 구조의 메모리 소자를 제조하는 방법 및 장치
US9318341B2 (en) * 2010-12-20 2016-04-19 Applied Materials, Inc. Methods for etching a substrate
KR102010928B1 (ko) * 2012-06-07 2019-10-21 삼성전자주식회사 저항 변화 메모리 장치, 그 동작 방법 및 제조 방법
TWI496249B (zh) * 2013-01-09 2015-08-11 Macronix Int Co Ltd 三維反及快閃記憶體

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100558922B1 (ko) * 2004-12-16 2006-03-10 (주)퓨전에이드 박막 증착장치 및 방법

Also Published As

Publication number Publication date
CN105321846A (zh) 2016-02-10
KR20160015454A (ko) 2016-02-15
JP2016034009A (ja) 2016-03-10
CN105321846B (zh) 2018-02-06
TWI559398B (zh) 2016-11-21
TW201604952A (zh) 2016-02-01
JP5972324B2 (ja) 2016-08-17

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