JP2016034009A - 基板処理装置及び基板処理方法 - Google Patents
基板処理装置及び基板処理方法 Download PDFInfo
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- JP2016034009A JP2016034009A JP2014164897A JP2014164897A JP2016034009A JP 2016034009 A JP2016034009 A JP 2016034009A JP 2014164897 A JP2014164897 A JP 2014164897A JP 2014164897 A JP2014164897 A JP 2014164897A JP 2016034009 A JP2016034009 A JP 2016034009A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/016—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including vertical IGFETs
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Abstract
【解決手段】本発明は基板処理装置及び基板処理方法に関する。本発明の一実施形態による基板処理方法は、ポリシリコンの上部に層間絶縁層と犠牲層とが交互に積層され、前記層間絶縁層と前記犠牲層とにホールが形成された基板を提供する段階と、前記基板にプラズマ状態に励起された第1工程ガスを供給して、前記ホールの側面及び底面と前記基板の上面とに保護層を形成する段階と、前記基板にプラズマ状態に励起された第2工程ガスを供給して、前記ホールの側面に形成された前記保護層を除去する段階と、前記基板にプラズマ状態に励起された第3工程ガスを供給して、前記ホールの側面に露出された前記犠牲層を除去する段階と、前記基板にプラズマ状態に励起された第4工程ガスを供給して、前記基板の上面及び前記ホールの底面で前記保護層を除去する段階と、を含む。
【選択図】図2
Description
20・・・設備前方端部モジュール
21・・・移送フレーム
25・・・第1移送ロボット
27・・・移送レール
40・・・ロードロックチャンバー
50・・・トランスファーチャンバー
60・・・工程モジュール
200a・・・プラズマモジュール
2100・・・チャンバー
2110・・・ボディー
2200・・・サセプタ
2400・・・プラズマ励起部
3100・・・ポリシリコン
3110・・・不純物領域
3210・・・層間絶縁層
3220・・・犠牲層
Claims (17)
- ポリシリコンの上部に層間絶縁層と犠牲層とが交互に積層され、前記層間絶縁層と前記犠牲層とにホールが形成された基板を提供する段階と、
前記基板にプラズマ状態に励起された第1工程ガスを供給して、前記ホールの側面及び底面と前記基板の上面とに保護層を形成する段階と、
前記基板にプラズマ状態に励起された第2工程ガスを供給して、前記ホールの側面に形成された前記保護層を除去する段階と、
前記基板にプラズマ状態に励起された第3工程ガスを供給して、前記ホールの側面に露出された前記犠牲層を除去する段階と、
前記基板にプラズマ状態に励起された第4工程ガスを供給して、前記基板の上面及び前記ホールの底面で前記保護層を除去する段階と、を含む基板処理方法。 - 前記層間絶縁層は、酸化物であり、前記犠牲層は、窒化物である請求項1に記載の基板処理方法。
- 前記第1工程ガスとしては、酸素ガスが提供され、前記保護層は、二酸化珪素層である請求項2に記載の基板処理方法。
- 前記第2工程ガスとしては、水素ガスが提供され、前記保護層は、前記第2工程ガスと反応してシランに分解される請求項2に記載の基板処理方法。
- 前記第3工程ガスは、三フッ化窒素ガス及び酸素ガスを含む請求項2に記載の基板処理方法。
- 前記第3工程ガスは、窒素ガスをさらに含む請求項5に記載の基板処理方法。
- 前記第4工程ガスは、水素ガスである請求項2に記載の基板処理方法。
- 前記第4工程ガスは、窒素ガス、水素ガス及び三フッ化窒素ガスが混合された状態である請求項2に記載の基板処理方法。
- 前記第4工程ガスを供給して前記保護層と反応させた後、前記基板を設定温度に加熱する段階をさらに含む請求項8に記載の基板処理方法。
- 前記基板は、積層メモリ装置の製造に提供される請求項1に記載の基板処理方法。
- チャンバーと、
前記チャンバーの内部に位置されるサセプタと、
前記チャンバーの上部に第1工程ガス、第2工程ガス、第3工程ガス及び第4工程ガスを順次的に供給する工程ガス供給部と、
前記第1工程ガス乃至第4工程ガスをプラズマ状態に励起するプラズマ励起部と、を含む基板処理装置。 - 前記第1工程ガスとしては、酸素ガスが提供される請求項11に記載の基板処理装置。
- 前記第2工程ガスとしては、水素ガスが提供される請求項11に記載の基板処理装置。
- 前記第3工程ガスは、三フッ化窒素ガス及び酸素ガスを含む請求項11に記載の基板処理装置。
- 前記第3工程ガスは、窒素ガスをさらに含む請求項14に記載の基板処理装置。
- 前記第4工程ガスは、水素ガスである請求項11に記載の基板処理装置。
- 前記第4工程ガスは、窒素ガス、水素ガス及び三フッ化窒素ガスが混合された状態である請求項11に記載の基板処理装置。
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KR10-2014-0097244 | 2014-07-30 | ||
KR1020140097244A KR101603971B1 (ko) | 2014-07-30 | 2014-07-30 | 기판 처리 장치 및 기판 처리 방법 |
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JP2016034009A true JP2016034009A (ja) | 2016-03-10 |
JP5972324B2 JP5972324B2 (ja) | 2016-08-17 |
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JP (1) | JP5972324B2 (ja) |
KR (1) | KR101603971B1 (ja) |
CN (1) | CN105321846B (ja) |
TW (1) | TWI559398B (ja) |
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CN111115561B (zh) * | 2019-12-05 | 2023-05-12 | 中国科学院微电子研究所 | 一种微纳通孔的制备方法及具有微纳通孔的结构 |
KR102540773B1 (ko) * | 2021-01-19 | 2023-06-12 | 피에스케이 주식회사 | 패러데이 실드 및 기판 처리 장치 |
Citations (4)
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JPS6188554A (ja) * | 1984-10-08 | 1986-05-06 | Nippon Telegr & Teleph Corp <Ntt> | 半導体メモリおよびその製造方法 |
JPH07153739A (ja) * | 1993-07-08 | 1995-06-16 | Air Prod And Chem Inc | 半導体材料のプラズマ除去法 |
JP2010177652A (ja) * | 2009-02-02 | 2010-08-12 | Toshiba Corp | 半導体装置の製造方法 |
JP2010187001A (ja) * | 2009-02-11 | 2010-08-26 | Samsung Electronics Co Ltd | 不揮発性メモリ素子及びその製造方法 |
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US6296780B1 (en) * | 1997-12-08 | 2001-10-02 | Applied Materials Inc. | System and method for etching organic anti-reflective coating from a substrate |
KR100558922B1 (ko) * | 2004-12-16 | 2006-03-10 | (주)퓨전에이드 | 박막 증착장치 및 방법 |
KR100807223B1 (ko) * | 2006-07-12 | 2008-02-28 | 삼성전자주식회사 | 상변화 물질층, 상변화 물질층 형성 방법 및 이를 이용한상변화 메모리 장치의 제조 방법 |
KR101603731B1 (ko) * | 2009-09-29 | 2016-03-16 | 삼성전자주식회사 | 버티칼 낸드 전하 트랩 플래시 메모리 디바이스 및 제조방법 |
US9536970B2 (en) * | 2010-03-26 | 2017-01-03 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor memory devices and methods of fabricating the same |
KR101209003B1 (ko) * | 2010-10-14 | 2012-12-06 | 주식회사 유진테크 | 3차원 구조의 메모리 소자를 제조하는 방법 및 장치 |
US9318341B2 (en) * | 2010-12-20 | 2016-04-19 | Applied Materials, Inc. | Methods for etching a substrate |
KR102010928B1 (ko) * | 2012-06-07 | 2019-10-21 | 삼성전자주식회사 | 저항 변화 메모리 장치, 그 동작 방법 및 제조 방법 |
TWI496249B (zh) * | 2013-01-09 | 2015-08-11 | Macronix Int Co Ltd | 三維反及快閃記憶體 |
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- 2014-07-30 KR KR1020140097244A patent/KR101603971B1/ko active Active
- 2014-08-13 JP JP2014164897A patent/JP5972324B2/ja active Active
- 2014-08-20 CN CN201410413061.0A patent/CN105321846B/zh active Active
- 2014-08-25 TW TW103129201A patent/TWI559398B/zh active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS6188554A (ja) * | 1984-10-08 | 1986-05-06 | Nippon Telegr & Teleph Corp <Ntt> | 半導体メモリおよびその製造方法 |
JPH07153739A (ja) * | 1993-07-08 | 1995-06-16 | Air Prod And Chem Inc | 半導体材料のプラズマ除去法 |
JP2010177652A (ja) * | 2009-02-02 | 2010-08-12 | Toshiba Corp | 半導体装置の製造方法 |
JP2010187001A (ja) * | 2009-02-11 | 2010-08-26 | Samsung Electronics Co Ltd | 不揮発性メモリ素子及びその製造方法 |
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CN105321846A (zh) | 2016-02-10 |
KR20160015454A (ko) | 2016-02-15 |
KR101603971B1 (ko) | 2016-03-17 |
CN105321846B (zh) | 2018-02-06 |
TWI559398B (zh) | 2016-11-21 |
TW201604952A (zh) | 2016-02-01 |
JP5972324B2 (ja) | 2016-08-17 |
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