FR2947380B1 - Procede de collage par adhesion moleculaire. - Google Patents
Procede de collage par adhesion moleculaire.Info
- Publication number
- FR2947380B1 FR2947380B1 FR0954382A FR0954382A FR2947380B1 FR 2947380 B1 FR2947380 B1 FR 2947380B1 FR 0954382 A FR0954382 A FR 0954382A FR 0954382 A FR0954382 A FR 0954382A FR 2947380 B1 FR2947380 B1 FR 2947380B1
- Authority
- FR
- France
- Prior art keywords
- collage
- molecular adhesion
- adhesion
- molecular
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000010070 molecular adhesion Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/17—Surface bonding means and/or assemblymeans with work feeding or handling means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Micromachines (AREA)
- Adhesives Or Adhesive Processes (AREA)
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0954382A FR2947380B1 (fr) | 2009-06-26 | 2009-06-26 | Procede de collage par adhesion moleculaire. |
PCT/EP2010/058244 WO2010149512A1 (fr) | 2009-06-26 | 2010-06-11 | Procédé de collage par collage moléculaire |
CN201080025954.8A CN102804337B (zh) | 2009-06-26 | 2010-06-11 | 通过分子键合来键合的方法 |
JP2012515447A JP5448117B2 (ja) | 2009-06-26 | 2010-06-11 | 分子結合による結合方法 |
EP10725151.4A EP2446463B1 (fr) | 2009-06-26 | 2010-06-11 | Procédé de collage par collage moléculaire |
US13/380,731 US8927320B2 (en) | 2009-06-26 | 2010-06-11 | Method of bonding by molecular bonding |
SG2011087921A SG176610A1 (en) | 2009-06-26 | 2010-06-11 | A method of bonding by molecular bonding |
KR1020117030651A KR101668374B1 (ko) | 2009-06-26 | 2010-06-11 | 분자 본딩에 의한 본딩 방법 |
TW099120942A TWI464794B (zh) | 2009-06-26 | 2010-06-25 | 藉由分子接合的接合方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0954382A FR2947380B1 (fr) | 2009-06-26 | 2009-06-26 | Procede de collage par adhesion moleculaire. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2947380A1 FR2947380A1 (fr) | 2010-12-31 |
FR2947380B1 true FR2947380B1 (fr) | 2012-12-14 |
Family
ID=41507916
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0954382A Active FR2947380B1 (fr) | 2009-06-26 | 2009-06-26 | Procede de collage par adhesion moleculaire. |
Country Status (9)
Country | Link |
---|---|
US (1) | US8927320B2 (fr) |
EP (1) | EP2446463B1 (fr) |
JP (1) | JP5448117B2 (fr) |
KR (1) | KR101668374B1 (fr) |
CN (1) | CN102804337B (fr) |
FR (1) | FR2947380B1 (fr) |
SG (1) | SG176610A1 (fr) |
TW (1) | TWI464794B (fr) |
WO (1) | WO2010149512A1 (fr) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
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FR2967812B1 (fr) * | 2010-11-19 | 2016-06-10 | S O I Tec Silicon On Insulator Tech | Dispositif electronique pour applications radiofrequence ou de puissance et procede de fabrication d'un tel dispositif |
FR2972078A1 (fr) * | 2011-02-24 | 2012-08-31 | Soitec Silicon On Insulator | Appareil et procédé de collage par adhésion moléculaire |
JP2014093420A (ja) * | 2012-11-02 | 2014-05-19 | Toyota Motor Corp | ウェハを支持ディスクに接着する治具、および、それを用いた半導体装置の製造方法 |
KR102258288B1 (ko) * | 2013-05-29 | 2021-05-31 | 에베 그룹 에. 탈너 게엠베하 | 기판을 결합하기 위한 방법 및 장치 |
FR3036223B1 (fr) * | 2015-05-11 | 2018-05-25 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de collage direct de substrats avec amincissement des bords d'au moins un des deux substrats |
KR102017834B1 (ko) * | 2016-11-22 | 2019-09-03 | 세메스 주식회사 | 기판 처리 장치 및 기판 처리 방법 |
US10497667B2 (en) * | 2017-09-26 | 2019-12-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Apparatus for bond wave propagation control |
KR102483443B1 (ko) * | 2018-08-14 | 2023-01-04 | 삼성전자주식회사 | 기판 접합 장치 및 이를 구비하는 기판 접합 설비와 이를 이용한 기판의 접합방법 |
CN110767589B (zh) * | 2019-10-31 | 2021-11-19 | 长春长光圆辰微电子技术有限公司 | 一种soi硅片对准键合的方法 |
CN110767590A (zh) * | 2019-10-31 | 2020-02-07 | 长春长光圆辰微电子技术有限公司 | 一种用硅片凹口对准键合两片硅片的方法 |
DE102020124580A1 (de) | 2020-03-27 | 2021-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Wafer bonding method |
US11437344B2 (en) * | 2020-03-27 | 2022-09-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Wafer bonding method |
CN114725307A (zh) * | 2022-06-09 | 2022-07-08 | 浙江宏禧科技有限公司 | 显示面板的制备方法 |
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FR2935537B1 (fr) | 2008-08-28 | 2010-10-22 | Soitec Silicon On Insulator | Procede d'initiation d'adhesion moleculaire |
FR2943177B1 (fr) | 2009-03-12 | 2011-05-06 | Soitec Silicon On Insulator | Procede de fabrication d'une structure multicouche avec report de couche circuit |
-
2009
- 2009-06-26 FR FR0954382A patent/FR2947380B1/fr active Active
-
2010
- 2010-06-11 WO PCT/EP2010/058244 patent/WO2010149512A1/fr active Application Filing
- 2010-06-11 CN CN201080025954.8A patent/CN102804337B/zh active Active
- 2010-06-11 SG SG2011087921A patent/SG176610A1/en unknown
- 2010-06-11 KR KR1020117030651A patent/KR101668374B1/ko active IP Right Grant
- 2010-06-11 US US13/380,731 patent/US8927320B2/en active Active
- 2010-06-11 JP JP2012515447A patent/JP5448117B2/ja active Active
- 2010-06-11 EP EP10725151.4A patent/EP2446463B1/fr active Active
- 2010-06-25 TW TW099120942A patent/TWI464794B/zh active
Also Published As
Publication number | Publication date |
---|---|
US20120164778A1 (en) | 2012-06-28 |
CN102804337A (zh) | 2012-11-28 |
JP2012530370A (ja) | 2012-11-29 |
TW201110211A (en) | 2011-03-16 |
WO2010149512A1 (fr) | 2010-12-29 |
FR2947380A1 (fr) | 2010-12-31 |
JP5448117B2 (ja) | 2014-03-19 |
TWI464794B (zh) | 2014-12-11 |
KR101668374B1 (ko) | 2016-10-28 |
CN102804337B (zh) | 2015-08-26 |
KR20120047862A (ko) | 2012-05-14 |
EP2446463B1 (fr) | 2019-11-13 |
EP2446463A1 (fr) | 2012-05-02 |
SG176610A1 (en) | 2012-01-30 |
US8927320B2 (en) | 2015-01-06 |
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