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FR2700064A1 - Dispositif à semiconducteurs à grille isolée et procédé de fabrication. - Google Patents

Dispositif à semiconducteurs à grille isolée et procédé de fabrication. Download PDF

Info

Publication number
FR2700064A1
FR2700064A1 FR9315586A FR9315586A FR2700064A1 FR 2700064 A1 FR2700064 A1 FR 2700064A1 FR 9315586 A FR9315586 A FR 9315586A FR 9315586 A FR9315586 A FR 9315586A FR 2700064 A1 FR2700064 A1 FR 2700064A1
Authority
FR
France
Prior art keywords
layer
region
type
semiconductor
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR9315586A
Other languages
English (en)
French (fr)
Inventor
Takeda Mitsuyoshi
Yamaguchi Hiroshi
Nishihara Hidenori
Yano Mitsuhiro
Souno Hidetoshi
Yoshida Eiji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of FR2700064A1 publication Critical patent/FR2700064A1/fr
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR9315586A 1992-12-24 1993-12-23 Dispositif à semiconducteurs à grille isolée et procédé de fabrication. Pending FR2700064A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP34383992 1992-12-24
JP5180296A JPH06244429A (ja) 1992-12-24 1993-07-21 絶縁ゲート型半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
FR2700064A1 true FR2700064A1 (fr) 1994-07-01

Family

ID=26499874

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9315586A Pending FR2700064A1 (fr) 1992-12-24 1993-12-23 Dispositif à semiconducteurs à grille isolée et procédé de fabrication.

Country Status (3)

Country Link
JP (1) JPH06244429A (de)
DE (1) DE4344278C2 (de)
FR (1) FR2700064A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19808154A1 (de) * 1998-02-27 1999-09-02 Asea Brown Boveri Bipolartransistor mit isolierter Gateelektrode
EP1060517A1 (de) 1998-02-27 2000-12-20 ABB Semiconductors AG Bipolartransistor mit isolierter gateelektrode
CN102479714A (zh) * 2010-11-29 2012-05-30 无锡华润上华半导体有限公司 金属氧化物半导体场效应管制造方法
JP2014508409A (ja) * 2011-02-12 2014-04-03 フリースケール セミコンダクター インコーポレイテッド 半導体素子及び関連する形成方法

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2530079A1 (fr) * 1982-07-08 1984-01-13 Gen Electric Procede de fabrication de dispositifs a semi-conducteurs de puissance a grille isolee
JPS60186068A (ja) * 1985-01-31 1985-09-21 Hitachi Ltd 絶縁ゲート電界効果トランジスタ
JPS6113669A (ja) * 1984-06-28 1986-01-21 Toshiba Corp 半導体装置の製造方法
JPH01225165A (ja) * 1988-03-03 1989-09-08 Fuji Electric Co Ltd 伝導度変調型ｍｏｓｆｅｔの製造方法
JPH01231377A (ja) * 1988-03-11 1989-09-14 Fuji Electric Co Ltd Ｍｏｓ型半導体装置の製造方法
EP0333447A1 (de) * 1988-03-18 1989-09-20 Fuji Electric Co., Ltd. Verfahren zur Herstellung eines MOS-Typ-Halbleiter-Bauelement
DE3920585A1 (de) * 1988-08-09 1990-02-15 Asea Brown Boveri Verfahren zur herstellung einer kathodenseitigen emitterstruktur fuer ein mos-gesteuertes leistungshalbleiterbauelement
FR2640080A1 (de) * 1988-12-01 1990-06-08 Fuji Electric Co Ltd
JPH0349238A (ja) * 1989-07-18 1991-03-04 New Japan Radio Co Ltd 縦形二重拡散ｍｏｓトランジスタの製造方法
US5034336A (en) * 1988-03-03 1991-07-23 Fuji Electric Co., Ltd. Method of producing insulated gate bipolar tranistor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60196974A (ja) * 1984-03-19 1985-10-05 Toshiba Corp 導電変調型ｍｏｓｆｅｔ
JPS6410672A (en) * 1987-07-03 1989-01-13 Nissan Motor Vertical mosfet
JPH02117144A (ja) * 1988-10-26 1990-05-01 Fuji Electric Co Ltd 伝導度変調型ｍｏｓｆｅｔの製造方法

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2530079A1 (fr) * 1982-07-08 1984-01-13 Gen Electric Procede de fabrication de dispositifs a semi-conducteurs de puissance a grille isolee
JPS6113669A (ja) * 1984-06-28 1986-01-21 Toshiba Corp 半導体装置の製造方法
JPS60186068A (ja) * 1985-01-31 1985-09-21 Hitachi Ltd 絶縁ゲート電界効果トランジスタ
JPH01225165A (ja) * 1988-03-03 1989-09-08 Fuji Electric Co Ltd 伝導度変調型ｍｏｓｆｅｔの製造方法
US5034336A (en) * 1988-03-03 1991-07-23 Fuji Electric Co., Ltd. Method of producing insulated gate bipolar tranistor
JPH01231377A (ja) * 1988-03-11 1989-09-14 Fuji Electric Co Ltd Ｍｏｓ型半導体装置の製造方法
EP0333447A1 (de) * 1988-03-18 1989-09-20 Fuji Electric Co., Ltd. Verfahren zur Herstellung eines MOS-Typ-Halbleiter-Bauelement
DE3920585A1 (de) * 1988-08-09 1990-02-15 Asea Brown Boveri Verfahren zur herstellung einer kathodenseitigen emitterstruktur fuer ein mos-gesteuertes leistungshalbleiterbauelement
FR2640080A1 (de) * 1988-12-01 1990-06-08 Fuji Electric Co Ltd
JPH0349238A (ja) * 1989-07-18 1991-03-04 New Japan Radio Co Ltd 縦形二重拡散ｍｏｓトランジスタの製造方法

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 010, no. 027 (E - 378) 4 February 1986 (1986-02-04) *
PATENT ABSTRACTS OF JAPAN vol. 010, no. 158 (E - 409) 6 June 1986 (1986-06-06) *
PATENT ABSTRACTS OF JAPAN vol. 013, no. 544 (E - 855) 6 December 1989 (1989-12-06) *
PATENT ABSTRACTS OF JAPAN vol. 013, no. 558 (E - 858) 12 December 1989 (1989-12-12) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 187 (E - 1067) 14 May 1991 (1991-05-14) *
SHENAI K: "A high-density, self-aligned power MOSFET structure fabricated using sacrificial spacer technology", IEEE TRANSACTIONS ON ELECTRON DEVICES, MAY 1992, USA, VOL. 39, NR. 5, PAGE(S) 1252 - 1255, ISSN 0018-9383, XP000266906 *

Also Published As

Publication number Publication date
DE4344278A1 (de) 1994-06-30
DE4344278C2 (de) 1995-08-31
JPH06244429A (ja) 1994-09-02

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