DE3855148D1 - Speicheradressengenerator - Google Patents

Speicheradressengenerator

Info

Publication number: DE3855148D1
Authority: DE; Germany
Prior art keywords: memory address; address generator; generator; memory; address
Prior art date: 1987-07-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE3855148T

Other languages

English (en)

Other versions

DE3855148T2 (de

Inventor

Jeffrey W Einarson

Kin-Ling Cheung

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Samsung Electronics Co Ltd

Original Assignee

Wang Laboratories Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-07-30

Filing date

1988-07-29

Publication date

1996-05-02

1988-07-29 Application filed by Wang Laboratories Inc filed Critical Wang Laboratories Inc

1996-05-02 Application granted granted Critical

1996-05-02 Publication of DE3855148D1 publication Critical patent/DE3855148D1/de

1996-11-07 Publication of DE3855148T2 publication Critical patent/DE3855148T2/de

2008-07-30 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0692—Multiconfiguration, e.g. local and global addressing

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Bus Control (AREA)
Multi Processors (AREA)
Memory System (AREA)

DE3855148T 1987-07-30 1988-07-29 Speicheradressengenerator Expired - Lifetime DE3855148T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US07/080,722 US4799187A (en)	1987-07-30	1987-07-30	Memory address generator with device address type specifier

Publications (2)

Publication Number	Publication Date
DE3855148D1 true DE3855148D1 (de)	1996-05-02
DE3855148T2 DE3855148T2 (de)	1996-11-07

Family

ID=22159188

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE3855148T Expired - Lifetime DE3855148T2 (de)	1987-07-30	1988-07-29	Speicheradressengenerator

Country Status (6)

Country	Link
US (1)	US4799187A (de)
EP (1)	EP0301582B1 (de)
JP (1)	JP2851048B2 (de)
AU (1)	AU606178B2 (de)
CA (1)	CA1304522C (de)
DE (1)	DE3855148T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH01248256A (ja) *	1988-03-30	1989-10-03	Toshiba Corp	入出力制御方式
EP0429733B1 (de) *	1989-11-17	1999-04-28	Texas Instruments Incorporated	Multiprozessor mit Koordinatenschalter zwischen Prozessoren und Speichern
JPH05507572A (ja) *	1990-06-07	1993-10-28	エルジー・セミコン・カンパニー・リミテッド	多重プロセッサシステムにおいてページゼロメモリアクセスを管理するための方法及び装置
US5301281A (en) *	1991-06-26	1994-04-05	Ast Research, Inc.	Method and apparatus for expanding a backplane interconnecting bus in a multiprocessor computer system without additional byte select signals
JP3451595B2 (ja) *	1995-06-07	2003-09-29	インターナショナル・ビジネス・マシーンズ・コーポレーション	二つの別個の命令セット・アーキテクチャへの拡張をサポートすることができるアーキテクチャ・モード制御を備えたマイクロプロセッサ
US5649125A (en) *	1995-10-30	1997-07-15	Motorola, Inc.	Method and apparatus for address extension across a multiplexed communication bus
US6253302B1 (en) *	1996-08-29	2001-06-26	Intel Corporation	Method and apparatus for supporting multiple overlapping address spaces on a shared bus
US5857080A (en) *	1996-09-10	1999-01-05	Lsi Logic Corporation	Apparatus and method for address translation in bus bridge devices
KR20120132278A (ko) *	2011-05-26	2012-12-05	삼성전자주식회사	메모리 칩, 메모리 시스템, 및 메모리 칩에 대한 액세스 방법
CN103123528A (zh) *	2011-11-18	2013-05-29	环旭电子股份有限公司	即插式模块、电子系统以及相应的判断方法与查询方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3982231A (en) *	1972-03-31	1976-09-21	International Business Machines Corporation	Prefixing in a multiprocessing system
US4090237A (en) *	1976-09-03	1978-05-16	Bell Telephone Laboratories, Incorporated	Processor circuit
EP0085048B1 (de) *	1981-08-12	1988-12-07	International Business Machines Corporation	Vorrichtung und verfahren zur ausgedehnten adressierung für direktspeicherungsanordnungen
US4400794A (en) *	1981-11-17	1983-08-23	Burroughs Corporation	Memory mapping unit
JPS59206925A (ja) *	1983-05-10	1984-11-22	Panafacom Ltd	デ−タ処理システム
KR900007564B1 (ko) *	1984-06-26	1990-10-15	모토로라 인코포레이티드	동적 버스를 갖는 데이터 처리기
US4695948A (en) *	1985-02-28	1987-09-22	International Business Machines Corporation	Bus to bus converter using a RAM for multiple address mapping
GB8510973D0 (en) *	1985-04-30	1985-06-05	Emi Ltd	Data transmission system

1987
- 1987-07-30 US US07/080,722 patent/US4799187A/en not_active Expired - Lifetime
1988
- 1988-07-13 AU AU19005/88A patent/AU606178B2/en not_active Ceased
- 1988-07-28 CA CA000573274A patent/CA1304522C/en not_active Expired - Lifetime
- 1988-07-28 JP JP63189571A patent/JP2851048B2/ja not_active Expired - Fee Related
- 1988-07-29 EP EP88112354A patent/EP0301582B1/de not_active Expired - Lifetime
- 1988-07-29 DE DE3855148T patent/DE3855148T2/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
DE3855148T2 (de)	1996-11-07
JPS6455664A (en)	1989-03-02
CA1304522C (en)	1992-06-30
US4799187A (en)	1989-01-17
JP2851048B2 (ja)	1999-01-27
EP0301582B1 (de)	1996-03-27
EP0301582A2 (de)	1989-02-01
AU1900588A (en)	1989-02-02
AU606178B2 (en)	1991-01-31
EP0301582A3 (en)	1990-08-22

Publication	Publication Date	Title
KR890001098A (ko)	1989-03-18	불휘발성 기억 장치
DE3855877D1 (de)	1997-05-22	Ferro-elektrischer latenter RAM-Speicher
BR8702303A (pt)	1988-02-17	Cartucho de memoria
KR890012387A (ko)	1989-08-26	반도체 기억장치
DE3876415D1 (de)	1993-01-14	Dynamischer direktzugriffsspeicher.
DE69024173D1 (de)	1996-01-25	Nur-Lese-Speicheranordnung
DE3782756D1 (de)	1993-01-07	Direktzugriffspeichereinrichtung.
KR880013252A (ko)	1988-11-30	반도체 기억장치
DE68912458D1 (de)	1994-03-03	Speicherprüfgerät.
DE3885594D1 (de)	1993-12-16	Speicherprüfgerät.
DE69130448D1 (de)	1998-12-10	Adressenerzeugungsschaltung
DE3680077D1 (de)	1991-08-08	Speicherpruefmustergenerator.
KR890016569A (ko)	1989-11-29	반도체 기억장치
DE69026174D1 (de)	1996-05-02	Zwischenraumzeilengenerator
DE69120301D1 (de)	1996-07-25	Speicherprüfgerät
KR900008521A (ko)	1990-06-03	반도체 기억장치
DE69020764D1 (de)	1995-08-17	Speicheradressierung.
DE3783100D1 (de)	1993-01-28	Festwertspeicheranordnung.
KR900006986A (ko)	1990-05-09	반도체메모리
DE68927723D1 (de)	1997-03-13	Adressgenerator
DE3380080D1 (en)	1989-07-20	Memory address sequence generator
DE3855148D1 (de)	1996-05-02	Speicheradressengenerator
DE3883064D1 (de)	1993-09-16	Festwertspeicherschaltung.
DE3865543D1 (de)	1991-11-21	Busadressierungsvorrichtung.
DE68926541D1 (de)	1996-07-04	Adressenmodifizierungsschaltung

Legal Events

Date	Code	Title	Description
1996-06-05	8327	Change in the person/name/address of the patent owner	Owner name: WANG LABORATORIES, INC., BILLERICA, MASS., US
1997-04-24	8364	No opposition during term of opposition
1998-03-19	8327	Change in the person/name/address of the patent owner	Owner name: SAMSUNG ELECTRONICS CO. LTD., SUWON, KYUNGKI, KR