DE3783666D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number: DE3783666D1
Authority: DE; Germany
Prior art keywords: semiconductor memory; memory arrangement; arrangement; semiconductor; memory
Prior art date: 1986-06-19
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE8787305336T

Other languages

English (en)

Other versions

DE3783666T2 (de

Inventor

Yoshihiro Takemae

Takashi Horii

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-06-19

Filing date

1987-06-16

Publication date

1993-03-04

1987-06-16 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

1993-03-04 Application granted granted Critical

1993-03-04 Publication of DE3783666D1 publication Critical patent/DE3783666D1/de

1993-05-13 Publication of DE3783666T2 publication Critical patent/DE3783666T2/de

2007-06-17 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Dram (AREA)
Static Random-Access Memory (AREA)

DE8787305336T 1986-06-19 1987-06-16 Halbleiterspeicheranordnung. Expired - Fee Related DE3783666T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP61143532A JPS63898A (ja)	1986-06-19	1986-06-19	半導体記憶装置

Publications (2)

Publication Number	Publication Date
DE3783666D1 true DE3783666D1 (de)	1993-03-04
DE3783666T2 DE3783666T2 (de)	1993-05-13

Family

ID=15340931

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8787305336T Expired - Fee Related DE3783666T2 (de)	1986-06-19	1987-06-16	Halbleiterspeicheranordnung.

Country Status (5)

Country	Link
US (1)	US4819209A (de)
EP (1)	EP0251559B1 (de)
JP (1)	JPS63898A (de)
KR (1)	KR910004053B1 (de)
DE (1)	DE3783666T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5014242A (en) *	1987-12-10	1991-05-07	Hitachi, Ltd.	Semiconductor device for a ram disposed on chip so as to minimize distances of signal paths between the logic circuits and memory circuit
GB2216307B (en) *	1988-03-01	1992-08-26	Ardent Computer Corp	Vector register file
US5257237A (en) *	1989-05-16	1993-10-26	International Business Machines Corporation	SAM data selection on dual-ported DRAM devices
US4991142A (en) *	1989-07-20	1991-02-05	Samsung Semiconductor Inc.	Dynamic random access memory with improved sensing and refreshing
KR920009059B1 (ko) *	1989-12-29	1992-10-13	삼성전자 주식회사	반도체 메모리 장치의 병렬 테스트 방법
US5023844A (en) *	1990-02-28	1991-06-11	Intel Corporation	Six-way access ported RAM array cell
JPH04188489A (ja) *	1990-11-22	1992-07-07	Mitsubishi Electric Corp	記憶装置
KR940007640B1 (ko) *	1991-07-31	1994-08-22	삼성전자 주식회사	공통 입출력선을 가지는 데이타 전송회로
US5502683A (en) *	1993-04-20	1996-03-26	International Business Machines Corporation	Dual ported memory with word line access control
JPH0729376A (ja) *	1993-07-14	1995-01-31	Ricoh Co Ltd	半導体メモリ装置及びデータ読み書き方法
JPH08180698A (ja) *	1994-12-22	1996-07-12	Toshiba Corp	半導体記憶装置
US5687132A (en) *	1995-10-26	1997-11-11	Cirrus Logic, Inc.	Multiple-bank memory architecture and systems and methods using the same
US5844856A (en) *	1996-06-19	1998-12-01	Cirrus Logic, Inc.	Dual port memories and systems and methods using the same
KR100427712B1 (ko) *	1996-12-31	2004-07-30	주식회사 하이닉스반도체	트윈컬럼디코더를갖는반도체메모리장치
KR100565008B1 (ko) *	2000-02-01	2006-03-30	주식회사유한양행	4-하이드라지노-3-사이클로부텐-1,2-다이온 유도체 및이들의 제조 방법
JP2005259321A (ja) *	2004-03-15	2005-09-22	Nec Electronics Corp	フレキシブル・マルチエリア・メモリ及び該メモリを用いた電子機器
JP5743045B2 (ja) *	2008-07-16	2015-07-01	ピーエスフォールクスコエスエイアールエルＰＳ４ＬｕｘｃｏＳ．ａ．ｒ．ｌ．	半導体記憶装置及び半導体記憶装置におけるメモリアクセス方法
CN112970007A (zh) *	2018-10-23	2021-06-15	钰创科技(美国)股份有限公司	超标量存储器ic、总线及其使用的系统
US10740188B2 (en)	2018-12-07	2020-08-11	Winbond Electronics Corp.	Volatile memory device and method for efficient bulk data movement, backup operation in the volatile memory device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3983544A (en) *	1975-08-25	1976-09-28	International Business Machines Corporation	Split memory array sharing same sensing and bit decode circuitry
JPS58125293A (ja) *	1982-01-22	1983-07-26	Hitachi Ltd	半導体記憶装置
JPS59175090A (ja) *	1983-03-24	1984-10-03	Toshiba Corp	半導体記憶回路
JPS60696A (ja) *	1983-06-16	1985-01-05	Nippon Telegr & Teleph Corp <Ntt>	半導体メモリ
US4623990A (en) *	1984-10-31	1986-11-18	Advanced Micro Devices, Inc.	Dual-port read/write RAM with single array
US4758993A (en) *	1984-11-19	1988-07-19	Fujitsu Limited	Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays
US4758988A (en) *	1985-12-12	1988-07-19	Motorola, Inc.	Dual array EEPROM for high endurance capability
US4742493A (en) *	1986-05-19	1988-05-03	Advanced Micro Devices, Inc.	Multiple port memory array device including improved timing and associated method

1986
- 1986-06-19 JP JP61143532A patent/JPS63898A/ja active Pending
1987
- 1987-06-16 DE DE8787305336T patent/DE3783666T2/de not_active Expired - Fee Related
- 1987-06-16 EP EP87305336A patent/EP0251559B1/de not_active Expired - Lifetime
- 1987-06-17 KR KR1019870006200A patent/KR910004053B1/ko not_active IP Right Cessation
- 1987-06-19 US US07/063,989 patent/US4819209A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
KR910004053B1 (ko)	1991-06-22
EP0251559A3 (en)	1990-07-18
EP0251559A2 (de)	1988-01-07
JPS63898A (ja)	1988-01-05
DE3783666T2 (de)	1993-05-13
EP0251559B1 (de)	1993-01-20
KR880000968A (ko)	1988-03-30
US4819209A (en)	1989-04-04

Publication	Publication Date	Title
DE3778439D1 (de)	1992-05-27	Halbleiterspeicheranordnung.
DE3751002D1 (de)	1995-03-02	Halbleiterspeicher.
DE3778067D1 (de)	1992-05-14	Zweitor-halbleiterspeicheranordnung.
DE3585711D1 (de)	1992-04-30	Halbleiterspeicheranordnung.
DE3788747D1 (de)	1994-02-24	Halbleiterspeicher.
DE3583091D1 (de)	1991-07-11	Halbleiterspeicheranordnung.
DE3687322D1 (de)	1993-02-04	Halbleiterspeicheranordnung.
DE3577944D1 (de)	1990-06-28	Halbleiterspeicheranordnung.
DE3785509D1 (de)	1993-05-27	Nichtfluechtige halbleiterspeicheranordnung.
DE3786819D1 (de)	1993-09-09	Nichtfluechtige halbleiterspeicheranordnung.
DE3772137D1 (de)	1991-09-19	Halbleiter-speicheranordnung.
DE3582376D1 (de)	1991-05-08	Halbleiterspeicheranordnung.
DE3771238D1 (de)	1991-08-14	Halbleiterspeicher.
DE3778408D1 (de)	1992-05-27	Halbleiterspeicheranordnung.
DE3787616D1 (de)	1993-11-04	Halbleiterspeicheranordnung.
DE3576236D1 (de)	1990-04-05	Halbleiterspeicheranordnung.
DE3680562D1 (de)	1991-09-05	Halbleiterspeicheranordnung.
DE3675445D1 (de)	1990-12-13	Halbleiterspeicheranordnung.
DE3577367D1 (de)	1990-05-31	Halbleiterspeicheranordnung.
DE3783666D1 (de)	1993-03-04	Halbleiterspeicheranordnung.
DE3580993D1 (de)	1991-02-07	Halbleiterspeicheranordnung.
DE3887823D1 (de)	1994-03-24	Halbleiterspeicher.
DE3576754D1 (de)	1990-04-26	Halbleiterspeicheranordnung.
DE3783493D1 (de)	1993-02-25	Halbleiterspeicheranordnung.
DE3789783D1 (de)	1994-06-16	Halbleiterspeicheranordnung.

Legal Events

Date	Code	Title	Description
1994-02-24	8364	No opposition during term of opposition
1995-06-08	8339	Ceased/non-payment of the annual fee