DE3275609D1 - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- DE3275609D1 DE3275609D1 DE8282304429T DE3275609T DE3275609D1 DE 3275609 D1 DE3275609 D1 DE 3275609D1 DE 8282304429 T DE8282304429 T DE 8282304429T DE 3275609 T DE3275609 T DE 3275609T DE 3275609 D1 DE3275609 D1 DE 3275609D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56132406A JPS5835783A (ja) | 1981-08-24 | 1981-08-24 | 半導体メモリ |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3275609D1 true DE3275609D1 (en) | 1987-04-09 |
Family
ID=15080642
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282304429T Expired DE3275609D1 (en) | 1981-08-24 | 1982-08-23 | Semiconductor memory device |
Country Status (5)
Country | Link |
---|---|
US (1) | US4480321A (de) |
EP (1) | EP0074206B1 (de) |
JP (1) | JPS5835783A (de) |
DE (1) | DE3275609D1 (de) |
IE (1) | IE53776B1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58125291A (ja) * | 1982-01-20 | 1983-07-26 | Hitachi Ltd | Mosスタテイツク型ram |
JPS5952492A (ja) * | 1982-09-17 | 1984-03-27 | Fujitsu Ltd | スタテイツク型半導体記憶装置 |
JPH0762958B2 (ja) * | 1983-06-03 | 1995-07-05 | 株式会社日立製作所 | Mos記憶装置 |
JPS60117491A (ja) * | 1983-11-29 | 1985-06-24 | Nec Ic Microcomput Syst Ltd | メモリ書き込み回路 |
JPS60253091A (ja) * | 1984-05-30 | 1985-12-13 | Fujitsu Ltd | 半導体記憶装置 |
JPS6166295A (ja) * | 1984-09-10 | 1986-04-05 | Nec Corp | 半導体メモリ |
JPS61110396A (ja) * | 1984-11-05 | 1986-05-28 | Fujitsu Ltd | 半導体記憶装置 |
KR940011426B1 (ko) * | 1985-07-26 | 1994-12-15 | 가부시기가이샤 히다찌세이사꾸쇼 | 반도체 기억 장치 |
US4947374A (en) * | 1987-05-12 | 1990-08-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memeory device in which writing is inhibited in address skew period and controlling method thereof |
JP2507529B2 (ja) * | 1988-03-31 | 1996-06-12 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JPH0748307B2 (ja) * | 1989-06-08 | 1995-05-24 | 株式会社東芝 | 半導体メモリ装置 |
JPH0399874U (de) * | 1990-01-31 | 1991-10-18 | ||
JPH05234380A (ja) * | 1992-02-21 | 1993-09-10 | Sharp Corp | 半導体記憶装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5345939A (en) * | 1976-10-07 | 1978-04-25 | Sharp Corp | Ram circuit |
US4202045A (en) * | 1979-03-05 | 1980-05-06 | Motorola, Inc. | Write circuit for a read/write memory |
JPS5668990A (en) * | 1979-11-08 | 1981-06-09 | Nec Corp | Memory circuit |
JPS5856198B2 (ja) * | 1980-09-25 | 1983-12-13 | 株式会社東芝 | 半導体記憶装置 |
-
1981
- 1981-08-24 JP JP56132406A patent/JPS5835783A/ja active Granted
-
1982
- 1982-08-23 DE DE8282304429T patent/DE3275609D1/de not_active Expired
- 1982-08-23 EP EP82304429A patent/EP0074206B1/de not_active Expired
- 1982-08-24 IE IE2041/82A patent/IE53776B1/en not_active IP Right Cessation
- 1982-08-24 US US06/411,008 patent/US4480321A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0074206A3 (en) | 1985-01-09 |
IE822041L (en) | 1983-02-24 |
JPS5835783A (ja) | 1983-03-02 |
EP0074206B1 (de) | 1987-03-04 |
US4480321A (en) | 1984-10-30 |
JPS6249676B2 (de) | 1987-10-20 |
IE53776B1 (en) | 1989-02-15 |
EP0074206A2 (de) | 1983-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |