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CN110998828A - 具有集成互连结构的电子封装件及其制造方法 - Google Patents

具有集成互连结构的电子封装件及其制造方法 Download PDF

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Publication number
CN110998828A
CN110998828A CN201880050365.1A CN201880050365A CN110998828A CN 110998828 A CN110998828 A CN 110998828A CN 201880050365 A CN201880050365 A CN 201880050365A CN 110998828 A CN110998828 A CN 110998828A
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wiring layer
insulating substrate
insulating
electronic component
electronic package
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CN201880050365.1A
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CN110998828B (zh
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克里斯托夫·詹姆斯·卡普斯塔
雷蒙·阿尔贝特·菲利翁
里斯托·埃尔卡·萨卡里·图奥米宁
考斯图博·拉温德拉·纳加卡尔
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General Electric Co
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General Electric Co
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Abstract

电子封装件包括绝缘基板、具有的背表面耦接到绝缘基板的第一表面的电子部件以及围绕电子部件的周边的至少一部分的绝缘结构。第一布线层从绝缘基板的第一表面起并且在绝缘结构的倾斜侧面上延伸，以与电子部件的有源表面上的至少一个接触焊盘电耦接。第二布线层形成在绝缘基板的第二表面上并延伸穿过其中的至少一个通孔以与第一布线层电耦接。

Description

具有集成互连结构的电子封装件及其制造方法
技术领域
本发明的实施例总体上涉及半导体器件封装件或电子封装件，并且更具体地，涉及一种电子封装件，其包括由绝缘材料形成的集成互连结构，该绝缘材料被金属化以包括一个或多个电迹线，该电迹线延伸穿过电子封装件的主体，以将裸片(die)上的接触焊盘电连接到电子封装件相对侧的接触端子。
背景技术
现有技术的电子封装涵盖从引线键合模块到倒装芯片模块和到嵌入式芯片模块的许多各种不同的方法、结构和方式。引线键合模块是一种成熟的封装方式，其成本低廉但电气性能有限。这些模块使用键合到芯片焊盘的引线将功率器件的顶部I/O焊盘连接到互连结构，例如陶瓷、氮化铝(AlN)或碳化硅(SiC)基板等顶部和底部带有图案化金属的金属-绝缘体-金属基板。引线键合具有固有的高电感，通常较高的串联电阻，在键合焊盘上的电流集聚以及键合位置附近的半导体器件内部的微裂纹。在图1中示出了现有技术的引线键合电子封装件10的示例性结构，其中两个功率半导体器件12使用裸片附接材料16安装到引线框14上。引线框14的部分延伸超出模制树脂26，形成端子18。引线键合20将位于半导体器件12的有源表面24上的裸片焊盘22连接到引线框14上的选定区域。模制树脂26封装半导体器件12、引线键合20和引线框14的裸露部分。
Figure BDA0002379480260000011
Bonding(K&S)是功率模块引线键合的改进版本，用铝带取代了铝引线键合，铝带使用热压技术键合到芯片焊盘。有利的是，
Figure BDA0002379480260000012
Bonding具有较低的电阻，因此适用于较高电流的模块。但是，
Figure BDA0002379480260000013
Bonding具有高电感，会导致基板微裂纹。
与使用焊料凸点(bump，凸块)的引线键合封装相比(与引线键合相比，它们的载流截面更大)，现有技术的倒装芯片模块经受减少的半导体模块的损坏。图2示出了现有技术的倒装芯片电子封装件28的一般结构，其中两个半导体器件12通过倒装芯片焊料凸点34附接到基板32的顶侧金属层30上。通过形成在半导体器件12的背表面38上的热连接36实现热冷却。模制树脂26封装半导体器件12，顶侧金属层30的部分延伸超出模制树脂26而形成端子18。尽管如图2所示的倒装芯片模块相对于引线键合技术具有一些优势，但倒装芯片焊料凸点的导电性很差，需要额外的焊盘金属化层来涂覆焊料凸点，容易出现焊料疲劳，并且散热路径非常差。
现有技术的嵌入式器件模块，例如使用通用电气公司的功率覆盖(POL)技术制造的图3中所示的嵌入式器件模块40，通过消除引线键合和焊料凸点并用直接金属化接触代替引线键合和倒装芯片，解决了引线键合和倒装芯片封装的局限性。在嵌入式器件模块40中，半导体器件12安装在介电膜42上。柱连接器44也附接到介电膜42，以提供模块40的上至下(顶部至底部)的电连接。穿过介电膜42到半导体器件12的输入/输出(I/O)接触焊盘22以及到柱连接器44形成微通孔46。将金属化层48涂覆到介电膜42的外表面、微通孔46和暴露的焊盘22上，以形成到半导体器件12的电连接。具有附接的半导体器件12和柱连接器44的介电膜42，使用诸如焊料的导电裸片附接材料50结合(bonded)到功率基板32。半导体器件12和柱连接器44之间的间隙填充有模制树脂26。与引线键合模块或倒装芯片模块相比，嵌入式器件模块40减少了寄生现象(例如，电阻、电容和电感)，并具有出色的热性能。
尽管嵌入式器件模块结构具有很多优点，但POL技术比引线键合和倒装芯片方法更复杂、更不成熟且成本更高。模块40内的电连接通常通过使用激光钻孔和孔金属化在模块40中形成通孔，或通过形成到与提供垂直连接的设备相邻的插入的I/O结构或框架的通孔来形成。这些方法增加了模块的复杂性和成本，并且会增加模块的占地面积。
因此，期望提供一种新的电子封装技术，其允许构造高度小型化的电子封装件，该电子封装件允许高间距或高引脚数的应用，并且在电子封装件的底表面与半导体器件的顶部或电子封装件的上层之间提供电连接。此外，将需要一种具有嵌入式芯片模块的性能和可靠性优点以及引线键合或倒装芯片模块的较低成本的封装方法。
发明内容
根据本发明的一个方面，一种电子封装件包括绝缘基板、具有的背表面耦接到绝缘基板的第一表面的电子部件(electrical component，电气部件)以及围绕电子部件的周边的至少一部分的绝缘结构。第一布线层从绝缘基板的第一表面起并且在绝缘结构的倾斜侧面上延伸，以与电子部件的有源表面上的至少一个接触焊盘电耦接。第二布线层形成在绝缘基板的第二表面上并延伸穿过其中的至少一个通孔以与第一布线层电耦接。
根据本发明的另一方面，一种制造电子封装件的方法包括：将电子部件的背表面耦接到绝缘基板的第一表面；以及围绕电子部件的周边的至少一部分形成绝缘结构。该方法还包括在绝缘基板的第一表面的一部分上和绝缘结构的倾斜侧面上形成第一布线层，以与电子部件的有源表面上的至少一个接触焊盘电耦接。该方法还包括通过穿过绝缘基板形成的至少一个通孔将第一布线层电耦接至设置在绝缘基板的第二表面上的第二布线层。
根据本发明的另一方面，一种电子封装件包括：电子部件，其具有耦接至绝缘基板的第一表面的背表面以及具有背对绝缘基板的有源表面，有源表面具有成像功能和光学功能中的至少一个。该电子封装件还包括绝缘结构，其围绕电子部件的周边并覆盖其有源表面的一部分。第一布线层形成在绝缘结构的倾斜侧壁上并且电耦接到电子部件的有源表面上的至少一个接触焊盘。第二布线层形成在绝缘基板的第二表面上，并通过形成在绝缘基板中的至少一个通孔电耦接到第一布线层。
通过结合附图提供的本发明的优选实施例的以下详细描述，将更容易理解这些以及其他优点和特征。
附图说明
附图示出了当前预期用于实施本发明的实施例。
在附图中：
图1是示例性现有技术的引线键合电子封装件的示意性截面图。
图2是示例性现有技术的倒装芯片电子封装件的示意性截面图。
图3是示例性现有技术的嵌入式芯片电子封装件的示意性截面图。
图4是根据本发明的实施例的电子封装件的示意性截面图。
图5是图4的电子封装件的顶视图，其中省略了绝缘材料。
图6是根据本发明的另一实施例的电子封装件的示意性截面图。
图7是根据本发明实施例的包括支撑基板的电子封装件的示意性截面图。
图8是图7的电子封装件的顶视图。
图9是根据本发明的又一个实施例的包括热结构的电子封装件的示意性截面图。
图10是根据本发明的实施例的电子封装件的示意性截面图。
图11是根据本发明的实施例的包括无源部件的电子封装件的示意性截面图。
图12A是根据本发明的另一实施例的包括无源部件的电子封装件的示意性截面图。
图12B是根据本发明的另一实施例的包括无源部件的电子封装件的示意性截面图。
图13、图14、图15、图16、图17、图18和图19是根据本发明的实施例的图4的电子封装件在制造/组装过程的各个阶段期间的示意性截面侧视图。
图20和图21是图4的电子封装件在图13-图19所示的制造/组装过程的选择阶段期间的示意性俯视图。
图22是图4的电子封装件的示出了形成在绝缘基板的下表面上的布线层的示例性构造的底视图。
图23、图24、图25和图26是根据本发明的实施例的图9的电子封装件在制造/组装过程的各个阶段期间的示意性截面侧视图。
图27、图28和图29是根据本发明的实施例的图10的电子封装件在制造/组装过程的各个阶段期间的示意性截面侧视图。
图30是根据本发明的实施例的包括光学部件的电子封装件的示意性截面图。
图31是根据本发明的另一实施例的包括成像部件的电子封装件的示意性截面图。
图32是根据本发明的另一实施例的包括双倾斜绝缘结构的电子封装件的示意性截面图。
图33是根据本发明的另一实施例的包括双倾斜绝缘结构的电子封装件的示意性截面图。
图34是根据本发明的另一实施例的包括双倾斜绝缘结构的电子封装件的顶视图。
具体实施方式
本发明的实施例提供了一种电子封装件或模块，其中，电子部件的接触焊盘之间的电气互连从电子封装件的一侧穿过电子封装件的主体，并沿着局部绝缘结构或封装材料的一个或多个倾斜侧壁到达电子封装件的另一侧，从而消除了对常规通孔结构的需要。可以在此局部绝缘结构的外表面上图案化复杂的布线，以在电子部件的I/O焊盘和电子封装件的背表面连接之间提供电气互连。因此，本发明的实施例提供了一种电子封装件，该电子封装件包括从半导体器件到具有低热导率的直接热路径的电子封装件的端子的高导电性连接。所得的电子封装件可以表面安装在基板上或者可以放置在用于复杂电路的多部件模块内。
如本文所用，术语“半导体器件”是指执行特定功能的半导体部件、器件、裸片或芯片，例如，作为非限制性示例的功率晶体管、功率二极管、模拟放大器、RF元件。典型的半导体器件包括输入/输出(I/O)互连件，在本文中称为接触或接触焊盘，其用于将半导体器件连接至外部电路并且电耦接至半导体器件内的内部元件。本文描述的半导体器件可以是用作功率电子电路中的电可控开关或整流器的功率半导体器件，例如开关模式电源。功率半导体器件的非限制性示例包括绝缘栅双极晶体管(IGBT)、金属氧化物半导体场效应晶体管(MOSFET)、双极结型晶体管(BJT)、集成栅换向晶闸管(IGCT)、栅极关断(GTO)晶闸管、可控硅整流器(SCR)、二极管或其他器件或器件组合，包含诸如硅(Si)、碳化硅(SiC)、氮化镓(GaN)和砷化镓(GaAs)之类的材料。作为非限制性示例，半导体器件还可以是数字逻辑器件，例如微处理器、微控制器、存储器件、视频处理器或专用集成电路(ASIC)。
尽管下面提及的电子封装件的各种实施例被示出和描述为包括半导体器件、互连布线和电子封装件端子的特定布置，但是应当理解，也可以实现替代的布置和配置，因此本发明的实施例不仅仅限于具体示出的器件及其布置。即，以下描述的电子封装件实施例还应当理解为涵盖可包括附加的电子部件和/或半导体器件的一种或多种替代器件类型(包括声学器件、微波器件、毫米器件、RF通信器件和微机械(MEMS)器件)的电子封装件。本文所述的电子封装件还可以包括一个或多个电阻器、电容器、电感器、滤波器和类似器件及其组合。如本文所使用的，术语“电气部件”和“电子部件”可以理解为涵盖上述各种类型的半导体器件中的任何一种以及电阻器、电容器、电感器、滤波器和类似的无源器件以及能量存储部件。
图4和图6示出了根据本发明替代实施例的电子封装件52、54。封装52、54包括半导体器件56以及根据需要用共同的部件号引用的多个相似的部件，该半导体器件56具有有源表面58和背表面60或背侧面。尽管示出每个封装52、54仅具有单个嵌入式半导体器件56，但是可以预期，替代实施例可以包括多个半导体器件以及一个或多个无源器件，例如电容器、电阻器和/或电感器，可以以多种不同的配置(包括图11和图12所示)将其集成到封装件52、54的封装中。
现在参考图4中所示的电子封装件52，半导体器件56的背表面60使用部件附接材料66耦接到绝缘基板64的第一表面62。根据各种实施例，作为非限制性示例，可以以绝缘膜或介电基板的形式设置绝缘基板64，例如，
Figure BDA0002379480260000071
层压板，尽管也可以使用其他合适的电绝缘材料，例如
Figure BDA0002379480260000072
聚四氟乙烯(PTFE)或其他聚合物膜，例如液晶聚合物(LCP)或聚酰亚胺基板，或无机膜，例如陶瓷或玻璃。作为非限制性示例，部件附接材料66是粘附至电子封装件52的周围部件的电绝缘材料，例如聚合物材料(例如，环氧树脂、硅树脂、液晶聚合物或陶瓷、二氧化硅或金属填充的聚合物)或其他有机材料。在一些实施例中，以未固化或部分固化(即，B阶段)的形式在绝缘基板64上设置部件附接材料66。替代地，可以在将部件附接材料66放置在绝缘基板64上之前将其涂覆到半导体器件56上。在替代实施例中，可以通过绝缘基板64自身的粘合特性，将半导体器件56固定到绝缘基板64上。在这样的实施例中，省略了部件附接材料66，并且绝缘基板64以具有粘合特性的单个介电层的形式设置。这样的粘合剂介电层的非限制性示例包括旋涂介电材料，例如聚酰亚胺或聚苯并氮杂唑(PBO)。
具有至少一个倾斜侧面或倾斜侧壁70的绝缘结构68耦接到绝缘基板64的第一表面62。根据替代实施例，绝缘结构68可以是固化的可光图案化的树脂、聚合物(例如，环氧树脂材料)、预浸材料、无机材料、复合介电材料或任何其他电绝缘的有机或无机材料。如图5所示，在所示的实施例中，绝缘结构68形成为使得其完全围绕半导体器件56的外周边152。在替代实施例中，绝缘结构68可以形成为覆盖半导体器件56的一个但不是全部四个侧壁72。
第一布线层74设置在绝缘结构68上。作为非限制性示例，第一布线层74优选地是诸如铝、铜、金、银、镍或其组合的图案化金属层。替代地，第一布线层74可以是导电聚合物。如图所示，第一布线层74位于绝缘结构68的外表面70上，并与位于半导体器件56的有源表面58上的接触焊盘78、80形成电连接。接触焊盘78、80提供到半导体器件56内的内部接触的导电路径(I/O连接)。作为非限制性示例，接触焊盘78、80的成分可包括各种导电材料，例如铝、铜、金、银、镍或它们的组合。虽然示出为从半导体器件56的有源表面58向外突出的结构，但是接触焊盘78、80也可以是与半导体器件56的有源表面58基本上齐平或同高的接触端子。然后，第一布线层74向下延伸倾斜侧壁70，并覆盖绝缘基板64的第一表面62的一部分。
电绝缘材料82覆盖半导体器件56、绝缘结构68、第一布线层74和绝缘基板64的第一表面62的暴露部分。在替代实施例中，绝缘材料82可以封装所有半导体器件56或其一部分。例如，在半导体器件56是光学部件并且有源表面58具有光学功能的实施例中，在半导体器件56的有源表面58的一部分上方的绝缘材料82内形成可选的开口84(以虚线示出)。在替代实施例中，可以使用光学透明的材料来形成全部绝缘材料82或仅绝缘材料82的位于图4所示的区域内的一部分。可以预期的是，可以以类似的方式将类似的开口或光学透明的材料集成在本文公开的电子封装件的其他实施例中。
在图5中设置了电子封装件52的顶视图，为了清楚示出第一布线层74的示例性配置之目的，省略了绝缘材料82。如图所示，第一布线层74包括多个电迹线86，每个电迹线86包括位于绝缘结构68的外表面74上的顶侧端子焊盘88和位于绝缘基板64的第一表面62上的底侧端子焊盘90。这些电迹线86中的每一个可以被配置为在电子封装件52的顶面上形成到半导体器件56的相应接触焊盘78、80的连接。本领域的技术人员将认识到，电迹线86的布置不限于图5中所示的布置，并且可以基于半导体器件56的接触焊盘配置和最终电子封装件内的I/O的期望位置，以多种替代配置来形成电迹线86。此外，根据相关联的接触焊盘78、80的载流要求和特定功能，电子迹线86的宽度和/或厚度可在电子封装件52中的迹线之间变化，根据需要形成到具有更高载流要求的接触焊盘的更大和/或更厚的迹线86。
再次参考图4和图5，第二布线层92或金属化层设置在绝缘基板64的第二表面94上。第二布线层92延伸到穿过绝缘基板64而形成的通孔96、98中，从而形成延伸穿过通孔96、98的穿透接触100、102，以将第一布线层74的选择部分或迹线电耦接至第二布线层92。在所示的非限制性示例中，穿透接触100将第二布线层92电连接至电迹线86a和半导体器件56的接触焊盘78。穿透接触102将第二布线层92电连接到电迹线86b和半导体器件56的接触焊盘80。根据半导体器件56的设计，替代实施例可以包括比图4所示更多或更少的穿透接触。可选地，穿透接触104(以虚线示出)延伸穿过位于半导体器件56下方的可选通孔106(以虚线示出)，并与半导体器件56的背表面60形成电连接。穿透接触104可以与半导体器件56的背表面60直接物理接触，或者在部件附接材料66被设置为导电材料的实施例中，可以通过部件附接材料66与背表面60电耦接。
现在参考图6，示出了根据本发明另一个实施例的电子封装件54。类似于电子封装件52，电子封装件54的半导体器件56安装在绝缘基板64上，其背表面60通过部件附接材料66接合到绝缘基板64。第一布线层74以与以上针对电子封装件52所述方式的相似的方式形成，并且可以包括以与图5所示的方式相似的方式或基于半导体器件56的有源表面上的接触焊盘的特定布置以任何数量的替代配置布置的电迹线。第二布线层92形成在绝缘基板64的第二表面94上，并在通孔96、98内产生穿透接触100、102。第二布线层92还包括延伸穿过较大的贯穿孔或通孔110的背侧热结构108。在半导体器件56是横向器件的实施例中，背侧热结构108有助于从半导体器件56传热。在半导体器件56是垂直功率半导体裸片的替代实施例中，结构108用作热结构和电气互连，特别是漏极连接。在一个实施例中，背侧热结构108直接镀在半导体器件56的背表面60上。本领域的技术人员将理解，根据特定电子封装件的设计规范，本文公开的任何电子封装件可以包括背侧热结构108(图6)、一个或多个穿透接触104(图4)或者形成为没有与半导体器件56的背表面60的任何连接。
在一个实施例中，可选的第二绝缘基板112(以虚线示出)被涂覆到绝缘材料82的顶表面124。第二绝缘基板112可以由与绝缘基板64所述相同的任何材料形成，并且可以以类似的方式集成在本文公开的任何其他电子封装件中。
根据本发明的又一个实施例，在图7中示出了电子封装件114。电子封装件114包括许多与图4的电子封装件52相同的部件，并用共同的部件号表示。电子封装件114还包括类似于电子封装件54(图6)的背侧热结构108。除了与电子封装件52和电子封装件54共有的部件之外，电子封装件114还包括为电子封装件114提供额外的尺寸稳定性的支撑基板或芯结构116。在一个实施例中，芯结构116通过一层接合材料118耦接到绝缘基板64的第一表面62。芯结构116可以是印刷电路板(PCB)芯材料，例如具有玻璃纤维毡的环氧树脂材料、预浸材料、聚酰亚胺膜/层、陶瓷材料、玻璃、铝、复合介电材料或其他可为电子封装件114提供机械强度的类似/合适的有机材料或无机材料。
如图8所示，芯结构116包括围绕半导体器件56和绝缘结构68的开口120。开口120可以例如通过机械冲压、激光切割、喷水或机械研磨形成。绝缘材料82填充芯结构116和绝缘基板64之间的间隙并覆盖第一布线层74。在所示的实施例中，芯结构116的顶面122与绝缘材料82的顶面124共面。在替代实施例中，芯结构116可以完全嵌入绝缘材料82内，使得芯结构116的顶面122涂覆有绝缘材料82。虽然在图7中未示出，但是在芯结构116是印刷电路板的实施例中，可以预期，它将在其顶侧和/或底侧上具有布线，并且第二布线层92可以延伸穿过接合材料118和绝缘基板64中的附加微通孔，以与底表面芯结构116上的接触位置电耦接。可以预期的是，芯结构116可以以类似的方式并入本文公开的任何其他电子封装件中。
电子封装件126的又一实施例在图9中示出。与电子封装件126和电子封装件52、54类似的部件在适当时用类似的部件编号来指代。在该实施例中，代替图4的绝缘材料82，提供了顶侧热结构128或导热结构。顶侧热结构128通过一层导热接合层或材料130，例如导热油脂或导热胶，粘结到绝缘基板64上。该导热材料层130覆盖第一布线层74以及绝缘基板64、绝缘结构68和半导体器件56的有源表面58的暴露区域。在替代实施例中，该导热材料层130可以用诸如环氧树脂的热绝缘有机粘合材料代替。顶侧热结构128是具有高热导率的金属或无机材料，作为非限制性示例，例如，铜、碳化硅、氧化铍或氮化铝。在替代实施例中，类似于图7和图8的芯结构116，顶侧热结构128可以包括尺寸被确定为围绕半导体器件56和绝缘结构68的全部或一部分的开口。
类似于电子封装件54，电子封装件126的第二布线层92延伸穿过绝缘基板64中的通孔96、98，以与第一布线层74耦接。电子封装件126还包括背侧热结构108，其延伸穿过通孔110以与半导体器件56的背表面60耦接。在一个实施例中，电子封装件126还包括一个或多个可选的导电导通孔132(以虚线示出)，其将第二布线层92耦接至顶侧热结构128。一个或多个导通孔132用于与顶侧热结构128形成接地连接和/或帮助电子封装件126的顶侧和底侧之间的热传递。
现在参考图10，示出了电子封装件134的替代实施例，其中绝缘结构68被形成为覆盖半导体器件56的整个有源表面58。在该实施例中，穿过绝缘结构68在与接触焊盘78、80对准的位置处形成微通孔136，并且第一布线层74延伸穿过这些微通孔136以与接触焊盘78、80电耦接。微通孔136的添加可以在第一布线层74和接触焊盘78、80之间提供更可靠的电连接。与图4、图6、图7和图10中的第一布线层74的构造相比，微通孔136的添加还允许第一布线层74在距半导体器件56的有源表面58更大的距离处偏移，因此有助于避免第一布线层74在半导体器件56的有源表面58和背表面60之间形成短路的可能性。
在图11中示出了包括无源部件138的电子封装件134的替代实施例。作为其中半导体器件56是功率器件的一个非限制性示例，无源部件136可以是电容器。如图所示，无源部件138的安装表面140通过部件附接材料66耦接到绝缘基板64的第一表面62。第一布线层74的部分延伸穿过绝缘结构68中的通孔142，以与无源部件138的端子144电耦接，并且选择性地将端子144电连接至半导体器件56的一个或多个接触焊盘78。可以想到，一个或多个无源部件可以以类似的方式并入本文公开的任何其他电子封装件中。在优选实施例中，将无源部件138的厚度选择为大约等于半导体器件56上的厚度。可替代地，无源部件可以在绝缘结构68外部的位置处耦接至绝缘基板64的第一表面62。
在图12A和图12B中所示的又一替代实施例中，电子封装件134可以被修改为包括堆叠在半导体器件56上方的无源部件138。在这些实施例中，无源部件138的端子144通过电连接元件148耦接到第三布线层146。根据替代实施例，电连接元件148是导电材料，例如焊料或导电粘合剂。第三布线层146形成在绝缘材料82的顶面124上，并且延伸穿过形成在绝缘材料82中的一个或多个通孔150、151，这些通孔150、151电耦接至布线层74。第三布线层146由与第二布线层92相同的材料形成并以与上述第二布线层92相同的方式图案化。
在图12A所示的实施例中，金属化的微通孔136将无源部件138的两个端子144电耦接至半导体器件56上的相应的接触焊盘78、80。在图12B所示的另一配置中，无源部件138的一个端子144通过通孔136、150耦接到半导体器件56的接触焊盘78，而无源部件138的另一端子144通过通孔150电耦接到布线层74。在又一替代实施例中，无源部件138的两个端子144都电耦接到布线层74，同时保持与接触焊盘78、80电隔离。可以想到的是，可以对布线层74和通孔136、150、151的配置和位置进行修改，以获得端子144、布线层74、接触焊盘78、80或其他类型的部件接触之间的替代连接配置。
现在参考描绘横截面的图13-图19和描绘顶视图的图20-图22，根据本发明的一个实施例，阐述了一种用于制造图4的电子封装件52的技术，每个图都示出了在组装过程中电子封装件52的横截面。本领域技术人员将认识到，可以对本文描述的步骤进行较小的修改以制造电子封装件54、114、134或其变型。尽管图13至图19示出了单个电子封装件的制造，但是本领域的技术人员将认识到，可以以类似的方式在面板水平上制造多个电子封装件，然后根据需要将其分割成单个电子封装件。
首先参考图13，电子封装件52的制造开始于将部件附接材料66涂覆到绝缘基板64的第一表面62。部件附接材料66被涂覆到涂覆裸片附接位置，并且在一些实施例中，如图20所示，部件附接材料66在半导体器件56的外周边152之外延伸。在一些实施例中，例如，部件附接材料66可以通过模版(stencil)、丝网印刷或使用诸如喷墨的直接分配技术来涂覆。部件附接材料66可具有在2至50微米范围内的厚度。在替代实施例中，可以在将半导体器件56定位在绝缘基板64上之前将部件附接材料66涂覆至半导体器件56，或者在绝缘基板64具有粘合特性的情况下完全省略。
使用常规的拾取和放置设备和方法，将其背表面60面向下且其具有接触焊盘78、80的顶面朝上的半导体器件56放置在部件附接材料66中。在放置之后，作为示例，通过使用热、UV光或微波辐射来完全固化部件附接材料66，从而将半导体器件56接合到绝缘基板64。在一个实施例中，如果存在的话，可以使用部分真空和/或高于大气压来促进在固化期间从粘合剂去除挥发物。本领域的技术人员将认识到，可以利用用于涂覆部件附接材料66的替代技术，例如，涂覆部件附接材料以涂覆绝缘结构68的整个暴露表面，或者通过在将半导体器件56放置到绝缘基板64上之前，将部件附接材料66直接涂覆到半导体器件56的背表面60上。
在图14所示的制造技术的下一步骤中，通过在整个半导体器件56上涂覆一层可光图案化的树脂材料154并涂覆绝缘基板64的第一表面62和半导体器件56来形成绝缘结构68。将光图案化的掩模156放置在可光图案化的树脂材料154的顶面上，然后通过将光源158发射的未聚焦光束辐射穿过掩模156中的一个或多个开口160来进行图案化。光束的宽度将随着其延伸到可光图案化的树脂材料154中而扩展，并选择性地固化开口160下方的可光图案化的树脂材料154的区域。随后使用溶剂冲洗以去除未固化的可光图案化的树脂材料154。然后，从接触焊盘78、80去除固化的树脂材料，并选择半导体器件56的有源表面58的部分，从而留下图21所示的固化的绝缘基板64。如图所示，绝缘结构68围绕半导体器件56的外周边152并且涂覆半导体器件56的有源表面58的至少一部分。在又一实施例中，绝缘结构68可以通过诸如激光器的直接写入成像系统来图案化。或者，可以使用灰度掩模形成绝缘结构68。
在替代实施例中，通过将绝缘树脂涂覆到半导体器件56的外周边152的至少一个边缘上来形成绝缘结构68。为了降低其热膨胀系数，该绝缘树脂可以是例如有机底部填充树脂或带有填充材料(例如陶瓷或二氧化硅填充颗粒)的环氧树脂。作为非限制性实施例，可以使用直接分配工具例如喷墨打印机、喷雾系统、3D打印技术或液体分配头来完成绝缘树脂的沉积。之后，使用加热、紫外线、微波等将树脂材料固化。可选地，绝缘树脂可以被涂覆以形成涂覆绝缘基板64和/或半导体器件56的有源表面58的材料层，并且选择性地图案化以去除绝缘基板64和/或半导体器件56的有源表面58上所涂覆的绝缘树脂的选择部分，以产生图15所示的绝缘结构68。
在形成绝缘结构68之后，通过在绝缘结构68的外表面74和绝缘基板64的第一表面62的暴露区域上涂覆一层导电材料来形成第一布线层74(图16)。根据替代实施例，导电材料是诸如铜、铝或其他标准布线金属的金属，并且可以包含诸如钛的阻挡金属，并且通过溅射、蒸发、化学镀、电镀或其他标准金属沉积工艺中的一种或多种来沉积。然后将导电材料图案化以形成第一布线层74。在一个实施例中，可以使用半添加图案化技术来执行图案化步骤，其中将第一种子金属或阻挡金属(例如，钛)涂覆到绝缘结构68的外表面74和绝缘基板64的第一表面62的暴露区域。将光致抗蚀剂(未示出)涂覆到种子金属上并进行图案化，然后在种子金属或阻挡金属的顶部上镀上一层块状金属(例如，铜)。根据示例性的非限制性实施例，阻挡层可以具有0.01至1微米的厚度，并且块状金属可以具有1至20微米的厚度。去除光致抗蚀剂，并通过蚀刻去除暴露的种子层。剩余的种子金属和金属镀层形成图16所示的第一布线层74。在替代实施例中，可以使用其他已知的图案化技术来形成第一布线层74，例如，完全减法图案化、半附加图案镀敷或添加镀敷(additive plate-up)。在其他实施例中，作为非限制性示例，第一布线层74是使用诸如喷墨印刷、丝网印刷或分配的沉积技术形成的印刷导电材料。可以想到，可以使用能够形成具有期望的电流承载能力的高密度布线图案的任何已知方法来形成第一布线层74。
接下来参考图17，通过已知的标准微通孔工艺，包括激光钻孔或烧蚀、机械钻孔、光定义、等离子蚀刻或化学蚀刻等，形成至第一布线层74的选择区域和可选地至半导体器件56的背表面60的绝缘基板64通孔96、98和可选的通孔106。在形成通孔96、98、106之后，将第二导电材料层沉积到绝缘基板64的第二表面94上并对其进行图案化，以形成第二布线层92，如图18所示。可以以与上述用于形成第一布线层74的底视图导电材料层类似的方式进行沉积和图案化。该第二导电材料层延伸到通孔96、98、106中，从而形成穿透接触100、102、104。电子封装件52的底视图在图22中示出，以示出第二布线层92的一种示例性且非限制性的构造。本领域的技术人员将认识到，在本文公开的电子封装件的任何其他实施例中，第二布线层92可以类似地配置为具有多个不同的迹线。
在图19中，通过在半导体器件56、绝缘结构68和绝缘基板64的暴露部分上涂覆绝缘材料82以形成用于电子封装件52的主体，来继续进行制造过程。根据替代和非限制性实施例，绝缘材料82可以使用浇注成型、传递成型、注射成型或压缩成型工艺来涂覆。在制造过程的这一阶段，可以通过绝缘材料82和沉积在绝缘材料82上的第三导电材料层形成微通孔，然后对其图案化以形成图12所示的第三布线层146。替代地，绝缘材料82的顶面124可以背部研磨以去除绝缘材料82的顶部162并且暴露第一布线层74的部分。
本领域的技术人员将理解，与以上关于图13-图19和图20-图22所描述的类似的制造过程可以用于：通过用与通孔96、98相同的方法同时形成图6所示的较大的热通孔110来代替通孔106，制造电子封装件54(图6)。第二导电材料层将填充到该通孔110中并形成背侧热结构108，该背侧热结构108提供热冷却半导体器件56的路径并且在某些实施例中还用作电气互连，例如其中半导体器件56是功率器件的那些实施例中。
图7的电子封装件114的制造开始于如前段所述的修改后图13-图18的制造步骤，以包括将背册热结构108形成为第二布线层92的一部分。在形成第二布线层92之后，芯结构116(图7)通过接合材料118(图7)耦接到绝缘基板64的第一表面62。然后，在芯结构116的开口120中涂覆绝缘材料82，以封装半导体器件56、第一布线层74和绝缘结构68，从而形成图7所示的电子封装件114。
图10的电子封装件126的制造开始于以与关于图13至图16描述的类似的方式将半导体器件56附接到绝缘基板64上并且形成绝缘结构68和第一布线层74。在制造过程的下一步骤中，如图23所示，在第一布线层74、半导体器件56的有源表面58的暴露部分以及绝缘基板64的暴露部分上涂覆一层导热材料130。导热材料层130可以通过喷涂、喷墨或任何其他已知的沉积工艺来涂覆。接下来，如图24所示，将顶侧热结构128放置在导热材料层130中。
在顶侧热结构128就位之后，如图25所示，穿过绝缘基板64并且，在导通孔132的情况下，穿过导热材料层130的一部分形成通孔96、98、110以及可选的导通孔132(以虚线示出)。然后将一层导电材料沉积到绝缘基板64的第二表面94上，并沉积到通孔(via)96、98、110和导通孔(through hole)132中。如图26所示，对导电材料层进行图案化以形成第二布线层92。该沉积和图案化步骤以与关于图18描述的类似的方式进行。
图10的电子封装件134的制造将通过以与图13中描述的类似的方式将半导体器件56涂覆到绝缘基板64上来开始。通过涂覆绝缘树脂以完全涂覆半导体器件56的有源表面58、半导体器件56的至少一个侧壁以及绝缘基板64的围绕半导体器件56的外周边152的选择部分来继续该过程，以形成图27所示的绝缘结构68。绝缘树脂的沉积可以使用关于图14描述的任何技术来完成。
参照图28，在绝缘树脂固化以形成绝缘结构68之后，穿过绝缘结构68形成到达半导体器件56的有源表面58上的接触焊盘78、80的一个或多个微通孔136。使用与上述通孔96、98类似的技术形成微通孔136。然后，通过使用任何前述技术，在绝缘结构68的外表面74上沉积和图案化导电材料层来形成图29所示的第一布线层74。然后，将按照经修改的图17-图19中所示的步骤继续进行电子封装件134的制造，以针对电子封装件54所述的方式形成背侧热结构108。
现在参考图30，示出了根据本发明的替代实施例的包含发光二极管(LED)半导体器件166的电子封装件164。电子封装件164和电子封装件52(图4)内的类似部件根据需要用共同的部件编号来描述。LED半导体器件166被布置在绝缘基板64上，LED半导体器件166的背表面168通过部件附接材料66安装到绝缘基板64的第一表面62。绝缘基板68封装LED半导体器件166的侧壁170和有源表面172的部分以及绝缘基板64的第一表面62的部分。
第一布线层74设置在绝缘结构68的外表面74上，并且耦接至LED半导体器件166的接触焊盘174。第二布线层92设置在绝缘基板64的第二表面94上并且通过通孔96、98耦接至第一布线层74。在所示的实施例中，第二布线层92还包括背侧热结构108。然而，背侧热结构108可以在替代实施例中省略，或者由与穿透接触104(图4)类似的与LED半导体器件166的背表面168的电连接代替。
如图30所示，绝缘材料82覆盖第一布线层74、绝缘结构68的暴露部分以及绝缘基板64的暴露部分。磷光体层176覆盖具有光学功能的LED半导体器件166的有源表面172的暴露部分。透镜178形成在磷光体层176上方。
在本发明的又一个实施例中，电子封装件180包括如图31所示的半导体成像器芯片182。电子封装件180包含与电子封装件52(图4)类似的许多部件，其用共同的参考数字表示。类似于电子封装件52的半导体器件56，半导体成像器芯片182的背表面184通过部件附接材料66耦接到绝缘基板64的第一表面62。形成绝缘结构68以封装半导体成像器芯片182的侧壁186、半导体成像器芯片182的有源表面188的部分以及绝缘基板64的在半导体成像器芯片182周围的区域中的部分。第一布线层74设置在绝缘结构68的外表面74上，并且电耦接至半导体成像器芯片182的有源表面188上的接触焊盘190。第二布线层92沉积在绝缘基板64的第二表面94上，并通过绝缘基板64和耦接至半导体成像器芯片182的背表面184的背侧热结构108形成穿透接触100、102。绝缘材料82覆盖第一布线层74、绝缘结构68的暴露部分以及绝缘基板64的暴露部分。
电子封装件180还包括透镜结构192，该透镜结构192耦接至绝缘材料82的顶面124，并且横跨具有成像功能的半导体成像器芯片182的有源表面188的暴露部分194。根据替代实施例，透镜结构192可包括单个透镜或多个透镜，或多个透镜和滤光器的组合。
电子封装件200、202的两个替代实施例在图32和图33中示出。电子封装件200和202各自包括与电子封装件54(图6)共同的多个结构，根据需要用通用零件号表示。在所示的实施例中，布线层74以与关于图6描述的类似的方式形成，并且可以包括以与图5所示的方式相似的方式或基于半导体器件56的有源表面上的接触焊盘的特定布置以任何数量的替代配置布置的电迹线。
除了电子封装件200、202和54共有的结构之外，电子封装件200、202每个包括第二绝缘结构204，该第二绝缘结构204形成在绝缘结构68的至少一部分的顶部上或与之直接相邻。可以使用本文关于绝缘结构68描述的任何相同的材料和技术来形成第二绝缘结构204。第二绝缘结构204可以形成在绝缘结构68顶部的一个或多个不离散位置处，如图32所示，或者可以完全围绕绝缘结构68，如图33所示。
使用关于布线层74所述的任何相同的材料和技术，在第二绝缘结构204的倾斜表面208上形成布线层206。布线层206通过一个或多个延伸穿过绝缘基板64的穿透接触210而电耦接到布线层92。在一些实施例中，如图32所示，另一穿透接触212可以延伸穿过第二绝缘基板112，以类似地将布线层206电耦接至形成在第二绝缘基板112之上的第三布线层214。在电子封装件200中，第二绝缘结构204被形成为具有比绝缘结构68的高度更高的高度，以促进布线层92和214之间的连接。在电子封装件202中，第二绝缘结构204被形成为具有的高度小于绝缘结构68的高度，并且布线层206在布线层74和92之间形成电连接。
布线层74和206的示例性配置在图34中示出。本领域的技术人员将认识到，布线层74和206可以基于半导体器件56的接触焊盘配置和最终电子封装件内的I/O的期望位置以多种替代配置形成。绝缘结构68、204的几何形状可以基于设计规范而与图32和图33所示的几何形状不同。这样，绝缘结构68、204的几何形状以及布线层74和206的布置不限于图32-图34所示。由绝缘基板68、204及其相关联的布线层74、206的组合产生的“双倾斜”表面构造可以结合到本文所述的任何其他电子封装件实施例中。另外，可以想到的是，双倾斜的表面构造可以扩展为包括三层或更多层的绝缘基板/布线层堆叠。
在上述每个电子封装件中，第一布线层74形成为沿着绝缘结构68的至少一个倾斜侧壁70延伸。该第一布线层74以与传统的嵌入式半导体制造技术相比，所涉更少且更简单的处理步骤的方式在各个电子部件56、166、182的接触焊盘78、80、174、190与电子封装件的相对表面之间形成电连接。通过使用倾斜侧壁70，与常规导通孔结构相比，可以实现更高水平的布线密度，这是因为所形成的第一布线层74的电迹线所占的面积小于常规导通孔结构的面积。结果，与现有技术的嵌入式器件技术相比，可以减小电子封装件的整体尺寸。与现有技术的封装技术相比，第一布线层74还产生具有较低电感和寄生或互连电阻的连接。第一布线层74的各个迹线和端子焊盘以及将第一布线层74耦接到第二布线层92的相应的穿透接触的尺寸可以在电子封装件内容易地改变。利用绝缘结构68还提供了改进的电子封装件内的散热。
与上述用于电子封装件的制造或积层技术相关联的过程或方法步骤的顺序和次序可以根据本文描述的顺序进行修改，同时仍然达到等同或基本等同的最终结构。作为一个非限制性示例，在包括第二绝缘基板112的实施例中，在将绝缘基板112结合到电子封装件内之后，可以使用底部填充技术来涂覆绝缘材料82。另外，通孔96、98、110中的一些或全部可以在半导体器件56耦接至绝缘基板64之前形成，并且第一布线层和第二布线层的形成和图案化可以同时发生或以与本文先前所述相反的顺序发生。
有利地，与现有技术的引线键合封装相比，本发明的实施例提供了更高的功率处理和性能以及更小的形状因数，与现有技术的倒装芯片封装相比，具有更高的热性能和更低的成本。与现有的现有技术的嵌入式功率封装相比，本文公开的本发明的实施例还提供了一种成本更低、转换时间更快的处理。因此，与现有技术方法相比，本文描述的实施例提供了具有更高性能的低成本解决方案。
因此，根据本发明的一个实施例，一种电子封装件包括绝缘基板、具有的背表面耦接到绝缘基板的第一表面的电子部件以及围绕电子部件的周边的至少一部分的绝缘结构。第一布线层从绝缘基板的第一表面延伸并且在绝缘结构的倾斜侧面上延伸，以与电子部件的有源表面上的至少一个接触焊盘电耦接。第二布线层形成在绝缘基板的第二表面上并延伸穿过其中的至少一个通孔以与第一布线层电耦接。
根据本发明的另一实施例，一种制造电子封装件的方法包括：将电子部件的背表面耦接到绝缘基板的第一表面；以及围绕电子部件的周边的至少一部分形成绝缘结构。该方法还包括在绝缘基板的第一表面的一部分上和绝缘结构的倾斜侧面上形成第一布线层，以与电子部件的有源表面上的至少一个接触焊盘电耦接。该方法还包括通过穿过绝缘基板形成的至少一个通孔，将第一布线层电耦接至设置在绝缘基板的第二表面上的第二布线层。
根据本发明的又一个实施例，一种电子封装件包括电子部件，其具有耦接至绝缘基板的第一表面的背表面，以及具有背离绝缘基板的有源表面，有源表面具有成像功能和光学功能中的至少一个。该电子封装件还包括绝缘结构，其围绕电子部件的周边并覆盖其有源表面的一部分。第一布线层形成在绝缘结构的倾斜侧壁上并且电耦接到电子部件的有源表面上的至少一个接触焊盘。第二布线层形成在绝缘基板的第二表面上，并通过形成在绝缘基板中的至少一个通孔而电耦接到第一布线层。
尽管仅结合有限数量的实施例详细描述了本发明，但是应当容易理解，本发明不限于这些公开的实施例。而是，可以对本发明进行修改以包含迄今未描述但与本发明的精神和范围相当的任何数量的变化、变更、替换或等同布置。另外，尽管已经描述了本发明的各种实施例，但是应当理解，本发明的方面可以仅包括所描述的实施例中的一些。因此，本发明不应被视为由前述描述限制，而仅由所附权利要求的范围限制。

Claims (20)

1.一种电子封装件，包括：
绝缘基板；
电子部件，具有耦接至所述绝缘基板的第一表面的背表面；
绝缘结构，围绕所述电子部件的周边的至少一部分；
第一布线层，从所述绝缘基板的所述第一表面起并且在所述绝缘结构的倾斜侧面上延伸，以与所述电子部件的有源表面上的至少一个接触焊盘电耦接；以及
第二布线层，形成在所述绝缘基板的第二表面上并且延伸穿过所述绝缘基板内的至少一个通孔，以与所述第一布线层电耦接。
2.根据权利要求1所述的电子封装件，其中，所述绝缘结构完全围绕所述电子部件的周边并且覆盖所述电子部件的所述有源表面的至少一部分。
3.根据权利要求1所述的电子封装件，还包括绝缘材料，所述绝缘材料形成在所述绝缘基板的一部分上并且围绕所述第一布线层和所述绝缘结构。
4.根据权利要求3所述的电子封装件，其中，所述电子部件和所述绝缘材料位于所述绝缘基板与另一绝缘基板之间。
5.根据权利要求1所述的电子封装件，其中，所述第一布线层包括：电耦接至所述电子部件的所述至少一个接触焊盘中的多个接触焊盘的多个电迹线。
6.根据权利要求5所述的电子封装件，其中，所述第二布线层包括：
第一电迹线，延伸穿过所述绝缘基板中的第一通孔，以与所述多个电迹线中的第一电迹线电耦接；以及
第二电迹线，延伸穿过所述绝缘基板中的第二通孔，以与所述多个电迹线中的第二电迹线电耦接。
7.根据权利要求6所述的电子封装件，其中，所述第二电迹线穿过所述绝缘基板中的第三通孔而电耦接至所述电子部件的所述背表面。
8.根据权利要求1所述的电子封装件，其中，所述第一布线层延伸穿过所述绝缘结构中的至少一个通孔，以与所述电子部件的所述至少一个接触焊盘电耦接。
9.根据权利要求1所述的电子封装件，还包括：
接合层，涂布到所述第一布线层和所述绝缘结构的暴露表面；以及
导热结构，具有耦接至所述接合层的第一表面。
10.根据权利要求1所述的电子封装件，还包括无源部件，所述无源部件通过所述第一布线层电耦接到所述电子部件。
11.一种制造电子封装件的方法，包括：
将电子部件的背表面耦接到绝缘基板的第一表面；
围绕所述电子部件的周边的至少一部分形成绝缘结构；
在所述绝缘基板的所述第一表面的部分上并且经由所述绝缘结构的倾斜侧面形成第一布线层，以与所述电子部件的有源表面上的至少一个接触焊盘电耦接；以及
通过穿过所述绝缘基板而形成的至少一个通孔，将所述第一布线层电耦接到设置在所述绝缘基板的第二表面上的第二布线层。
12.根据权利要求11所述的方法，还包括：形成具有经由所述绝缘结构的所述倾斜侧面延伸的电迹线的图案的所述第一布线层，以将所述电子部件的相应接触焊盘电耦接至所述第二布线层的相应部分。
13.根据权利要求11所述的方法，还包括：
形成穿过所述绝缘基板的多个通孔；以及
将所述第二布线层设置在所述绝缘基板的第二表面上，以延伸穿过所述多个通孔中的至少一个通孔，从而与所述第一布线层电耦接，并且延伸穿过所述多个通孔中的另一个通孔从而与所述电子部件的背表面进行电耦接和热耦接中的至少一种。
14.根据权利要求11所述的方法，还包括：利用绝缘材料围绕所述第一布线层和所述绝缘结构。
15.根据权利要求14所述的方法，还包括：
将支撑基板耦接到所述绝缘基板，所述支撑基板具有在所述支撑基板内形成的大小设定成围绕所述电子部件的开口；以及
将所述绝缘材料布置在所述开口内。
16.根据权利要求11所述的方法，还包括：
利用接合材料涂覆所述第一布线层和所述绝缘结构的暴露部分以及所述绝缘基板的所述第一表面的暴露部分；
在电绝缘材料的顶部上布置导热结构；以及
穿过所述绝缘基板中的至少一个通孔，将所述第二布线层耦接到所述导热结构。
17.一种电子封装件，包括：
电子部件，具有耦接至绝缘基板的第一表面的背表面以及背对所述绝缘基板的有源表面，所述有源表面具有成像功能和光学功能中的至少一种；
绝缘结构，围绕所述电子部件的周边并且覆盖所述电子部件的所述有源表面的一部分；
第一布线层，形成在所述绝缘结构的倾斜侧壁上并且电耦接到所述电子部件的所述有源表面上的至少一个接触焊盘；以及
第二布线层，形成在所述绝缘基板的第二表面上，并且穿过在所述绝缘基板中形成的至少一个通孔而电耦接到所述第一布线层。
18.根据权利要求17所述的电子封装件，还包括：位于所述电子部件的所述有源表面的顶上的至少一个透镜。
19.根据权利要求17所述的电子封装件，还包括：围绕所述绝缘结构和至少一部分所述第一布线层的绝缘材料。
20.根据权利要求17所述的电子封装件，其中，所述第二布线层穿过在所述绝缘基板中形成的另一通孔而耦接至所述电子部件的所述背表面。
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