CN104900556A - Method for online monitoring of integrity of gate oxide - Google Patents
Method for online monitoring of integrity of gate oxide Download PDFInfo
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- CN104900556A CN104900556A CN201510216570.9A CN201510216570A CN104900556A CN 104900556 A CN104900556 A CN 104900556A CN 201510216570 A CN201510216570 A CN 201510216570A CN 104900556 A CN104900556 A CN 104900556A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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Abstract
The invention provides a method for online monitoring of the integrity of a gate oxide. The method is free from redesign of a large-area test structure, sacrifice of the area of batch-production products and additional wafers for technical product monitoring and decreases the cost. An integrity test is performed on the gate oxide by means of a quantity greater than or equal to a minimum sample quantity obtained according to the method, only single-point current values under the voltage of a predetermined failure mode in the test are tested for each GOI test structure, the test speed is quite fast, and no influences are exerted on batch-production product queuing time Q-time. Since data collection of the GOI structures on the batch-production products is realized within a certain time period of a current process, the problem of the gate oxide defect of the batch-production product within a certain interval of the current process can be accurately determined, the reliability problem of the integrity of the gate oxide is discovered timely, and the effects of online real-time monitoring and timely problem discovery are achieved.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of method of on-line monitoring gate oxide integrity.
Background technology
Along with the develop rapidly of very lagre scale integrated circuit (VLSIC) (VLSI) and ultra large scale integrated circuit (ULSI), the size of MOS device constantly reduces.For increasing the reaction speed of device, improving the capacity of drive current and storage capacitance, in device, the thickness of gate oxide constantly reduces, and is down to several nanometer by 20 ~ 30nm.But while device size scaled down, operating voltage does not but have correspondingly Scaling, thus makes the electric field strength in thin gate oxide increase, the puncture voltage of device reduces; On the other hand, existing defects in gate oxide, surface are uneven, and there will be internal field concentrates, and easily produces internal discharge and forms many conductive channels, reduces puncture voltage equally.And the generation of leakage current is often relevant with the charged impurity in gate oxide.When there is positive charge in gate oxide, when gate oxide thickness is uneven, internal field in thinner region is very strong, make the lower thickness at potential barrier tip, tunnel current (electronics flows to semiconductor from polysilicon or metal gates) can be produced when negative gate voltage, thus form leakage current.The reliability of gate oxide becomes distinct issues and challenge, gate oxide resistance to voltage is bad will cause the instability of MOS device electrical quantity, as the drift of threshold voltage, mutual conductance decline, leakage current increase etc., puncturing of gate oxide can be caused further, cause the inefficacy of device, whole integrated circuit is paralysed state.Therefore, the integrality of gate oxide has vital effect for the raising of performance of integrated circuits.Along with the progress of integrated circuit technology and reducing of size, the test for gate oxide integrity (gate oxide integrity is called for short GOI) also becomes an important difficult problem gradually.Gate oxide integrity (GOI) test is the test process of checking quality of gate oxide, and the gate oxide integrity usually using ramp voltage (Vramp) to test for semiconductor device at present detects.The breakdown characteristics etc. of tested semiconductor device under ramp voltage stress can be reflected by ramp voltage test, thus reference role is played to the gate oxide integrity detecting semiconductor device, particularly, apply the voltage being added in the ladder rising of grid until gate oxide breakdown, by judging that the size of gate oxide breakdown voltage weighs defect type, generally divide two kinds of failure modes: mode A and mode B, as shown in Figure 1.Calculate that whether defect concentration is up to standard in conjunction with test area, such method of testing there are certain requirements test structure (testkey) design, and the sample gross area of each assessment of such as industrywide standard JESD35 and JEP001A suggestion needs to reach 10cm
2, also can calculate according to formula (1) sample number selected:
N*A
TEST>-ln(1-0.95)/D
0----(1)
Wherein, N is gross sample number; A
tESTit is the area of each GOI test structure; D
0it is defect concentration specification.
So in order to reduce test sample number, test structure (testkey) design will be quadratured very large, cause volume production product cannot place test structure, on-line monitoring volume production product cannot be implemented.Now general way test structure is placed on test certification carrier (TQV, technology qualification vehicle) wafer is produced separately, monitor after dispatching from the factory, cost of idleness on the one hand, Vramp test required time is also longer on the other hand, if noted abnormalities, result traces back to technological problems again, and the whole cycle is just very long, loses the ageing of monitoring.
Summary of the invention
The object of the present invention is to provide a kind of method of on-line monitoring gate oxide integrity, real-time testing can be carried out to gate oxide integrity on volume production product, shorten the testing time, and can assess and judge that whether defect concentration is up to standard, Timeliness coverage process sex chromosome mosaicism.
For solving the problem, the present invention proposes a kind of method of on-line monitoring gate oxide integrity, comprising:
According to sample frequency and the defect concentration specification of setting, obtain the minimum number of samples being used for monitoring analysis;
Choose be more than or equal to described minimum number of samples volume production product as the amount product sample for monitoring analysis, this Cutting Road of described volume production product is provided with GOI test structure;
Choose GOI test structure according to described sample frequency from each amount product sample, each GOI test structure is applied to the voltage of predetermined failure mode, measure the gate voltage value of each GOI test structure under the voltage of predetermined failure mode respectively;
By all gate voltage value of measuring and current standard comparison, whether the current process assessing described amount product sample place exists gate oxide integrity problem.
Further, according to formula N*A
tEST>-ln (1-0.95)/D
0/ K, obtain the minimum number of samples of monitoring analysis, wherein, N is number of samples, A
tESTit is the area of each GOI test structure; D
0be defect concentration specification, K is sample frequency.
Further, the defect concentration specification of predetermined failure mode is different, according to the sample frequency of setting and the defect concentration specification of predetermined failure mode, obtains the minimum number of samples of the predetermined failure mode being used for monitoring analysis.
Further, described sample frequency is the sample frequency of WAT test.
Further, described predetermined failure mode is one or more.
Further, after the voltage of predetermined failure mode is applied to each GOI test structure, after Preset Time is stable, then measure the gate voltage value of each GOI test structure under described voltage.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity in determined amounts product sample;
If the inefficacy quantity in amount product sample is less than or equal to targeted failure quantity, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If the inefficacy quantity in amount product sample is greater than targeted failure quantity, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity in determined amounts product sample;
According to the inefficacy quantity in amount product sample, the defect concentration of acquisition amount product sample;
The defect concentration of amount product sample and described defect concentration specification are compared;
If the defect concentration of amount product sample is less than or equal to described defect concentration specification, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If the defect concentration of amount product sample is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity under the failure mode of the inefficacy sample in determined amounts product sample and each failure mode;
According to the inefficacy quantity under each failure mode, the actual defects density of the product sample of acquisition amount respectively under each failure mode;
Compare by the actual defects density under each failure mode and the defect concentration specification under described failure mode;
If described actual defects density is less than or equal to described defect concentration specification, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If described actual defects density is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
Further, the method of described on-line monitoring gate oxide integrity is performed according to certain monitoring analysis frequency, and after determining that the current process at described amount product sample place exists gate oxide integrity problem, increase the method that monitoring analysis frequency performs described on-line monitoring gate oxide integrity.
Compared with prior art, the method of the on-line monitoring gate oxide integrity that the present invention proposes, first, be different from the mode of the large area test structure on the test certification carrier wafer being placed on production separately of the prior art, neither need to sacrifice the device region area on volume production product, do not need additionally to throw sheet to monitor for handicraft product, directly can form suitable test structure to complete test by utilization product Cutting Road area, greatly provide cost savings yet; Secondly, only test the single-point current value under predetermined failure mode due to every sample in test, test speed is very fast, can not impact the queue time of volume production product, greatly shortens test required time; For the Data Collection on volume production product in a period of time, accurately can judge the problem of grid oxygen defect in a certain interval, achieve the ageing of monitoring.
Accompanying drawing explanation
Fig. 1 is the gate oxide breakdown voltage Weir cloth welbull distribution map in traditional Vramp test;
Fig. 2 is the I-V characteristic curve of gate oxide breakdown characteristic during traditional Vramp tests;
Fig. 3 is the method flow diagram of the on-line monitoring gate oxide integrity of the specific embodiment of the invention;
Fig. 4 is gate current distribution map under the predetermined failure mode voltage that measures of the specific embodiment of the invention.
Embodiment
Gate oxide integrity (GOI) test principle of the present invention is as follows:
Conventional Vramp test, stepped-up voltage linearly increases until sample breakdown, as shown in Figure 2, gate current corresponding under indicating different voltage in the I-V curve of every sample breakdown characteristic, if increase such test on volume production product, on volume production product, each test point (lot) testing time roughly increases by 4 hours, considers production capacity and queue time Q-time problem, and the Vramp of this routine test is also infeasible.And according to JEDEC standard, can by the value of the puncture voltage of correspondence, be A, B, C different mode the sample group of gate oxide integrity (GOI) test, as the standard that judgement sample lost efficacy, wherein pattern C (mode C) lost efficacy is normal inefficacy, show that the gate oxide of this sample is complete, zero defect, Mode A, B (mode A, mode B) inefficacy interpret sample have the problem such as gate oxide defect, thickness evenness.Obviously, when passing judgment on sample according to testing result and whether passing through gate oxide integrity (GOI) test, the target data whether reaching mode A or mode B can mainly be seen.Therefore, method of testing of the present invention is different from conventional Vramp test, but the gate voltage value measuring under measurement products sample mode A and mode B these two kinds predetermined failure mode voltages respectively (current value under the voltage specification VmodeA (the mode A Vspec namely in Fig. 1) of such as corresponding mode A is Ia=Ig
vmodeA, the current value under the voltage specification VmodeB (the mode B Vspec namely in Fig. 1) of corresponding mode B is Ib=Ig
vmodeB), the gate voltage value recorded and current standard (Ispec) comparison are judged it is belong to which kind of failure mode in mode A and mode B, can to lose efficacy quantity according to sample thus, judge whether this test reaches the target data of mode A or mode B, judge current process and whether there is gate oxide integrity problem.
For making object of the present invention, feature becomes apparent, and be further described, but the present invention can realize by different forms, should just not be confined to described embodiment below in conjunction with accompanying drawing to the specific embodiment of the present invention.
Please refer to Fig. 4, the present invention proposes a kind of method of on-line monitoring gate oxide integrity, comprising:
S1, according to sample frequency and the defect concentration specification of setting, obtains the minimum number of samples being used for monitoring analysis;
S2, choose be more than or equal to described minimum number of samples volume production product as the amount product sample for monitoring analysis, this Cutting Road of described volume production product is provided with GOI test structure;
S3, chooses GOI test structure according to described sample frequency from each amount product sample, each GOI test structure is applied to the voltage of predetermined failure mode, measures the gate voltage value of each GOI test structure under the voltage of predetermined failure mode respectively;
S4, by all gate voltage value of measuring and current standard comparison, whether the current process assessing described amount product sample place exists gate oxide integrity problem.
In step sl, for being identical as the mode A of measurement result benchmark and the target data of mode B, also can be different.Target data can be sample fails quantity (inefficacy is counted) or defect concentration.Using defect concentration as assessment formula target data used, according to formula N*A
tEST>-ln (1-0.95)/D
0/ K, obtain the minimum number of samples of monitoring analysis, wherein, N is number of samples, A
tESTit is the area of each GOI test structure, D
0it is defect concentration specification, K is sample frequency, can calculate under specific defect concentration specification according to above-mentioned formula, the data of collecting how many volume production product are needed just to allow inefficacy 1 GOI test structure specific as follows: sample frequency K is identical with the sample frequency of WAT test volume product in setting, such as, choose 9 points above every batch every sheet volume production product, K=9, namely represent that from every sheet amount product sample, choose 9 GOI test structures (being actually 9 test MOS chip structures) tests, suppose that single sample area (being often referred to gate oxide area in 1 GOI test structure) is 11880 μm
2, because mode B inefficacy specification meets defect concentration specification D
0<1/cm
2just, namely 1cm is met
21 GOI test structure is not inside had to be that mode B lost efficacy, so only need to sample n>-ln (1-0.95)/1/ (11880 ÷ 1E+8), namely 25217, due to K=9 (namely WAT tests every sheet 9 die), thus the data gathering N=25217 ÷ 9=2802 sheet volume production product to carry out test analysis just much of that.Therefore when selecting sample frequency K=9, the defect concentration specification D of mode B
0<1/cm
2after, need choose 2802 volume production product as test sample book, each amount product sample be chosen 9 GOI test structures and carry out gate oxide integrity (GOI) test, if find that there is m chip failing, the defect concentration that can calculate current chip under test is ρ=m/ (A
tEST* 25217) defect concentration and the defect concentration specification D of current chip under test can, then obviously be seen
0size.According to this test result, then can judge whether current process exists gate oxide integrity problem.It should be noted that the sample frequency of WAT test volume product, be not limited only to every built-in testing 9 points, also can be other arbitrary frequencies, such as every built-in testing 5 points, 11 points etc., therefore, the sample frequency of gate oxide integrity (GOI) test of the present invention is also not only limited to choose 9 GOI test structures from each amount product sample, also can be other frequencies, each amount product sample such as, choose 5 or 11 GOI test structures, the number of the GOI test structure namely chosen from each amount product sample does not limit, the number of the number GOI test structure that all amount product samples are chosen can be identical, also can be different.
It should be noted that, mode A can be identical with the defect concentration specification of mode B failure mode, also can be different, during assessment test result, two kinds of inefficacies can splitting ratio pair, also can add and comparison, if splitting ratio pair, in measurement result, the target data comparison of mode A data and mode A (such as tests the actual defects density of the mode A obtained and the defect concentration specification comparison of mode A, or test the considered repealed quantity of mode A that obtains and the targeted failure number ratio of mode A to), the target data comparison of mode B data and mode B; When adding with comparison, J=mode A data+mode B data and J in measurement result
0the target data comparison of the target data+mode B of=mode A (such as test the actual defects density of the mode A obtained, test the actual defects density of the mode B obtained and, with the defect concentration specification of mode A, the defect concentration specification of mode B and comparison, or test the total considered repealed quantity of the mode A that obtains and mode B and the total targeted failure number ratio of mode A and mode B to).Obviously, because mode A can be identical with the defect concentration specification of mode B failure mode, also can be different, so the minimum number of samples of the mode A of monitoring analysis and mode B failure mode can be different, also can be identical.
In step s 2, first, in each unit of volume production product of the present invention, a part of area is the functional module of product, and another part area is specially for the module of test.GOI test structure does not need to design very large area, and volume is little, can be placed on the Cutting Road of product function intermodule, with the maximum area that can put down for principle designs, with favourable raising test accuracy.After test terminates, volume production product are in the process of section encapsulation, and the area shared by GOI test structure also can be cut off, and improves the area utilization of volume production product to a certain extent.Secondly, this step to choose be more than or equal to described minimum number of samples N volume production product as the amount product sample for monitoring analysis.
In step s3, test according to the sample frequency of WAT test volume product, namely on each volume production product Cutting Road, choose 9 suitable GOI test structures, measure the gate voltage value (Ia=IgVmodeA, Ib=IgVmodeB) of each GOI test structure under mode A and mode B failure mode voltage respectively.Test due to such making alive amount electric current is simple and speed is very fast, substantially reduces the testing time.Consider that sample (GOI test structure) adds the pulsing effect of transient voltage, after test voltage is applied to each GOI test structure, the stable of certain short time (ms level) can be waited for, measure the gate voltage value of this GOI test structure under described voltage again, to improve measurement accuracy.
In step s 4 which, all gate voltage value Ia, the Ib and current standard Ispec (such as Ispec=0.1 milliampere) comparison that arrive will be measured, to judge each GOI test structure belongs to mode A, mode B, which kind of failure mode of mode C.Way draws gate current distribution map under mode A as shown in Figure 4 and mode B failure mode voltage more intuitively, the sample (GOI test structure) lost efficacy under mode A and mode B failure mode respectively can be seen, in figure, there are two mode B failpoints (2 black bars on the left of Fig. 4) and 1 mode A failpoint (1 grey initial point on the left of Fig. 4) in left side, the inefficacy quantity of the mode A thus in determined amounts product sample and mode B failure mode.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
If the inefficacy quantity in amount product sample is less than or equal to targeted failure quantity, then determine that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process, the targeted failure quantity of such as mode A is 2, the targeted failure quantity of mode A is 3, test result then according to Fig. 4 can determine that the current process at described amount product sample place does not exist gate oxide integrity problem, continues the optimum configurations amount of the carrying out production according to described current process;
If the inefficacy quantity in amount product sample is greater than targeted failure quantity, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
According to the inefficacy quantity in amount product sample, the defect concentration of acquisition amount product sample, as shown in Figure 4, find that there is 2 mode B chip failings, 1 mode A chip failing, the defect concentration that can calculate current amount product sample is D=(1+2)/((11880 ÷ 1E+8) * 25217)=1/cm
2;
By the defect concentration of amount product sample and described defect concentration specification D
0totalcompare, such as defect concentration specification D
0total=D
0modeA+ D
0modeB=(0.5+1)/cm
2;
If the defect concentration of amount product sample is less than or equal to described defect concentration specification, then determine that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process, such as D<D
0total, then directly can determine that the current process at described amount product sample place does not exist gate oxide integrity problem;
If the defect concentration of amount product sample is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
Further, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
According to the inefficacy quantity under each failure mode, the actual defects density of the product sample of acquisition amount respectively under each failure mode, as shown in Figure 4, finds that there is 2 mode B chip failings, 1 mode A chip failing, D
modeB=2/ ((11880 ÷ 1E+8) * 25217)=0.67/cm
2, D
modeA=1/ (11880 ÷ 1E+8*25217)=0.33/cm
2;
Compare by the actual defects density under each failure mode and the defect concentration specification under described failure mode, such as D
modeB=0.67/cm
2with D
0modeB=1/cm
2relatively, D
modeA=0.33/cm
2with D
0modeA=0.5/cm
2relatively;
If described actual defects density is less than or equal to described defect concentration specification, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process, such as, obtain D
modeB<D
0modeB=1/cm
2, D
modeA<D
0modeA=0.5/cm
2, then determine that the current process at described amount product sample place does not exist gate oxide integrity problem;
If described actual defects density is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process, as long as namely there is D
modeB>D
0modeBor D
modeA>D
0modeA, then determine that the current process at described amount product sample place exists gate oxide integrity problem.
Preferably, set the on-line monitoring that certain monitoring analysis frequency carries out gate oxide integrity, such as assess weekly once, the data of 2802 completed before so just choosing this week (containing) analyze whether there is failpoint, have carried out the on-line monitoring of gate oxide integrity.If determine that the current process at described amount product sample place exists gate oxide integrity problem, need to increase monitoring analysis frequency.
What need further instruction is, the predetermined failure mode that the various embodiments described above are chosen comprises the substandard mode A of JEDEC and mode B two kinds of patterns, but in other embodiments of the invention, different according to the object of gate oxide integrity (GOI) test, predetermined failure mode voltage is not limited to mode A and mode B two kinds of patterns, also can be only have a kind of failure mode or comprise two or more failure mode.
In sum, the method for on-line monitoring gate oxide integrity provided by the invention, does not need to redesign large-area test structure, does not sacrifice the area on volume production product, does not need additionally to throw sheet and monitors for handicraft product, provide cost savings; Gate oxide integrity (GOI) test is carried out to be more than or equal to the smallest sample number obtained according to said method, and each GOI test structure only tests the single-point current value of voltage under predetermined failure mode in test, test speed is very fast, can not impact volume production product queuing time Q-time; Owing to being the Data Collection for GOI test structure on volume production product in current process a period of time, so the problem of the grid oxygen defect accurately judging volume production product in a certain interval of current process can be helped, the integrity problem of Timeliness coverage gate oxide integrity, achieves on line real-time monitoring and the effect of Timeliness coverage problem.
Obviously, those skilled in the art can carry out various change and modification to invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (10)
1. a method for on-line monitoring gate oxide integrity, is characterized in that, comprising:
According to sample frequency and the defect concentration specification of setting, obtain the minimum number of samples being used for monitoring analysis;
Choose be more than or equal to described minimum number of samples volume production product as the amount product sample for monitoring analysis, this Cutting Road of described volume production product is provided with GOI test structure;
Choose GOI test structure according to described sample frequency from each amount product sample, each GOI test structure is applied to the voltage of predetermined failure mode, measure the gate voltage value of each GOI test structure under the voltage of predetermined failure mode respectively;
By all gate voltage value of measuring and current standard comparison, whether the current process assessing described amount product sample place exists gate oxide integrity problem.
2. the method for on-line monitoring gate oxide integrity as claimed in claim 1, is characterized in that, according to formula N*A
tEST>-ln (1-0.95)/D
0/ K, obtain the minimum number of samples of monitoring analysis, wherein, N is number of samples, A
tESTit is the area of each GOI test structure; D
0be defect concentration specification, K is sample frequency.
3. the method for on-line monitoring gate oxide integrity as claimed in claim 1, it is characterized in that, the defect concentration specification of predetermined failure mode is different, according to the sample frequency of setting and the defect concentration specification of predetermined failure mode, obtain the minimum number of samples of the predetermined failure mode being used for monitoring analysis.
4. the method for on-line monitoring gate oxide integrity as claimed any one in claims 1 to 3, is characterized in that, described sample frequency is the sample frequency of WAT test.
5. the method for on-line monitoring gate oxide integrity as claimed in claim 1, it is characterized in that, described predetermined failure mode is one or more.
6. the method for on-line monitoring gate oxide integrity as claimed in claim 1, it is characterized in that, after the voltage of predetermined failure mode is applied to each GOI test structure, after Preset Time is stable, then measure the gate voltage value of each GOI test structure under described voltage.
7. the method for on-line monitoring gate oxide integrity as claimed in claim 1, it is characterized in that, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity in determined amounts product sample;
If the inefficacy quantity in amount product sample is less than or equal to targeted failure quantity, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If the inefficacy quantity in amount product sample is greater than targeted failure quantity, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
8. the method for on-line monitoring gate oxide integrity as claimed in claim 1, it is characterized in that, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity in determined amounts product sample;
According to the inefficacy quantity in amount product sample, the defect concentration of acquisition amount product sample;
The defect concentration of amount product sample and described defect concentration specification are compared;
If the defect concentration of amount product sample is less than or equal to described defect concentration specification, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If the defect concentration of amount product sample is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
9. the method for on-line monitoring gate oxide integrity as claimed in claim 3, it is characterized in that, whether the current process assessing described amount product sample place exists gate oxide integrity problem, comprising:
By all gate voltage value of measuring and current standard comparison, the inefficacy quantity under the failure mode of the inefficacy sample in determined amounts product sample and each failure mode;
According to the inefficacy quantity under each failure mode, the actual defects density of the product sample of acquisition amount respectively under each failure mode;
Compare by the actual defects density under each failure mode and the defect concentration specification under described failure mode;
If described actual defects density is less than or equal to described defect concentration specification, then determines that the current process at described amount product sample place does not exist gate oxide integrity problem, continue the optimum configurations amount of the carrying out production according to described current process;
If described actual defects density is greater than described defect concentration specification, then determine that the current process at described amount product sample place exists gate oxide integrity problem, adjust and the amount of proceeding production after improving the optimum configurations of described current process.
10. the method for the on-line monitoring gate oxide integrity as described in claim 1 or 6, it is characterized in that, the method of described on-line monitoring gate oxide integrity is performed according to certain monitoring analysis frequency, and after determining that the current process at described amount product sample place exists gate oxide integrity problem, increase the method that monitoring analysis frequency performs described on-line monitoring gate oxide integrity.
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