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CN102176443A - Structure and method for testing breakdown reliability of oxide layer - Google Patents

Structure and method for testing breakdown reliability of oxide layer Download PDF

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Publication number
CN102176443A
CN102176443A CN 201110044418 CN201110044418A CN102176443A CN 102176443 A CN102176443 A CN 102176443A CN 201110044418 CN201110044418 CN 201110044418 CN 201110044418 A CN201110044418 A CN 201110044418A CN 102176443 A CN102176443 A CN 102176443A
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oxide layer
substrate
electric capacity
test
breakdown
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何燕冬
张钢刚
刘晓彦
张兴
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Peking University
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Peking University
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Abstract

本发明公开了一种用于测试氧化层击穿可靠性的结构及方法,该结构包括具有不同面积的多个氧化层电容,多个氧化层电容共享同一个栅极,每个氧化层电容包括一个衬底,且各个氧化层电容的衬底相互分离。本发明的测试结构不仅可以使用常规的半导体参数测试设备,而且仅一次测量就可以获得多个氧化层击穿数据,因此在没有增加测试设备成本的前提下,提高了测试效率。

Figure 201110044418

The invention discloses a structure and method for testing the breakdown reliability of an oxide layer. The structure includes a plurality of oxide layer capacitors with different areas, and the plurality of oxide layer capacitors share the same gate, and each oxide layer capacitor includes One substrate, and the substrates of each oxide capacitor are separated from each other. The testing structure of the present invention not only can use conventional semiconductor parameter testing equipment, but also can obtain multiple oxide layer breakdown data with only one measurement, thus improving testing efficiency without increasing the cost of testing equipment.

Figure 201110044418

Description

Be used to test the structure and the method for oxide layer breakdown reliability
Technical field
The present invention relates to MOS device reliability research field, relate in particular to a kind of structure and method that is used to test the oxide layer breakdown reliability.
Background technology
Along with the develop rapidly of semiconductor technology and the significantly raising of microelectronic chip integrated level, integrated circuit (IC) design and level of processing have entered the nanometer MOS epoch, that brings therefrom causes nanometer MOS device performance degeneration, and the factor that influences device reliability constantly occurs.The time to become dielectric breakdown (become when being also referred to as and puncture) be a kind of dielectric punch-through relevant with the time.Gate oxide is the heart of MOS device, aspect the assessment of MOS device reliability, become dielectric breakdown (Time-Dependent Dielectric Breakdown during with gate oxide, TDDB) Xiang Guan puncture is one of important index, conventional method of testing is that a large amount of samples is punctured test, obtains statistical life and predicts the outcome.And conventional test structure is single oxide layer electric capacity, by the oxide layer capacitance structure being applied constant voltage or constant current stress, obtain the corresponding oxide layer breakdown time, carry out statistical analysis again and obtain the life prediction result, therefore need on different test structures, carry out repeatedly reliability measurement.And, therefore, need carry out a considerable amount of sample tests owing to the failure prediction based on gate oxide breakdown is a process based on statistical law.
The profile of the test structure of routine above-mentioned and top view are respectively shown in (a) and (b) among Fig. 1, this oxide layer capacitance structure is a two terminal device, is respectively gate electrode and underlayer electrode, and wherein Tox represents the thickness of gate oxide, L represents length, and W represents width.When conducting oxide layer punctures reliability testing, between grid and substrate, add a constant voltage, flow through the electric current of gate oxide from grid or substrate measurement, typical circuit test configuration is shown in (a) and (b) among Fig. 2, wherein PAD represents pressure welding point, DUT represents measured device-above-mentioned oxide layer capacitance structure, when Fig. 2 is illustrated in the electric current at test gate oxide two ends, at grid and substrate two ends a pressure welding point is arranged respectively, during measurement, apply a fixed voltage at grid, insert the electric current gauge outfit at substrate.Typical Constant Pressure Stress oxide layer breakdown electric current change curve as shown in Figure 3, after constant voltage is applied on the test structure, grid current changes with stress time, after after a while, grid (substrate) electric current increases suddenly, current value increases to certain critical value, and this time that current break takes place just is defined as t breakdown time BD
Summary of the invention
(1) technical problem that will solve
The technical problem to be solved in the present invention is: how to provide a kind of only one-shot measurement just can obtain a plurality of oxide layer breakdown data, and under the prerequisite that does not increase the testing equipment cost, improve the oxide layer breakdown method for testing reliability of testing efficiency.
(2) technical scheme
For solving the problems of the technologies described above, the invention provides a kind of structure that is used to test the oxide layer breakdown reliability, comprise a plurality of oxide layer electric capacity with different area, a plurality of oxide layer electric capacity are shared same grid, each oxide layer electric capacity comprises a substrate, and the substrate of each oxide layer electric capacity is separated from each other.
Wherein, described structure is four end structures, comprises four pressure welding point.
Wherein, described oxide layer electric capacity is three.
The present invention also provides a kind of method of utilizing said structure test oxide layer breakdown reliability, apply a fixed voltage at described grid, substrate at each oxide layer electric capacity connects an ammeter respectively, test the electric current of each substrate of flowing through, in case the electric current generation saltus step of substrate is arranged, writing time, be oxide layer breakdown time of the oxide layer electric capacity of this substrate correspondence.
The present invention provides a kind of method of utilizing described structure to determine the form factor of Weibull distribution again.
(3) beneficial effect
The oxide layer electric capacity of the present invention integrated different area or quantity in a test structure, design (being the technology that a plurality of oxide layer electric capacity are shared same grid) by common grid, make test structure have only four pressure welding point (PAD), not only can use conventional semiconductor parametric test equipment, saved the testing equipment cost, and only one-shot measurement just can obtain a plurality of oxide layer breakdown data, therefore under the prerequisite that does not increase the testing equipment cost, has improved testing efficiency.In addition, oxide layer breakdown reliability testing structure of the present invention can be used for determining the form factor (β) of Weibull distribution (can be described as Weibull distribution or Weibull distribution).
Description of drawings
Fig. 1 is oxide layer breakdown test structure schematic diagram commonly used;
Fig. 2 is the circuit test configuration schematic diagram of oxide layer breakdown test structure commonly used;
Fig. 3 is typical Constant Pressure Stress oxide layer breakdown electric current change curve;
Among Fig. 4 (a) and (b) be respectively structural representation of the present invention and circuit test connection layout;
Fig. 5 is the test result schematic diagram of test structure of the present invention;
Fig. 6 is the oxide layer life-span of different area device correspondence, and the slope of straight line is the inverse of the form factor (β) of Weibull distribution.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples are used to illustrate the present invention, but are not used for limiting the scope of the invention.
Shown in (a) among Fig. 4, the present invention integrates three oxide layer electric capacity (i.e. three oxide layer breakdown test structures) of different area by sharing same grid, A1, A2, A3 represent the area (for the area of each gate oxide) of single oxide layer electric capacity (its structure as shown in Figure 1) respectively, here suppose A1<A2<A3, by sharing same grid, and constituted one four end (four PAD) structure with the substrate of its each self-separation.
When puncturing test as (b) conducting oxide layer among Fig. 4, apply a fixed voltage at the grid of sharing, substrate in each self-separation inserts ammeter, test the substrate current on each road, when substrate current generation saltus step, show that puncture has taken place the pairing oxide layer of this electric current, because the area difference of three oxide layer electric capacity, so the asynchronism(-nization) of puncture takes place.Become during oxide layer and reduce with the increase of oxide layer area breakdown time, as shown in Figure 5, t wherein BD1>t BD2>t BD3This shows, at the longest t BD1In time, the disposable measurement of finishing three devices, always saving time reaches t BD2+ t BD3When three oxide layer electric capacity have under the situation of the same area, because the statistical property of oxide layer breakdown, therefore the three breakdown time can be not identical, and the device that punctures has at the latest determined maximum Measuring Time, similarly can obtain three breakdown time test data.
Continuous progress along with integrated circuit technology, oxidated layer thickness is proportional to be dwindled, the form factor β that distributes for superthin grid oxide layer breakdown Weibull reduces gradually, means that the oxide layer life prediction increases the susceptibility of area and failure rate conversion, can be by following The Representation Equation:
T ( lifetime ) T ( test ) ≈ ( A ( test ) A ( chip ) F ( chip ) F ( test ) ) 1 / β - - - ( 1 )
Above-mentioned equation is a gate oxide life prediction equation of the prior art.Wherein T (lifetime), T (test) are respectively the breakdown time of predicting and measuring, A (chip), A (test) are respectively equivalent chip area and test structure area (this test structure area is A1, the A2 in the foregoing description, any one among the A3), and F (chip), F (test) are respectively the failure rate of life prediction and measurement.Therefore, utilize the sample of different area can determine the form factor β that Weibull distributes, promptly calculate by straight slope shown in Fig. 6, Fig. 6 is the oxide layer life-span of different area device correspondence, and the slope of straight line is the inverse of the form factor (β) of Weibull distribution.Among Fig. 6, T BDThe breakdown time that the expression test obtains, Area represents the area of test structure, and Vg represents grid voltage, T BD@63% pairing gate oxide breakdown time when puncturing failure rate 63%, when F in the predictive equation (test)=constant (as 63%), equation (1) can be reduced to
Figure BDA0000047668570000042
A mAnd A nBe different gate oxide areas, be among A1, A2, the A3 each.
The oxide layer electric capacity of the present invention integrated different area (area that specifically refers to gate oxide) or quantity in a test structure, adopt the common gate technology, make test structure have only four pressure welding point (PAD), not only can use conventional semiconductor parametric test equipment, saved the testing equipment cost, and can be on conventional semiconductor parametric tester, only one-shot measurement just can obtain a plurality of oxide layer breakdown data, therefore under the prerequisite that does not increase the testing equipment cost, improved testing efficiency.In addition, oxide layer breakdown reliability testing structure of the present invention can be used for determining the form factor (β) of Weibull distribution.
Above execution mode only is used to illustrate the present invention; and be not limitation of the present invention; the those of ordinary skill in relevant technologies field; under the situation that does not break away from the spirit and scope of the present invention; can also make various variations and modification; therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.

Claims (5)

1. structure that is used to test the oxide layer breakdown reliability, it is characterized in that comprise a plurality of oxide layer electric capacity with different area, a plurality of oxide layer electric capacity are shared same grid, each oxide layer electric capacity comprises a substrate, and the substrate of each oxide layer electric capacity is separated from each other.
2. structure as claimed in claim 1 is characterized in that described structure is four end structures, comprises four pressure welding point.
3. structure as claimed in claim 1 is characterized in that, described oxide layer electric capacity is three.
4. method of utilizing the structured testing oxide layer breakdown reliability of claim 1 or 2 or 3, it is characterized in that, apply a fixed voltage at described grid, substrate at each oxide layer electric capacity connects an ammeter respectively, test the electric current of each substrate of flowing through, in case the electric current generation saltus step of substrate is arranged, writing time, is oxide layer breakdown time of the oxide layer electric capacity of this substrate correspondence.
5. a structure of utilizing claim 1 or 2 or 3 is determined the method for the form factor of Weibull distribution.
CN 201110044418 2011-02-23 2011-02-23 Structure and method for testing breakdown reliability of oxide layer Pending CN102176443A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104900556A (en) * 2015-04-30 2015-09-09 上海华力微电子有限公司 Method for online monitoring of integrity of gate oxide
CN106505006A (en) * 2016-12-02 2017-03-15 株洲中车时代电气股份有限公司 A method for preparing a MOS structure for oxide layer full performance testing
CN113948411A (en) * 2021-09-09 2022-01-18 北京芯可鉴科技有限公司 Gate oxide time-varying breakdown testing method, reliability testing method and testing structure
CN114152857A (en) * 2021-12-07 2022-03-08 华东师范大学 Preparation method of two-dimensional material field effect transistor failure sample

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001127126A (en) * 1999-10-28 2001-05-11 Mitsubishi Materials Silicon Corp Method of evaluating semiconductor element
US20080038851A1 (en) * 2006-08-11 2008-02-14 Nec Electronics Corporation Pattern for evaluating electric characteristics, method for evaluating electric characteristics, method for manufacturing semiconductor device and method for providing reliability assurance
CN101281897A (en) * 2007-04-06 2008-10-08 中芯国际集成电路制造(上海)有限公司 Matrix type structure for testing integrality of gate oxic horizon
CN101702005A (en) * 2009-10-28 2010-05-05 上海宏力半导体制造有限公司 Time dependent dielectric breakdown parallel testing circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001127126A (en) * 1999-10-28 2001-05-11 Mitsubishi Materials Silicon Corp Method of evaluating semiconductor element
US20080038851A1 (en) * 2006-08-11 2008-02-14 Nec Electronics Corporation Pattern for evaluating electric characteristics, method for evaluating electric characteristics, method for manufacturing semiconductor device and method for providing reliability assurance
CN101281897A (en) * 2007-04-06 2008-10-08 中芯国际集成电路制造(上海)有限公司 Matrix type structure for testing integrality of gate oxic horizon
CN101702005A (en) * 2009-10-28 2010-05-05 上海宏力半导体制造有限公司 Time dependent dielectric breakdown parallel testing circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104900556A (en) * 2015-04-30 2015-09-09 上海华力微电子有限公司 Method for online monitoring of integrity of gate oxide
CN106505006A (en) * 2016-12-02 2017-03-15 株洲中车时代电气股份有限公司 A method for preparing a MOS structure for oxide layer full performance testing
CN113948411A (en) * 2021-09-09 2022-01-18 北京芯可鉴科技有限公司 Gate oxide time-varying breakdown testing method, reliability testing method and testing structure
CN114152857A (en) * 2021-12-07 2022-03-08 华东师范大学 Preparation method of two-dimensional material field effect transistor failure sample

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