CN102081138B

CN102081138B - Method for wafer-level burn-in test of semiconductor devices

Info

Publication number: CN102081138B
Application number: CN 200910200020
Authority: CN
Inventors: 张晓东; 郑勇; 刘晓虎; 赵步青
Original assignee: Semiconductor Manufacturing International Shanghai Corp
Current assignee: Semiconductor Manufacturing International Beijing Corp
Priority date: 2009-12-01
Filing date: 2009-12-01
Publication date: 2012-11-28
Anticipated expiration: 2029-12-01
Also published as: CN102081138A

Abstract

The invention discloses a method for the wafer-level burn-in test of semiconductor devices, which comprises the following steps of: contacting a test probe with a semiconductor device bonding on a wafer to establish an electrical connection and to conduct an initial test; according to the arranged burn-in test rules, exerting voltage stress on each semiconductor device on the wafer through the test probe to separately conduct the monitor test; determining whether the tested relevant electrical parameters of each semiconductor device on the wafer conform to the arranged corresponding burn-in criteria; defining the wafer which conforms to the criteria as good quality and taking the burn-in grade thereof as the judging criteria; and determining the wafer which does not conform as ineffective. The method provided by the invention reduces the test cost of semiconductor devices and enhances the test efficiency of semiconductor devices.

Description

Semiconductor devices is carried out the method for wafer level burn test

Technical field

The present invention relates to the measuring technology of semiconductor devices, particularly a kind of method of semiconductor devices being carried out the wafer level burn test.

Background technology

Semiconducter device testing is that the electrical parameter that on wafer-level ball integrate circuit, carries out for the consistance of checking specification is measured, and purpose is the acceptable electric property of check.When semiconductor devices is carried out electrical testing, can, semiconductor devices carry out wafer selection (wafer sort) test and burn-in test after having carried out making.Wherein, Wafer selection test; Also claim electricity selection test, wafer probe test or detection; Purpose is that which semiconductor devices (making a plurality of semiconductor devices simultaneously on the wafer) is in proper working order on the check wafer, and the pressure welding that this test contacts the semiconductor devices on the wafer with test probe exchanges (AC) or/and the test of direct current (DC) after setting up the electricity connection; Burn-in test is a kind of parameter testing form with test structure assessment wafer semiconductor-on-insulator device aging; How long can foresee semiconductor devices can keep in the client uses; It is accomplished through the burn-in test to semiconductor devices; When test, needing for a long time, is a kind of work more consuming time.

When carrying out burn-in test; Wafer burn in (WLBI; Wafer Level Burn-In) weigh the semiconductor devices degree of aging as one, in the fabricate process to the expense that reduces burn-in test and obtain good naked crystal grain (KGD, Known Good Die) and play decisive role.

At present, wafer selection test and these two processes of wafer burn in are independently carried out respectively.Along with the process of making semiconductor devices becomes increasingly complex; The defective of different brackets all possibly cause the initial failure of semiconductor devices; Therefore, when carrying out burn-in test, need to adopt different aging algorithms to carry out the initial failure that burn-in test is avoided semiconductor devices.

The process that adopts different aging algorithms to carry out burn-in test is: at first, formulate the WLBI rule and corresponding criterion of different aging algorithms; Then, semiconductor devices is carried out burn-in test successively, obtain the burn-in test data respectively according to the WLBI rule of the different aging algorithms of being formulated; At last, burn-in test data that obtain respectively and the corresponding criterion that is provided with are compared, confirm the aging grade of this semiconductor devices.

Since to semiconductor devices carry out burn-in test and to wafer choose the test separately independently carry out, this can increase testing cost and the reduction testing efficiency.

Summary of the invention

In view of this, the present invention provides a kind of method that semiconductor devices is carried out the wafer level burn test, and this method can reduce the testing cost of semiconductor devices and improve the testing efficiency of semiconductor devices.

For achieving the above object, the technical scheme of the embodiment of the invention specifically is achieved in that

A kind of method that semiconductor devices is carried out the wafer level burn test, this method comprises:

The pressure welding that test probe is contacted the semiconductor devices on the wafer is set up the electricity connection and is carried out initial testing;

Burn-in test rule according to being provided with applies voltage stress through test probe to each semiconductor devices on the wafer, carries out control and measuring respectively;

Whether the relevant electrical parameter of judging each semiconductor devices on the wafer that records meets the aging criterion of set correspondence, confirms that the wafer that meets is a criterion for good and aging grade; Confirm that incongruent wafer lost efficacy.

The burn-in test rule and the corresponding criterion of said setting can be adjusted.

The burn-in test rule of said setting is a plurality of, and corresponding criterion is a plurality of.

Before confirming that incongruent wafer lost efficacy, this method also comprises:

Through test probe each semiconductor devices on the wafer is applied voltage stress according to the burn-in test rule that is provided with once more, record relevant electrical parameter respectively;

Whether the relevant electrical parameter of judging each semiconductor devices on the wafer that records once more meets the aging criterion of set correspondence, confirms that the wafer that meets is good and meets aging grade criterion; Confirm that incongruent wafer lost efficacy.

Visible by technique scheme, method provided by the invention combines burn-in test simultaneously with wafer selection test carries out, thereby has reduced the testing cost of semiconductor devices and the testing efficiency of raising semiconductor devices.

Description of drawings

Fig. 1 is the method general flow chart that semiconductor devices is carried out the wafer level burn test provided by the invention;

Fig. 2 is the method specific embodiment process flow diagram that semiconductor devices is carried out the wafer level burn test provided by the invention.

Embodiment

For making the object of the invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is done further explain.

In the prior art, the process of carrying out wafer selection test is: the pressure welding that test probe is contacted the semiconductor devices on the wafer is set up and is carried out after electricity connects, to distinguish first-class semiconductor devices of wafer and bad semiconductor devices; And being carried out burn-in test, semiconductor devices also can adopt the pressure welding that test probe is contacted the semiconductor devices on the wafer to set up to carry out after electricity connects, with the aging grade of the semiconductor devices that obtains.The technological means that these two kinds of method of testings adopt is identical, and just the test order of foundation and test discrimination standard are different.

Therefore; Method provided by the invention is for testing cost that reduces semiconductor devices and the testing efficiency that improves semiconductor devices; Proposed with wafer level burn test with wafer selection test to combine simultaneously and carry out; Just adopt the pressure welding that test probe is contacted the semiconductor devices on the wafer to set up and carry out burn-in test after electricity connects, the discrimination standard according to correspondence compares then, thereby confirms the quality and the aging grade of the semiconductor devices on the wafer.

When semiconductor devices was tested, detailed process was:

Step 1 to the test setting of semiconductor devices, promptly adopts the pressure welding that test probe is contacted the semiconductor devices on the wafer to set up electricity and connects and carry out initial testing;

Step 2 applies voltage stress through test probe to the semiconductor devices on the wafer according to the burn-in test rule that is provided with, and records relevant electrical parameter;

In this step, a plurality of test orders can be set and corresponding criterion is set, semiconductor devices is carried out the test of different electric mathematic(al) parameter, according to the criterion of correspondence, confirm whether semiconductor devices lost efficacy and meet aging grade;

Step 3, the semiconductor devices on the record wafer is compared the inefficacy quantity that initial testing has more;

Step 4 determines whether according to the semiconductor device failure quantity on the wafer that is write down perhaps whether needs are adjusted set test order in the scope of setting, with wearing out of the semiconductor devices on the assurance wafer.

Method provided by the invention can be as required; Such as when the environment of making semiconductor devices or/and yields when changing; At any time the burn-in test rule that adjustment is provided with, the test order of this setting comprise the WLBI rule of different aging algorithms, and corresponding criterion.

Method provided by the invention can be used for having the semiconductor devices of memory function, such as dynamic RAM (DRAM), and SRAM (SRAM) and flash memory.

Below lifting specific embodiment is elaborated to method provided by the invention; In this embodiment; Tested object is a dynamic RAM; Suppose that burn-in test adopts the WLBI rule of two kinds of algorithms of different different brackets to carry out the burn-in test of different brackets, describes such as the aging level estimate that surpasses the threshold voltage persistence.

Fig. 1 is the method general flow chart that semiconductor devices is carried out the wafer level burn test provided by the invention, and its concrete steps are:

Step 101, to the test setting of semiconductor devices; Employing is set up the electricity connection with the pressure welding that test probe contacts the semiconductor devices on the wafer; Carry out a wafer selection test; In this process, through test probe the semiconductor devices on the wafer is applied voltage stress, record relevant electrical parameter according to the burn-in test rule that is provided with;

In this step, the burn-in test rule of setting can comprise a plurality of different test orders, and such as test order A and test order B, corresponding criterion is respectively a and criterion b;

The object lesson of this step such as step 201～step 207 of Fig. 2;

After step 102, test are accomplished, semiconductor devices is carried out the laser preparing process;

Step 103, the associated electrical parameter that every wafer semiconductor-on-insulator device is recorded compare with the set aging criterion of correspondence respectively; Confirm every wafer or bad respectively according to whether meeting corresponding criterion; If good, then execution in step 104; If bad, then execution in step 105;

Object lesson of this step such as step 208 and the step 209 of Fig. 2;

Step 104, the aging grade of confirming semiconductor devices are corresponding standard, directly carry out the subsequent process of fabricate;

Step 105, to confirming as bad wafer, through test probe the semiconductor devices on the wafer is applied voltage stress according to set burn-in test rule again, record relevant electrical parameter, change step 106 over to;

In this step, carried out burn-in test again one time, purpose is improve semiconductor devices aging.

The practical implementation of this step is step 210, step 211, step 212 and the step 213 of Fig. 2 for example;

Step 106, compare,, confirm that the aging grade of semiconductor devices meets corresponding standard, directly carry out the subsequent process of fabricate if good to judging through the data of the wafer of twice-aged test and set correspondence; If bad, just be judged to be this wafer and do not meet aging standard, abandon.

In this step, detailed process is shown in the step 214 of Fig. 2.

In Fig. 1, when fabrication of semiconductor device or/and after yields changed, test order that semiconductor devices is set and corresponding criterion can be adjusted.

Process shown in Figure 1 applies voltage tester through test probe to the semiconductor devices on the wafer and obtains electrical parameter; Carry out burn-in test and selection test then simultaneously; Can reduce the damage of the semiconductor devices that prior art causes because carrying out burn-in test, improve the yields of the semiconductor devices of wafer.

Fig. 2 is the method specific embodiment process flow diagram that semiconductor devices is carried out the wafer level burn test provided by the invention, and its concrete steps are:

Step 201, to the test setting of semiconductor devices, adopt the pressure welding that test probe is contacted the semiconductor devices on the wafer to set up electricity and connect and carry out initial testing;

Step 202, burn-in test rule A and burn-in test rule B are set, apply voltage stress;

Step 203, each semiconductor devices on the wafer is carried out first control and measuring;

Step 204, the semiconductor devices on the wafer is applied voltage stress according to the burn-in test rule A that is provided with;

Step 205, each semiconductor devices on the wafer is carried out second control and measuring;

Step 206, the semiconductor devices on the wafer is applied voltage stress according to the burn-in test rule B that is provided with;

Step 207, each semiconductor devices on the wafer is carried out the 3rd control and measuring;

Step 208, second control and measuring that burn-in test rule A is corresponding and the criterion a of setting compare, and the criterion a according to whether meeting setting confirms that whether this wafer is for well, if then change step 215 over to; If, then change step 209 over to for not;

Step 209, the 3rd control and measuring that burn-in test rule B is corresponding and the criterion b of setting compare, and the criterion b according to whether meeting setting confirms that whether this wafer is for well, if then change step 212 over to; If, then change step 210 over to for not;

Step 210, once more the semiconductor devices on this wafer is applied voltage stress according to the burn-in test rule B that is provided with;

Step 211, the semiconductor devices on this wafer is carried out control and measuring the 4th time, change step 212 over to;

Step 212, once more the semiconductor devices on this wafer is applied voltage stress, change step 213 over to according to the burn-in test rule A that is provided with;

Step 213, the semiconductor devices on this wafer is carried out control and measuring the 5th time, change step 214 over to;

Step 214, the 4th control and measuring that burn-in test rule A is corresponding and the criterion a of setting compare; The 5th control and measuring that burn-in test rule B is corresponding and the criterion b of setting compare; According to the criterion a and the criterion b that whether meet setting simultaneously, confirm this semiconductor devices whether for well, if; The aging grade of confirming this semiconductor devices is standard a, carries out the subsequent step of making this semiconductor devices; If not, then confirm this semiconductor device failure, abandon.

Step 215, associated electrical parameter that burn-in test rule B is corresponding and the criterion b of setting compare; According to the criterion b that whether meets setting; Confirm that this semiconductor devices is whether for well; If the aging grade of confirming this semiconductor devices is a standard, carry out the subsequent step of making this semiconductor devices; If, then change step 216 over to for not;

Step 216, once more this semiconductor devices is applied voltage stress, change step 217 over to according to the burn-in test rule B that is provided with;

Step 217, this semiconductor devices get into control and measuring the 4th time, change step 214 over to and carry out.

More than lift preferred embodiment; The object of the invention, technical scheme and advantage have been carried out further explain, and institute it should be understood that the above is merely preferred embodiment of the present invention; Not in order to restriction the present invention; All within spirit of the present invention and principle, any modification of being done, be equal to replacement and improvement etc., all should be included within protection scope of the present invention.

Claims

1. method that semiconductor devices is carried out wafer level burn test, this method comprises:

Whether the relevant electrical parameter of judging each semiconductor devices on the wafer that records meets the aging criterion of set correspondence, confirms that the wafer that meets is good and aging grade meets corresponding aging criterion; Confirm that incongruent wafer lost efficacy.

2. the method for claim 1 is characterized in that, the burn-in test rule of said setting can be adjusted with corresponding aging criterion.

3. the method for claim 1 is characterized in that, the burn-in test rule of said setting is a plurality of, and corresponding aging criterion is a plurality of.

4. the method for claim 1 is characterized in that, before confirming that incongruent wafer lost efficacy, this method also comprises:

Whether the relevant electrical parameter of judging each semiconductor devices on the wafer that records once more meets the aging criterion of set correspondence, confirms that the wafer that meets is good and aging grade meets corresponding aging criterion; Confirm that incongruent wafer lost efficacy.