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WO2016161887A1 - 像素驱动电路、像素驱动方法和显示装置 - Google Patents

像素驱动电路、像素驱动方法和显示装置 Download PDF

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Publication number
WO2016161887A1
WO2016161887A1 PCT/CN2016/076841 CN2016076841W WO2016161887A1 WO 2016161887 A1 WO2016161887 A1 WO 2016161887A1 CN 2016076841 W CN2016076841 W CN 2016076841W WO 2016161887 A1 WO2016161887 A1 WO 2016161887A1
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Prior art keywords
voltage
control
node
power source
pole
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PCT/CN2016/076841
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English (en)
French (fr)
Inventor
徐攀
吴仲远
张玉婷
李永谦
Original Assignee
京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US15/322,471 priority Critical patent/US10242625B2/en
Publication of WO2016161887A1 publication Critical patent/WO2016161887A1/zh

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    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0819Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0289Details of voltage level shifters arranged for use in a driving circuit
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • G09G2320/045Compensation of drifts in the characteristics of light emitting or modulating elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/028Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel driving circuit, a pixel driving method, and a display device.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • the pixel light-emitting device of the AMOLED is an Organic Light-Emitting Diode (OLED).
  • OLED Organic Light-Emitting Diode
  • the AMOLED can emit light by driving a thin film transistor to generate a driving current in a saturated state, and the driving current drives the OLED to emit light.
  • 1 is a schematic structural diagram of a basic pixel driving circuit in the prior art. As shown in FIG. 1, the conventional basic pixel driving circuit adopts a 2T1C circuit, and the 2T1C circuit includes two thin film transistors (switching transistor T0 and driving transistor DTFT). ) and 1 storage capacitor C.
  • the uniformity of the threshold voltage Vth between the respective driving transistors DTFT on the display substrate is poor, and drift occurs during use, so that when the scan line Scan controls the switch When T0 is turned on to input the same data voltage Vdata to the respective driving transistors DTFT, different driving currents are generated due to different threshold voltages of the respective driving transistors DTFT, resulting in poor brightness uniformity of the AMOLED panel.
  • the OLED will gradually age, which will cause the display brightness of the OLED to attenuate, thus affecting the user's use.
  • embodiments of the present invention provide a pixel driving method, a pixel driving method, and a display device, which can effectively eliminate the influence of the threshold voltage of the driving transistor on the driving current of the light emitting device.
  • an embodiment of the present invention provides a pixel driving circuit, including: a reset unit, a threshold compensation unit, a data writing unit, a driving transistor, a first storage capacitor, and a light emitting device, wherein
  • a control electrode of the driving transistor and a first end of the first storage capacitor are connected to a first node, a second pole of the driving transistor, a first end of the light emitting device, and a second end of the storage capacitor Connected to the second node, the second end of the light emitting device is connected to the second power source;
  • the input end of the reset unit is connected to the third power source, the output end of the reset unit is connected to the second node, and the control end of the reset unit is connected to the fourth control line;
  • the first input end of the threshold compensation unit is connected to the first power source, the first output end of the threshold compensation unit is connected to the first pole of the driving transistor, and the first control end and the third end of the threshold compensation unit Controlling a line connection, a second input end of the threshold compensation unit is connected to a fourth power source, a second output end of the threshold compensation unit is connected to the first node, and a second control end of the threshold compensation unit a control line connection;
  • the input end of the data writing unit is connected to the data line, the output end of the data writing unit is connected to the first node, and the control end of the data writing unit is connected to the second control line;
  • the first power source is for providing a first operating voltage
  • the second power source is for providing a second operating voltage
  • the third power source is for providing a reset voltage
  • the fourth power source is for providing a reference voltage
  • the reset unit is configured to write the reset voltage to the second node under the control of the fourth control line during a reset phase
  • the threshold compensation unit is configured to write the reference voltage to the first node under control of the first control line and the third control line during a threshold compensation phase, and to apply the reference voltage to the reference voltage Writing a difference in threshold voltages of the driving transistors to the second node;
  • the data writing unit is configured to be in the second control line during a data writing phase Controlling, by control, writing a data voltage on the data line to the first node;
  • the threshold compensation unit is further configured to write the first working voltage to the first pole of the driving transistor under the control of the third control line during the light emitting phase to turn on the driving transistor to
  • the drive current supplied to the light emitting device by the drive transistor is made independent of the threshold voltage of the drive transistor.
  • the data writing unit may include: a first switch tube;
  • a first pole of the first switch tube is connected to the data line, a second pole of the first switch tube is connected to the first node, a control pole of the first switch tube and the second control Wire connection.
  • the threshold compensation unit may include: a second switch tube and a third switch tube;
  • a first pole of the second switch tube is connected to the fourth power source, a second pole of the second switch tube is connected to the first node, and a control pole of the second switch tube is opposite to the first Control line connection.
  • a first pole of the third switch tube is connected to the first power source, a second pole of the third switch tube is connected to a first pole of the driving transistor, and a control pole of the third switch tube The third control line is connected.
  • the reset unit may include: a fourth switch tube;
  • a first pole of the fourth switch tube is connected to the third power source, a second pole of the fourth switch tube is connected to the second node, and a control pole of the fourth switch tube and the fourth Control line connection.
  • the pixel driving circuit may further include: a second storage capacitor;
  • the first end of the second storage capacitor is connected to the second node, and the second end of the second storage capacitor is suspended.
  • the third power source and the fourth power source may be the same power source, and the power source provides the reference voltage during the threshold compensation phase, in the reset phase, the data writing phase, and the lighting phase The reset voltage is provided.
  • the threshold compensation phase may include a first time period and a second time period, and a voltage on the third control line is an off voltage in the first time period and an on time in the second time period a voltage such that the threshold compensation unit is capable of asserting the reference voltage and the driving crystal after the voltage of the first node is stabilized at the reference voltage The difference in threshold voltage of the body tube is written to the second node.
  • the second power source and the third power source may be the same power source for providing the second operating voltage.
  • an embodiment of the present invention further provides a display device including the above pixel driving circuit.
  • the present invention further provides a pixel driving method based on a pixel driving circuit, wherein the pixel driving circuit adopts the above pixel driving circuit, and the pixel driving method includes:
  • the reset unit writes the reset voltage to the second node under the control of the fourth control line;
  • the threshold compensation unit writes the reference voltage to the first node under control of the first control line and the third control line, and the reference voltage and the driving transistor a difference in threshold voltage is written to the second node;
  • the data writing unit writes a data voltage to the first node under the control of the second control line;
  • the threshold compensation unit writes the first operating voltage to the first pole of the driving transistor under the control of the third control line to turn on the driving transistor, so that the The drive current supplied by the drive transistor to the light emitting device is independent of the threshold voltage of the drive transistor.
  • the driving current generated by the driving transistor is only related to the data voltage and the reference voltage, and is related to the driving transistor.
  • the threshold voltage is independent, so that the driving current flowing through the light emitting device can be prevented from being affected by the threshold voltage unevenness and drift, thereby effectively improving the uniformity of the driving current flowing through the light emitting device OLED.
  • the driving current is also independent of the first operating voltage and the second operating voltage, the influence of the voltage drop of the first operating voltage and the second operating voltage in the circuit on the driving current can be effectively avoided.
  • FIG. 1 is a schematic structural diagram of a basic pixel driving circuit in the prior art
  • FIG. 2 is a schematic diagram of a pixel driving circuit according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic diagram of a pixel driving circuit according to Embodiment 1 of the present invention.
  • FIG. 4 is a timing chart showing the operation of each control line in the pixel driving circuit shown in FIG. 3;
  • FIG. 5 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a reset phase
  • FIG. 6 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a threshold compensation phase
  • FIG. 7 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a data writing phase
  • FIG. 8 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a display phase
  • FIG. 9 is a schematic diagram of another pixel driving circuit according to Embodiment 1 of the present invention.
  • FIG. 10 is an operation timing chart of each control line and a fourth power source in the pixel driving circuit shown in FIG. 9;
  • FIG. 11 is a schematic diagram of still another pixel driving circuit according to Embodiment 1 of the present invention.
  • FIG. 12 is a flowchart of a pixel driving method according to Embodiment 2 of the present invention.
  • FIG. 2 is a schematic diagram of the pixel driving circuit.
  • the pixel driving circuit includes: a reset unit 1, a threshold compensation unit 2, a data writing unit 3, a driving transistor DTFT, a first storage capacitor C1, and a light emitting device OLED.
  • the gate (ie, the gate) of the driving transistor DTFT is coupled to the first node A of the first storage capacitor C1, the second terminal of the driving transistor DTFT, the first terminal of the light emitting device OLED, and the first
  • the second end of the storage capacitor C1 is connected to the second node B, and the second end of the light emitting device OLED is connected to the second power source;
  • the input end of the reset unit 1 is connected to the third power source, and the output end of the reset unit 1 is
  • the two-node B is connected, and the control end of the reset unit 1 is connected to a fourth control line (not shown in FIG.
  • the first input end of the threshold compensation unit 2 is connected to the first power source, and the first output of the threshold compensation unit 2 End and drive
  • the first terminal of the threshold transistor compensation unit 2 is connected to the third control line (not shown in FIG. 2), and the second input end of the threshold compensation unit 2 is connected to the fourth power source, and the threshold compensation is performed.
  • the second output end of the unit 2 is connected to the first node A, and the second control end of the threshold compensation unit 2 is connected to the first control line (not shown in FIG. 2); the input end of the data writing unit 3 is connected to the data line
  • the output of the data writing unit 3 is connected to the first node A, and the control terminal of the data writing unit 3 is connected to a second control line (not shown in FIG. 2).
  • the first power source is for providing a first operating voltage
  • the second power source is for providing a second operating voltage
  • the third power source is for providing a reset voltage
  • the fourth power source is for providing a reference voltage
  • the reset unit 1 is for writing a reset voltage to the second node B under the control of the fourth control line during the reset phase.
  • the threshold compensation unit 2 is configured to write a reference voltage to the first node A under the control of the first control line and the third control line during the threshold compensation phase, and write the difference between the reference voltage and the threshold voltage of the driving transistor DTFT To the second node B.
  • the data writing unit 3 is for writing the data voltage on the data line to the first node A under the control of the second control line at the data writing stage.
  • the threshold compensation unit 2 is further configured to write a first operating voltage to the first electrode of the driving transistor DTFT under the control of the third control line during the light emitting phase to turn on the driving transistor DTFT, so that the driving transistor DTFT is directed to the light emitting device
  • the driving current provided by the OLED is independent of the threshold voltage of the driving transistor DTFT.
  • FIG. 3 is a schematic diagram of a pixel driving circuit according to Embodiment 1 of the present invention.
  • the data writing unit 3 includes a first switching transistor T1
  • the threshold compensation unit 2 includes a second switching transistor T2 and a third switching transistor T3
  • the reset unit 1 includes a fourth switching transistor T4.
  • the first pole of the first switching transistor T1 is connected to the data line
  • the second pole of the first switching transistor T1 is connected to the first node A
  • the control pole of the first switching transistor T1 is connected to the second control line S2.
  • the first pole of the second switch tube T2 is connected to the fourth power source for providing the reference voltage Vref
  • the second pole of the second switch tube T2 is connected to the first node A
  • the second switch tube T2 The control electrode is connected to the first control line S1.
  • the first pole of the third switching transistor T3 is connected to a first power source for providing a first operating voltage (for example, Vdd shown in FIG. 3), the second pole of the third switching transistor T3 and the first pole of the driving transistor DTFT Connected, the control pole of the third switching transistor T3 is connected to the third control line S3.
  • a first operating voltage for example, Vdd shown in FIG. 3
  • the first pole of the fourth switching transistor T4 is connected to the third power source for providing the reset voltage Vsus
  • the second pole of the fourth switching transistor T4 is connected to the second node B
  • the control pole and the fourth pole of the fourth switching transistor T4 Control line S4 is connected.
  • the OLED is taken as an example, but the illuminating device may also be other current illuminating devices, such as LEDs (Light Emitting Diodes). Wait.
  • the driving transistor DTFT, the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, and the fourth switching transistor T4 in this embodiment may be a polysilicon thin film transistor, an amorphous silicon thin film transistor, an oxide film. Any of a transistor and an organic thin film transistor.
  • control electrode referred to in this embodiment specifically refers to the gate of the transistor
  • first pole specifically refers to the source of the transistor
  • second pole specifically refers to the drain of the transistor.
  • first pole and second pole are interchangeable.
  • the driving transistor DTFT, the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, and the fourth switching transistor T4 are all N-type thin film transistors as an example.
  • the first working voltage is a high level voltage VDD
  • the high level voltage VDD can be about 10V
  • the second working voltage is a ground voltage Vss
  • the ground voltage Vss can be about OV
  • the reference voltage Vref It can be around 2V
  • the reset voltage Vsus can be between -4V and -5V.
  • the driving transistor DTFT when the driving transistor DTFT, the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, and the fourth switching transistor T4 are all N-type thin film transistors, each switching transistor in the pixel driving circuit And the drive transistor DTFT can use the same life
  • the production process is prepared at the same time, which simplifies the production process and shortens the production cycle.
  • the operation process of the pixel driving circuit includes four phases: a reset phase, a threshold compensation phase, a data writing phase, and a display phase.
  • the first control line S1 outputs a high level signal
  • the second control line S2 outputs a low level signal
  • the third control line S3 outputs a low level signal
  • the fourth control line S4 outputs a high level signal.
  • the second switching transistor T2 and the fourth switching transistor T4 are turned on, and the first switching transistor T1 and the third switching transistor T3 are turned off.
  • FIG. 5 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a reset phase.
  • the reference voltage Vref is written to the first node A through the second switching transistor T2
  • the reset voltage Vsus is passed through the fourth switching transistor.
  • T4 is written to the second node B, thereby completing the reset of the pixel driving circuit.
  • the voltage of the first node A is the reference voltage Vref
  • the voltage of the second node B is the reset voltage Vsus.
  • the first control line S1 outputs a high level signal
  • the second control line S2 outputs a low level signal
  • the third control line S3 outputs a high level signal
  • the fourth control line S4 outputs a low level signal.
  • the second switching transistor T2 and the third switching transistor T3 are turned on, and the first switching transistor T1 and the fourth switching transistor T4 are turned off.
  • FIG. 6 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a threshold compensation phase.
  • the voltage of the first node A is maintained at the reference voltage Vref.
  • the third switching transistor T3 since the third switching transistor T3 is turned on, the first operating voltage Vdd starts to charge the second node B through the driving transistor DTFT, and when the gate-source voltage Vgs of the driving transistor DTFT is equal to Vth, the driving transistor DTFT is turned off. The charging is over.
  • the voltage of the second node B is Vref-Vth, where Vth is the threshold voltage of the driving transistor.
  • the first control line S1 outputs a low level signal
  • the second control line S2 outputs a high level signal
  • the third control line S3 outputs a low level signal
  • the fourth control line S4 outputs a low level signal.
  • the first switch tube T1 is turned on, and the second switch tube T2, the third switch tube T3, and the fourth switch tube T4 are both turned off.
  • FIG. 7 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in a data writing phase, As shown in FIG. 7, since the second switching transistor T2 is turned off and the first switching transistor T1 is turned on, the data voltage Vdata is written to the first node A through the first switching transistor T1, and the voltage of the first node A is controlled by the reference voltage Vref. Jumping to the data voltage Vdata, that is, the voltage of the first end of the first storage capacitor C1 is hopped by the magnitude of Vdata-Vref. At this time, the voltage of the second end of the first storage capacitor C1 is correspondingly generated by the bootstrap action. Jumping. Wherein, the voltage jump of the second end of the first storage capacitor C1 becomes:
  • is the voltage jump constant, in the circuit shown in Figure 3.
  • the C OLED is the capacitance value of the light emitting device OLED itself.
  • the voltage of the first node A is the data voltage Vdata
  • the voltage of the second node B is Vref-Vth + ⁇ (Vdata - Vref).
  • the first control line S1 outputs a low level signal
  • the second control line S2 outputs a low level signal
  • the third control line S3 outputs a high level signal
  • the fourth control line S4 outputs a low level signal.
  • the third switch tube T3 is turned on, and the first switch tube T1, the second switch tube T2, and the fourth switch tube T4 are both turned off.
  • FIG. 8 is an equivalent circuit diagram of the pixel driving circuit shown in FIG. 3 in the display phase. As shown in FIG. 8, since the third switching transistor T3 is turned on, the first power supply supplies the driving transistor DTFT with the first operating voltage Vdd, thereby The drive transistor DTFT is also in operation.
  • K and ⁇ are constants, and Vgs is the gate-source voltage of the driving transistor DTFT.
  • the driving current I of the driving transistor DTFT is only related to the data voltage Vdata and the reference voltage Vref regardless of the threshold voltage Vth of the driving transistor DTFT, so that the driving current flowing through the light emitting device OLED can be prevented from being subjected to the threshold voltage unevenness and The effect of drift, which in turn effectively increases the uniformity of the drive current flowing through the OLED of the light-emitting device.
  • the driving current is also independent of the first operating voltage Vdd and the second operating voltage Vss, the first operating voltage Vdd and the second operating voltage can be effectively avoided. The effect of Vss voltage drop in the circuit on the drive current.
  • FIG. 9 is a detailed schematic diagram of another pixel driving circuit in the first embodiment of the present invention
  • FIG. 10 is a timing chart showing the operation of each control line and the fourth power source in the pixel driving circuit shown in FIG.
  • the difference between the pixel driving circuit shown in FIG. 9 and the pixel driving circuit shown in FIG. 3 is that the first pole of the fourth switching transistor T4 in the pixel driving circuit shown in FIG. 9 is connected to the fourth power source, that is, the third power source.
  • the fourth power supply provides a reference voltage Vref (corresponding to a high level on the fourth power supply in FIG.
  • the fourth power source causes instantaneous power consumption when switching between the reference voltage and the reset voltage, since the difference between the absolute value of the reference voltage and the absolute value of the reset voltage is small, Instantaneous power consumption is also relatively small.
  • the threshold compensation phase may include a first time period and a second time period.
  • the third control line S3 first maintains a low level signal in the first time period, and then A high level signal is output during the second period.
  • the working process of the pixel driving circuit shown in FIG. 9 is similar to the working process of the pixel driving circuit shown in FIG. 3 .
  • FIG. 11 is a schematic diagram of still another pixel driving circuit according to Embodiment 1 of the present invention; Figure.
  • the difference between the pixel driving circuit shown in FIG. 11 and the pixel driving circuit shown in FIG. 3 is that the first pole of the fourth switching transistor T4 in the pixel driving circuit shown in FIG. 11 is connected to the second power source, that is, the second power source.
  • the third power source is the same power source (second power source), and the second power source continuously outputs the second working voltage Vss. Since the pixel driving circuit shown in FIG. 11 eliminates the third power supply, the corresponding power supply line (Power Line) can be omitted for the pixel driving circuit, thereby effectively reducing the wiring space.
  • Power Line Power Line
  • the pixel driving circuit further includes a second storage capacitor C2, wherein the second The first end of the storage capacitor C2 is connected to the second node B, and the second end of the second storage capacitor C2 is suspended.
  • the pixel driving circuit provided in this embodiment that there are many devices connected at the second node B, so that leakage current is easily generated, so that the voltage of the second node B is unstable.
  • the second storage capacitor C2 at the second node B, the voltage of the second node B can be stabilized, thereby ensuring that the driving current generated by the driving transistor is more stable.
  • FIG. 12 is a flow chart of the pixel driving method.
  • the pixel driving method is based on a pixel driving circuit, and the pixel driving circuit adopts any one of the pixel driving circuits provided in the first embodiment. As shown in FIG. 12, the pixel driving method includes the following steps 101-104.
  • Step 101 The reset unit writes a reset voltage to the second node under the control of the fourth control line.
  • Step 102 The threshold compensation unit writes a reference voltage to the first node under the control of the first control line and the third control line, and writes a difference between the reference voltage and the threshold voltage of the driving transistor to the second node.
  • Step 103 The data writing unit writes the data voltage to the first node under the control of the second control line.
  • Step 104 The threshold compensation unit writes the first working voltage to the first pole of the driving transistor under the control of the third control line to turn on the driving transistor, so that the driving current provided by the driving transistor to the light emitting device and the driving transistor are The threshold voltage is independent.
  • Steps 101 to 104 respectively correspond to four working phases of the pixel driving circuit: a reset phase, a threshold compensation phase, a data writing phase, and an illumination phase.
  • a reset phase a threshold compensation phase
  • a data writing phase a data writing phase
  • an illumination phase a threshold compensation phase
  • Embodiment 2 of the present invention provides a pixel driving method, which can make a driving current of a driving transistor only related to a data voltage and a reference voltage and independent of a threshold voltage of a driving transistor, thereby avoiding driving through a light emitting device.
  • the current is affected by the threshold voltage non-uniformity and drift, thereby effectively improving the uniformity of the driving current flowing through the light emitting device OLED.
  • the driving current is also independent of the first operating voltage and the second operating voltage, the influence of the voltage drop of the first operating voltage and the second operating voltage in the circuit on the driving current can be effectively avoided.
  • a third embodiment of the present invention provides a display device.
  • the display device includes a plurality of pixel units, and each of the pixel units is correspondingly provided with a pixel driving circuit.
  • the pixel driving circuit can adopt the pixel driving circuit in the first embodiment.
  • the pixel driving circuit can be operated by the pixel driving method provided in the second embodiment.

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Abstract

一种像素驱动电路、像素驱动方法和显示装置,其中该像素驱动电路包括:重置单元(1)、阈值补偿单元(2)、数据写入单元(3)、驱动晶体管(DTFT)、第一存储电容(C1)和发光器件(OLED)。使得驱动晶体管(DTFT)驱动发光器件(OLED)进行像素显示时,驱动晶体管(DTFT)产生的驱动电流(I)仅与数据电压(Vdata)和参考电压(Vref)相关,而与驱动晶体管(DTFT)的阈值电压(Vth)无关,从而可避免流过发光器件(OLED)的驱动电流(I)受到阈值电压(Vth)不均匀和漂移的影响,进而有效的提高了流过发光器件(OLED)的驱动电流(I)的均匀性。此外,由于该驱动电流(I)也与第一工作电压(Vdd)和第二工作电压(Vss)无关,因此可有效的避免第一工作电压(Vdd)和第二工作电压(Vss)在电路中的压降对驱动电流(I)的影响。

Description

像素驱动电路、像素驱动方法和显示装置
相关申请的交叉引用
本申请要求于2015年4月7日提交的中国专利申请No.201510160950.5的优先权,其全部内容通过引用合并于此。
技术领域
本发明涉及显示技术领域,特别涉及一种像素驱动电路、像素驱动方法和显示装置。
背景技术
有源矩阵有机发光二极体(Active Matrix Organic Light Emitting Diode,简称:AMOLED)面板的应用越来越广泛。AMOLED的像素发光器件为有机发光二极管(Organic Light-Emitting Diode,简称OLED),AMOLED能够发光是通过驱动薄膜晶体管在饱和状态下产生驱动电流,该驱动电流驱动OLED发光。图1为现有技术中基本的像素驱动电路的结构示意图,如图1所示,现有的基本的像素驱动电路采用2T1C电路,该2T1C电路包括两个薄膜晶体管(开关管T0和驱动晶体管DTFT)和1个存储电容C。
但是,由于在现有的低温多晶硅工艺制程中,显示基板上各个驱动晶体管DTFT之间的阈值电压Vth的均匀性较差,而且在使用过程中还会发生漂移,这样当扫描线Scan控制开关管T0导通以向各个驱动晶体管DTFT输入相同数据电压Vdata时,由于各个驱动管DTFT的阈值电压不同而产生不同的驱动电流,从而导致AMOLED面板的亮度均匀性较差。
此外,随着使用时间的推移,OLED会逐渐的老化,进而导致OLED的显示亮度出现衰减,从而影响用户的使用。
发明内容
针对现有技术中的上述问题,本发明实施例提供像素驱动方法、像素驱动方法和显示装置,可有效消除所述驱动晶体管的阈值电压对发光器件的驱动电流的影响。
为实现上述目的,本发明实施例提供了一种像素驱动电路,包括:重置单元、阈值补偿单元、数据写入单元、驱动晶体管、第一存储电容和发光器件,其中,
所述驱动晶体管的控制极与所述第一存储电容的第一端连接于第一节点,所述驱动晶体管的第二极、所述发光器件的第一端和所述存储电容的第二端连接于第二节点,所述发光器件的第二端与第二电源连接;
所述重置单元的输入端与第三电源连接,所述重置单元的输出端与所述第二节点连接,所述重置单元的控制端与第四控制线连接;
所述阈值补偿单元的第一输入端与第一电源连接,所述阈值补偿单元的第一输出端与所述驱动晶体管的第一极连接,所述阈值补偿单元的第一控制端与第三控制线连接,所述阈值补偿单元的第二输入端与第四电源连接,所述阈值补偿单元的第二输出端与所述第一节点连接,所述阈值补偿单元的第二控制端与第一控制线连接;
所述数据写入单元的输入端与数据线连接,所述数据写入单元的输出端与所述第一节点连接,所述数据写入单元的控制端与第二控制线连接;
所述第一电源用于提供第一工作电压,所述第二电源用于提供第二工作电压,所述第三电源用于提供重置电压,所述第四电源用于提供参考电压;
所述重置单元用于在重置阶段时在所述第四控制线的控制下将所述重置电压写入至所述第二节点;
所述阈值补偿单元用于在阈值补偿阶段时在所述第一控制线和第三控制线的控制下将所述参考电压写入至所述第一节点,以及将所述参考电压与所述驱动晶体管的阈值电压的差写入至所述第二节点;
所述数据写入单元用于在数据写入阶段时在所述第二控制线的 控制下将所述数据线上的数据电压写入至所述第一节点;
所述阈值补偿单元还用于在发光阶段时在所述第三控制线的控制下将所述第一工作电压写入至所述驱动晶体管的第一极,以导通所述驱动晶体管,以使得所述驱动晶体管向所述发光器件提供的驱动电流与所述驱动晶体管的阈值电压无关。
所述数据写入单元可以包括:第一开关管;
所述第一开关管的第一极与所述数据线连接,所述第一开关管的第二极与所述第一节点连接,所述第一开关管的控制极与所述第二控制线连接。
所述阈值补偿单元可以包括:第二开关管和第三开关管;
所述第二开关管的第一极与所述第四电源连接,所述第二开关管的第二极与所述第一节点连接,所述第二开关管的控制极与所述第一控制线连接。
所述第三开关管的第一极与所述第一电源连接,所述第三开关管的第二极与所述驱动晶体管的第一极连接,所述第三开关管的控制极与所述第三控制线连接。
所述重置单元可以包括:第四开关管;
所述第四开关管的第一极与所述第三电源连接,所述第四开关管的第二极与所述第二节点连接,所述第四开关管的控制极与所述第四控制线连接。
所述像素驱动电路还可以包括:第二存储电容;
所述第二存储电容的第一端与所述第二节点连接,所述第二存储电容的第二端悬空。
所述第三电源和所述第四电源可以为同一个电源,该电源在所述阈值补偿阶段时提供所述参考电压,在所述重置阶段、所述数据写入阶段和所述发光阶段时提供所述重置电压。
所述阈值补偿阶段可以包括第一时间段和第二时间段,并且所述第三控制线上的电压在所述第一时间段中为关断电压而在所述第二时间段中为开启电压,以使得所述阈值补偿单元在所述第一节点的电压稳定在所述参考电压之后才能够将所述参考电压与所述驱动晶 体管的阈值电压的差写入至所述第二节点。
所述第二电源和所述第三电源可以为同一个电源,该电源用于提供所述第二工作电压。
为实现上述目的,本发明实施例还提供了一种显示装置,包括:上述像素驱动电路。
为实现上述目的,本发明还提供了一种像素驱动方法,其基于像素驱动电路,所述像素驱动电路采用上述像素驱动电路,所述像素驱动方法包括:
在重置阶段,所述重置单元在所述第四控制线的控制下将所述重置电压写入至所述第二节点;
在阈值补偿阶段,所述阈值补偿单元在所述第一控制线和第三控制线的控制下将所述参考电压写入至所述第一节点,以及将所述参考电压与所述驱动晶体管的阈值电压的差写入至所述第二节点;
在数据写入阶段,所述数据写入单元在所述第二控制线的控制下将数据电压写入至所述第一节点;
在发光阶段,所述阈值补偿单元在所述第三控制线的控制下将所述第一工作电压写入至所述驱动晶体管的第一极,以导通所述驱动晶体管,以使得所述驱动晶体管向所述发光器件提供的驱动电流与所述驱动晶体管的阈值电压无关。
根据本发明实施例提供的像素驱动电路、像素驱动方法和显示装置,可使得驱动晶体管驱动发光器件进行像素显示时,驱动晶体管产生的驱动电流仅与数据电压和参考电压相关,而与驱动晶体管的阈值电压无关,从而可避免流过发光器件的驱动电流受到阈值电压不均匀和漂移的影响,进而有效的提高了流过发光器件OLED的驱动电流的均匀性。此外,由于该驱动电流也与第一工作电压和第二工作电压无关,因此可有效的避免第一工作电压和第二工作电压在电路中的压降对驱动电流的影响。
附图说明
图1为现有技术中基本的像素驱动电路的结构示意图;
图2为本发明实施例一提供的一种像素驱动电路的示意图;
图3为本发明实施例一中的一种像素驱动电路的具体示意图;
图4为图3所示像素驱动电路中各控制线的工作时序图;
图5为图3所示像素驱动电路在重置阶段的等效电路图;
图6为图3所示像素驱动电路在阈值补偿阶段的等效电路图;
图7为图3所示像素驱动电路在数据写入阶段的等效电路图;
图8为图3所示像素驱动电路在显示阶段的等效电路图;
图9为本发明实施例一中的另一种像素驱动电路的具体示意图;
图10为图9所示像素驱动电路中各控制线以及第四电源的工作时序图;
图11为本发明实施例一中的又一种像素驱动电路的具体示意图;以及
图12为本发明实施例二提供的一种像素驱动方法的流程图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图对本发明实施例提供的像素驱动电路、像素驱动方法和显示装置进行详细描述。
[实施例一]
本实施例提供了一种像素驱动电路,图2为该像素驱动电路的示意图。如图2所示,该像素驱动电路包括:重置单元1、阈值补偿单元2、数据写入单元3、驱动晶体管DTFT、第一存储电容C1和发光器件OLED。如所示的,驱动晶体管DTFT的栅极(即控制极)与第一存储电容C1的第一端连接于第一节点A,驱动晶体管DTFT的第二极、发光器件OLED的第一端和第一存储电容C1的第二端连接于第二节点B,发光器件OLED的第二端与第二电源连接;重置单元1的输入端与第三电源连接,重置单元1的输出端与第二节点B连接,重置单元1的控制端与第四控制线(图2中未示出)连接;阈值补偿单元2的第一输入端与第一电源连接,阈值补偿单元2的第一输出端与驱 动晶体管DTFT的第一极连接,阈值补偿单元2的第一控制端与第三控制线(图2中未示出)连接,阈值补偿单元2的第二输入端与第四电源连接,阈值补偿单元2的第二输出端与第一节点A连接,阈值补偿单元2的第二控制端与第一控制线(图2中未示出)连接;数据写入单元3的输入端与数据线连接,数据写入单元3的输出端与第一节点A连接,数据写入单元3的控制端与第二控制线(图2中未示出)连接。
第一电源用于提供第一工作电压,第二电源用于提供第二工作电压,第三电源用于提供重置电压,第四电源用于提供参考电压。
重置单元1用于在重置阶段时在第四控制线的控制下将重置电压写入至第二节点B。
阈值补偿单元2用于在阈值补偿阶段时在第一控制线和第三控制线的控制下将参考电压写入至第一节点A,以及将参考电压与驱动晶体管DTFT的阈值电压的差写入至第二节点B。
数据写入单元3用于在数据写入阶段时在第二控制线的控制下将数据线上的数据电压写入至第一节点A。
阈值补偿单元2还用于在发光阶段时在第三控制线的控制下将第一工作电压写入至驱动晶体管DTFT的第一极,以导通驱动晶体管DTFT,以使得驱动晶体管DTFT向发光器件OLED提供的驱动电流与驱动晶体管DTFT的阈值电压无关。
下面将以一个对应图2的具体实例对本实施例提供的像素驱动电路的工作过程进行详细描述。
图3为本发明实施例一中的一种像素驱动电路的具体示意图。如图3所示,数据写入单元3包括第一开关管T1,阈值补偿单元2包括第二开关管T2和第三开关管T3,重置单元1包括第四开关管T4。
如所示的,第一开关管T1的第一极与数据线连接,第一开关管T1的第二极与第一节点A连接,第一开关管T1的控制极与第二控制线S2连接。
第二开关管T2的第一极与用于提供参考电压Vref的第四电源连接,第二开关管T2的第二极与第一节点A连接,第二开关管T2 的控制极与第一控制线S1连接。
第三开关管T3的第一极与用于提供第一工作电压(例如,图3所示的Vdd)的第一电源连接,第三开关管T3的第二极与驱动晶体管DTFT的第一极连接,第三开关管T3的控制极与第三控制线S3连接。
第四开关管T4的第一极与用于提供重置电压Vsus的第三电源连接,第四开关管T4的第二极与第二节点B连接,第四开关管T4的控制极与第四控制线S4连接。
需要说明的是,在本实施例中以发光器件为OLED为例进行说明,但是该发光器件也可以是现有技术中的以电流驱动的其他发光器件,例如LED(Light Emitting Diode,发光二极管)等。
此外,在本实施例中的驱动晶体管DTFT、第一开关管T1、第二开关管T2、第三开关管T3和第四开关管T4可以为多晶硅薄膜晶体管、非晶硅薄膜晶体管、氧化物薄膜晶体管以及有机薄膜晶体管中的任一种。
在本实施例中涉及到的“控制极”具体是指晶体管的栅极,“第一极”具体是指晶体管的源极,而“第二极”具体是指晶体管的漏极。当然,本领域的技术人员应该知晓的是,该“第一极”与“第二极”可进行互换。
下面将结合附图对图3所示的像素驱动电路的工作过程进行详细的描述。下述描述中以驱动晶体管DTFT、第一开关管T1、第二开关管T2、第三开关管T3和第四开关管T4均为N型薄膜晶体管为例进行说明。此外,在图3中,第一工作电压为高电平电压VDD,该高电平电压VDD可以在10V左右,第二工作电压为接地电压Vss,该接地电压Vss可以约为OV,参考电压Vref可以在2V左右,重置电压Vsus可以在-4V至-5V之间。本领域的技术人员应该知晓的是,上述设定仅起到示例性作用,这并不会对本申请的技术方案产生限制。
需要说明的是,当驱动晶体管DTFT、第一开关管T1、第二开关管T2、第三开关管T3和第四开关管T4均为N型薄膜晶体管时,该像素驱动电路中的各个开关管以及驱动晶体管DTFT可采用相同的生 产工艺同时制备,从而可简化生产流程,缩短生成周期。
图4为图3所示像素驱动电路中各控制线的工作时序图。如图4所示,该像素驱动电路的工作过程包括四个阶段:重置阶段、阈值补偿阶段、数据写入阶段和显示阶段。
在重置阶段,第一控制线S1输出高电平信号,第二控制线S2输出低电平信号,第三控制线S3输出低电平信号,第四控制线S4输出高电平信号。此时,第二开关管T2和第四开关管T4导通,第一开关管T1和第三开关管T3截止。
图5为图3所示像素驱动电路在重置阶段的等效电路图。如图5所示,由于第二开关管T2和第四开关管T4均导通,因此参考电压Vref通过第二开关管T2写入至第一节点A,并且重置电压Vsus通过第四开关管T4写入至第二节点B,从而完成对该像素驱动电路的重置。此时,第一节点A的电压为参考电压Vref,第二节点B的电压为重置电压Vsus。
在阈值补偿阶段,第一控制线S1输出高电平信号,第二控制线S2输出低电平信号,第三控制线S3输出高电平信号,第四控制线S4输出低电平信号。此时,第二开关管T2和第三开关管T3导通,第一开关管T1和第四开关管T4截止。
图6为图3所示像素驱动电路在阈值补偿阶段的等效电路图。如图6所示,由于第二开关管T2持续处于导通状态,因此第一节点A的电压会维持在参考电压Vref。与此同时,由于第三开关管T3导通,则第一工作电压Vdd开始通过驱动晶体管DTFT对第二节点B进行充电,并当驱动晶体管DTFT的栅源电压Vgs等于Vth时,驱动晶体管DTFT截止,充电结束。此时,第二节点B的电压为Vref-Vth,其中Vth为驱动晶体管的阈值电压。
在数据写入阶段,第一控制线S1输出低电平信号,第二控制线S2输出高电平信号,第三控制线S3输出低电平信号,第四控制线S4输出低电平信号。此时,第一开关管T1导通,第二开关管T2、第三开关管T3和第四开关管T4均截止。
图7为图3所示像素驱动电路在数据写入阶段的等效电路图, 如图7所示,由于第二开关管T2截止以及第一开关管T1导通,则数据电压Vdata通过第一开关管T1写入至第一节点A,第一节点A的电压由参考电压Vref跳变为数据电压Vdata,即第一存储电容C1的第一端的电压发生了大小为Vdata-Vref的跳变,此时,第一存储电容C1的第二端的电压在自举作用下产生相应的跳变。其中,第一存储电容C1的第二端的电压跳变为:
Vref-Vth+α(Vdata-Vref)
其中,α为电压跳变常数,在图3所示电路中
Figure PCTCN2016076841-appb-000001
为第一存储电容C1的电容值,COLED为发光器件OLED自身的电容值。
在数据写入阶段结束后,第一节点A的电压为数据电压Vdata,第二节点B的电压为Vref-Vth+α(Vdata-Vref)。
在显示阶段,第一控制线S1输出低电平信号,第二控制线S2输出低电平信号,第三控制线S3输出高电平信号,第四控制线S4输出低电平信号。此时,第三开关管T3导通,第一开关管T1、第二开关管T2和第四开关管T4均截止。
图8为图3所示像素驱动电路在显示阶段的等效电路图,如图8所示,由于第三开关管T3导通,因此第一电源为驱动晶体管DTFT提供第一工作电压Vdd,从而使驱动晶体管DTFT也处于工作状态。
由驱动晶体管DTFT的饱和驱动电流公式可得:
I=K*(Vgs-Vth)2
=K*{Vdata-[Vref-Vth+α(Vdata-Vref)]-Vth}2
=K*[(1-α)(Vdata-Vref)]2
其中,K和α均为常量,Vgs为驱动晶体管DTFT的栅源电压。
通过上式可知,驱动晶体管DTFT的驱动电流I仅与数据电压Vdata和参考电压Vref相关而与驱动晶体管DTFT的阈值电压Vth无关,从而可避免流过发光器件OLED的驱动电流受到阈值电压不均匀和漂移的影响,进而有效的提高了流过发光器件OLED的驱动电流的均匀性。此外,由于该驱动电流也与第一工作电压Vdd和第二工作电压Vss无关,因此可有效的避免第一工作电压Vdd和第二工作电压 Vss在电路中的压降对驱动电流的影响。
图9为本发明实施例一中的另一种像素驱动电路的具体示意图,图10为图9所示像素驱动电路中各控制线以及第四电源的工作时序图。图9所示的像素驱动电路与图3所示的像素驱动电路的区别在于,图9所示的像素驱动电路中的第四开关管T4的第一极与第四电源连接,即第三电源与第四电源为同一个电源(第四电源)。如图10所示,该第四电源在阈值补偿阶段时提供参考电压Vref(对应图10中第四电源上的高电平),在重置阶段、数据写入阶段和发光阶段时提供重置电压Vsus(对应图10中第四电源上的低电平)。由于图9所示的像素驱动电路省去了第三电源,因此可为该像素驱动电路省去相应的电源连接线(Power Line),从而有效的减小布线空间。
需要说明的是,虽然第四电源在参考电压和重置电压之间进行切换时会造成瞬时功耗,但是由于参考电压的绝对值与重置电压的绝对值之间的差较小,因此该瞬时功耗也比较小。
此外,与图4中各控制线的时序相比,图10中仅第三控制线S3的时序与图4中第三控制线S3的时序不同,其他三条控制线的时序完全相同。由于第四电源在从重置阶段进入至阈值补偿阶段时,其输出的电压由重置电压Vsus变为参考电压Vref,此时第一节点A的电压需要从重置电压Vsus上升至参考电压Vref,该升压过程需要经历一段时间。为保证驱动晶体管DTFT的阈值电压Vth能准确的写入至第一存储电容C1,因此需要第三开关管T3在第一节点A的电压稳定在参考电压Vref之后才能导通,即,使得所述参考电压Vref与所述驱动晶体管DTFT的阈值电压Vth的差能够写入至所述第二节点B。具体地,所述阈值补偿阶段可包括第一时间段和第二时间段,在进入阈值补偿阶段时,第三控制线S3是先在第一时间段中维持低电平信号,然后才在第二时间段中输出高电平信号。
图9所示像素驱动电路的工作过程与图3所示的像素驱动电路的工作过程相似,具体可参见上述对与图3所示的像素驱动电路的工作过程的描述,此处不再赘述。
图11为本发明实施例一中的又一种像素驱动电路的具体示意 图。图11所示的像素驱动电路与图3所示的像素驱动电路的区别在于,图11所示的像素驱动电路中的第四开关管T4的第一极与第二电源连接,即第二电源和第三电源为同一个电源(第二电源),该第二电源持续输出第二工作电压Vss。由于图11所示的像素驱动电路省去了第三电源,因此可为该像素驱动电路省去相应的电源连接线(Power Line),从而有效的减小布线空间。
需要说明的是,图11所示的像素驱动电路中各控制线的工作时序可参见图4中所示,具体内容可参见上述对图3所示像素驱动电路的工作过程的描述,此处不再赘述。
需要说明的是,本实施例中,对于图2、图3、图5-图9以及图11所示的像素驱动电路,这些像素驱动电路中还包括第二存储电容C2,其中,该第二存储电容C2的第一端与第二节点B连接,第二存储电容C2的第二端悬空。从本实施例提供各像素驱动电路中可见,在第二节点B处连接的器件较多,因此容易产生漏电流,从而使得第二节点B的电压不稳定。本发明中,通过在第二节点B处设置第二存储电容C2,可使得第二节点B的电压稳定,从而保证驱动晶体管产生的驱动电流更加稳定。
[实施例二]
本实施例提供了一种像素驱动方法。图12为该像素驱动方法的流程图。该像素驱动方法基于像素驱动电路,该像素驱动电路采用上述实施例一中提供的任意一种像素驱动电路。如图12所示,该像素驱动方法包括如下步骤101-步骤104。
步骤101:重置单元在第四控制线的控制下将重置电压写入至第二节点。
步骤102:阈值补偿单元在第一控制线和第三控制线的控制下将参考电压写入至第一节点,以及将参考电压与驱动晶体管的阈值电压的差写入至第二节点。
步骤103:数据写入单元在第二控制线的控制下将数据电压写入至第一节点。
步骤104:阈值补偿单元在第三控制线的控制下将第一工作电压写入至驱动晶体管的第一极,以导通驱动晶体管,以使得驱动晶体管向发光器件提供的驱动电流与驱动晶体管的阈值电压无关。
步骤101至步骤104依次分别对应像素驱动电路的四个工作阶段:重置阶段、阈值补偿阶段、数据写入阶段和发光阶段。对于步骤101至步骤104的具体过程可参见上述实施例一中的相应描述,此处不再结合示例进行描述。
本发明实施例二提供了一种像素驱动方法,该像素驱动方法可使得驱动晶体管的驱动电流仅与数据电压和参考电压相关而与驱动晶体管的阈值电压无关,从而可避免流过发光器件的驱动电流受到阈值电压不均匀和漂移的影响,进而有效的提高了流过发光器件OLED的驱动电流的均匀性。此外,由于该驱动电流也与第一工作电压和第二工作电压无关,因此可有效的避免第一工作电压和第二工作电压在电路中的压降对驱动电流的影响。
[实施例三]
本发明实施例三提供了一种显示装置,该显示装置包括:若干个像素单元,每个像素单元均对应设置有像素驱动电路,该像素驱动电路可采用上述实施例一中的像素驱动电路。此外,该像素驱动电路可采用上述实施例二中提供的像素驱动方法进行工作。具体内容可参见上述实施例一和实施例二中的描述,此处不再赘述。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (10)

  1. 一种像素驱动电路,包括:重置单元、阈值补偿单元、数据写入单元、驱动晶体管、第一存储电容和发光器件,其中,
    所述驱动晶体管的控制极与所述第一存储电容的第一端连接于第一节点,所述驱动晶体管的第二极、所述发光器件的第一端和所述第一存储电容的第二端连接于第二节点,所述发光器件的第二端与第二电源连接;
    所述重置单元的输入端与第三电源连接,所述重置单元的输出端与所述第二节点连接,所述重置单元的控制端与第四控制线连接;
    所述阈值补偿单元的第一输入端与第一电源连接,所述阈值补偿单元的第一输出端与所述驱动晶体管的第一极连接,所述阈值补偿单元的第一控制端与第三控制线连接,所述阈值补偿单元的第二输入端与第四电源连接,所述阈值补偿单元的第二输出端与所述第一节点连接,所述阈值补偿单元的第二控制端与第一控制线连接;
    所述数据写入单元的输入端与数据线连接,所述数据写入单元的输出端与所述第一节点连接,所述数据写入单元的控制端与第二控制线连接;
    所述第一电源用于提供第一工作电压,所述第二电源用于提供第二工作电压,所述第三电源用于提供重置电压,所述第四电源用于提供参考电压;
    所述重置单元用于在重置阶段时在所述第四控制线的控制下将所述重置电压写入至所述第二节点;
    所述阈值补偿单元用于在阈值补偿阶段时在所述第一控制线和第三控制线的控制下将所述参考电压写入至所述第一节点,以及将所述参考电压与所述驱动晶体管的阈值电压的差写入至所述第二节点;
    所述数据写入单元用于在数据写入阶段时在所述第二控制线的控制下将所述数据线上的数据电压写入至所述第一节点;
    所述阈值补偿单元还用于在发光阶段时在所述第三控制线的控制下将所述第一工作电压写入至所述驱动晶体管的第一极,以导通所 述驱动晶体管,以使得所述驱动晶体管向所述发光器件提供的驱动电流与所述驱动晶体管的阈值电压无关。
  2. 根据权利要求1所述的像素驱动电路,其中,所述数据写入单元包括:第一开关管;
    所述第一开关管的第一极与所述数据线连接,所述第一开关管的第二极与所述第一节点连接,所述第一开关管的控制极与所述第二控制线连接。
  3. 根据权利要求1所述的像素驱动电路,其中,所述阈值补偿单元包括:第二开关管和第三开关管;
    所述第二开关管的第一极与所述第四电源连接,所述第二开关管的第二极与所述第一节点连接,所述第二开关管的控制极与所述第一控制线连接;
    所述第三开关管的第一极与所述第一电源连接,所述第三开关管的第二极与所述驱动晶体管的第一极连接,所述第三开关管的控制极与所述第三控制线连接。
  4. 根据权利要求1所述的像素驱动电路,其中,所述重置单元包括:第四开关管;
    所述第四开关管的第一极与所述第三电源连接,所述第四开关管的第二极与所述第二节点连接,所述第四开关管的控制极与所述第四控制线连接。
  5. 根据权利要求1-4中任一所述的像素驱动电路,还包括:第二存储电容;
    所述第二存储电容的第一端与所述第二节点连接,所述第二存储电容的第二端悬空。
  6. 根据权利要求1所述的像素驱动电路,其中,所述第三电源 和所述第四电源为同一个电源,该电源在所述阈值补偿阶段时提供所述参考电压,在所述重置阶段、所述数据写入阶段和所述发光阶段时提供所述重置电压。
  7. 根据权利要求6所述的像素驱动电路,其中,所述阈值补偿阶段包括第一时间段和第二时间段,并且所述第三控制线上的电压在所述第一时间段中为关断电压而在所述第二时间段中为开启电压,以使得所述阈值补偿单元在所述第一节点的电压稳定在所述参考电压之后才能够将所述参考电压与所述驱动晶体管的阈值电压的差写入至所述第二节点。
  8. 根据权利要求1所述的像素驱动电路,其中,所述第二电源和所述第三电源为同一个电源,该电源用于提供所述第二工作电压。
  9. 一种显示装置,包括:如权利要求1-8中任一所述的像素驱动电路。
  10. 一种像素驱动方法,其基于像素驱动电路,所述像素驱动电路采用上述权利要求1-8中任一所述的像素驱动电路,所述像素驱动方法包括:
    在重置阶段,所述重置单元在所述第四控制线的控制下将所述重置电压写入至所述第二节点;
    在阈值补偿阶段,所述阈值补偿单元在所述第一控制线和第三控制线的控制下将所述参考电压写入至所述第一节点,以及将所述参考电压与所述驱动晶体管的阈值电压的差写入至所述第二节点;
    在数据写入阶段,所述数据写入单元在所述第二控制线的控制下将数据电压写入至所述第一节点;
    在发光阶段,所述阈值补偿单元在所述第三控制线的控制下将所述第一工作电压写入至所述驱动晶体管的第一极,以导通所述驱动晶体管,以使得所述驱动晶体管向所述发光器件提供的驱动电流与所 述驱动晶体管的阈值电压无关。
PCT/CN2016/076841 2015-04-07 2016-03-21 像素驱动电路、像素驱动方法和显示装置 WO2016161887A1 (zh)

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