[go: up one dir, main page]

WO2016150232A1 - 像素电路及其驱动方法、显示装置 - Google Patents

像素电路及其驱动方法、显示装置 Download PDF

Info

Publication number
WO2016150232A1
WO2016150232A1 PCT/CN2016/070089 CN2016070089W WO2016150232A1 WO 2016150232 A1 WO2016150232 A1 WO 2016150232A1 CN 2016070089 W CN2016070089 W CN 2016070089W WO 2016150232 A1 WO2016150232 A1 WO 2016150232A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
voltage
storage capacitor
pole
reset
Prior art date
Application number
PCT/CN2016/070089
Other languages
English (en)
French (fr)
Inventor
马占洁
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/104,333 priority Critical patent/US10032415B2/en
Publication of WO2016150232A1 publication Critical patent/WO2016150232A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0266—Reduction of sub-frame artefacts
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas

Definitions

  • the present invention belongs to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display device.
  • OLEDs Organic light-emitting display diodes
  • Conventional passive matrix OLEDs require a shorter driving time of a single pixel as the display size increases, and thus it is necessary to increase transient current and increase power consumption.
  • the application of high current will cause the voltage drop on the ITO line to be too large, and the OLED operating voltage is too high, thereby reducing its efficiency.
  • the Active Matrix OLED Active Matrix OLED
  • the main problem to be solved is the luminance non-uniformity between pixels and pixels.
  • An AMOLED voltage type pixel unit driving circuit is provided in the prior art.
  • the voltage driving method is similar to the conventional AMLCD driving method.
  • the driving unit provides a voltage signal representing a gray scale, and the voltage signal is converted into a current signal of the driving transistor inside the pixel circuit, thereby driving the OLED to achieve brightness gray scale.
  • This method has the advantages of fast driving speed and simple implementation. It is suitable for driving large-sized panels and is widely used in the industry. However, it is necessary to design additional TFT and capacitor components to compensate for TFT non-uniformity, IR Drop and non-uniformity of OLED devices. .
  • the switching transistor TK transmits a voltage Vdata for representing the gray scale on the data line to the gate of the driving transistor TQ, and the driving transistor converts the data voltage Vdata into a corresponding current to the OLED device, in normal operation
  • the drive transistor TQ should be in the saturation region to provide a constant current during the scan time of one row.
  • the current driving the transistor TQ ie the operating current of the OLED device, can be expressed as:
  • ⁇ n is the carrier mobility
  • C OX is the gate oxide capacitance
  • W/L is the transistor width to length ratio
  • Vdata is the data voltage
  • Voled is the OLED operating voltage
  • Vthn is the threshold of the pixel unit.
  • the voltage i.e., the threshold voltage of the driving transistor TQ
  • the pixel unit driving circuit in the prior art is widely used, it is inevitably subject to the following problem: if the Vthn between different pixel units is different, there must be a difference between the currents of the respective OLED devices. If the Vthn of the pixel unit drifts with time, the operating current of the OLED may be different before and after the threshold drift, resulting in image sticking. In addition, due to the non-uniformity of the OLED device, the OLED operating voltage is different, which also causes the OLED operating current to be different.
  • the technical problem to be solved by the present invention includes the problem of display non-uniformity for the existing pixel circuit, and a pixel driving circuit capable of effectively preventing the threshold voltage of the driving transistor from adversely affecting display and effectively improving the resolution. And its driving method and display device.
  • a technical solution adopted to solve the technical problem of the present invention is a pixel circuit including: a driving transistor, a storage capacitor, an organic electroluminescent device, a reset unit, a data writing unit, and a voltage output unit;
  • the reset unit is connected to a reset control signal line, an initialization signal line, a data writing unit, first and second ends of the storage capacitor, a voltage output unit, and a first pole and a control pole of the driving transistor;
  • the control electrode of the driving transistor is further connected to a second pole of the storage capacitor, a first pole of the driving transistor is further connected to a voltage output unit, and a second pole of the driving transistor is connected to a first end of the organic electroluminescent device, the organic electroluminescence a second end of the device is coupled to the low supply voltage;
  • the data write unit is coupled to the gate and data lines, and to the first end of the storage capacitor;
  • the reset unit resets the first end of the storage capacitor to the initialization voltage input to the initialization signal line under the control of the reset control signal input by the reset control signal line, and resets the second end of the storage capacitor to the Describe the first voltage output by the voltage output unit;
  • the data writing unit writes the data voltage input on the data line and the equivalent threshold voltage of the driving transistor to the first end of the storage capacitor under the control of the gate scanning signal input by the gate line;
  • the driving transistor drives the organic electroluminescent device to emit light when the voltage output unit outputs the second voltage.
  • the reset unit includes a first transistor and a second transistor;
  • the first pole of the first transistor is connected to the initialization signal line, the second pole is connected to the first end of the storage capacitor and the data writing unit, and the control pole is connected to the reset control signal line;
  • the first electrode of the second transistor is connected to the voltage output unit, the second electrode is connected to the second end of the storage capacitor and the control electrode of the driving transistor, and the control electrode is connected to the reset control signal line.
  • the data writing unit includes a third transistor and a fourth transistor;
  • the first electrode of the third transistor is connected to the control electrode of the fourth transistor, the second electrode is connected to the first end of the storage capacitor and the reset unit, and the control electrode is connected to the gate line;
  • the first electrode of the fourth transistor is connected to the data line, the second electrode is connected to the first end of the storage capacitor and the reset unit, and the threshold voltage of the fourth transistor is an equivalent threshold voltage of the driving transistor.
  • the voltage signal output by the voltage output unit is a pulse signal.
  • the first voltage is a low level signal and the second voltage is a high level signal.
  • the first to fourth transistors and the driving transistor are P-type transistors
  • the first electrode is a source
  • the second electrode is a drain.
  • the technical solution adopted to solve the technical problem of the present invention is a drive of a pixel circuit
  • the method of the present invention wherein the pixel circuit is the pixel circuit of any one of the above, the driving method comprises:
  • a reset control signal input to the reset control signal line is a strobe signal
  • the reset unit is strobed, resetting the first end of the storage capacitor to an initialization voltage, and resetting the second end of the storage capacitor to the a first voltage output by the voltage output unit;
  • Data writing phase the reset unit is turned off, the gate scan signal input to the gate line is a strobe signal, and the data voltage and the equivalent threshold voltage of the driving transistor are written to the first end of the storage capacitor;
  • Illumination phase The voltage output unit outputs a second voltage, and the driving transistor drives the organic electroluminescent device to emit light.
  • the reset unit includes: a first transistor and a second transistor; in the reset phase, the reset control signal line gates the first transistor and the second transistor, the first transistor will initialize the first transistor A voltage is written to the first end of the storage capacitor, and the second transistor writes a first voltage output by the voltage output unit to the second end of the storage capacitor.
  • the data writing unit includes a third transistor and a fourth transistor; in the data writing phase, the gate scan signal input by the gate line is a strobe signal, and the third transistor is turned on, so that The third transistor connects the gate electrode of the fourth transistor and the second electrode, the data voltage of the data line connected to the first electrode of the fourth transistor and the threshold voltage of the fourth transistor are written into the first end of the storage capacitor, the first The threshold voltage of the four transistors is the equivalent threshold voltage of the drive transistor.
  • the voltage output unit outputs a second voltage
  • the driving transistor is driven under the control of the first voltage, the second voltage, and the initialization voltage and the data voltage.
  • the organic electroluminescent device emits light.
  • the first voltage is a low level signal and the second voltage is a high level signal.
  • the first to fourth transistors and the driving transistor are P-type transistors
  • the first electrode is a source
  • the second electrode is a drain.
  • a technical solution adopted to solve the technical problem of the present invention is a display device.
  • the display panel described above is included.
  • the illumination control line is omitted in the pixel circuit provided by the present invention, so there is no need to control the timing of the illumination, and the number of signal lines of the pixel is reduced, thereby facilitating the improvement of the resolution of the display panel.
  • the driving method of the pixel circuit provided by the present invention is used for driving the above pixel circuit, and the timing thereof is simple, and is not affected by the threshold voltage of the driving transistor during driving, thereby avoiding display non-uniformity occurring in the prior art. Sexual problem.
  • the display device provided by the present invention includes the above pixel circuit, so that the resolution is improved and the display effect is better.
  • FIG. 1 is a structural diagram of a conventional pixel circuit
  • FIG. 2 is a configuration diagram of a pixel circuit according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic diagram of a preferred pixel circuit of Embodiment 1 of the present invention.
  • FIG. 4 is a timing chart showing the operation of the pixel circuit shown in FIG. 3;
  • FIG. 5 is a simulation diagram of the compensation effect of the pixel circuit shown in FIG. 3 in a low gray scale state.
  • the transistor used in the embodiment of the present invention may be a thin film transistor or a field effect transistor or other device with the same characteristics. Since the source and the drain of the transistor used are symmetrical, the source and the drain are indistinguishable. .
  • one of the poles is referred to as a first pole, the other pole is referred to as a second pole, and the gate is referred to as a gate.
  • the transistor can be divided into an N-type transistor and a P-type transistor.
  • a P-type transistor is taken as an example, and when a P-type transistor is used, the source of the first extremely P-type transistor, The drain of the second extreme P-type transistor. It is conceivable to use N-type crystal The present invention can be easily conceived by those skilled in the art without any creative work, and is therefore within the scope of protection of the embodiments of the present invention.
  • the embodiment provides a pixel circuit including: a driving transistor T1, a storage capacitor C1, an organic electroluminescent device D1, a reset unit, a data writing unit, and a voltage output unit VDD;
  • the reset unit is connected to the reset control signal line, the initialization signal line, the data write unit, the first end A and the second end B of the storage capacitor C1, the voltage output unit VDD, and the first pole and the control pole of the driving transistor T1;
  • the control electrode of the driving transistor T1 is further connected to the second pole of the storage capacitor, the first pole of the driving transistor is also connected to the voltage output unit VDD, and the second pole of the driving transistor T1 is connected to the organic electroluminescent device D1.
  • the second end of the organic electroluminescent device D1 is connected to a low power supply voltage VSS; the data writing unit is connected to the gate line Gate and the data line Data.
  • the reset unit is configured to be turned on under the control of the reset control signal Vref input by the reset control signal line, and reset the first end A of the storage capacitor C1 to the initialization voltage Vini through the initialization signal line,
  • the second end B of the storage capacitor C1 is reset to the first voltage V1 output by the voltage output unit VDD;
  • the data line writing unit is configured to be turned on under the control of the gate scan signal input by the gate line Gate Writing the data voltage Vdata input on the data line Data and the equivalent threshold compensation voltage of the driving transistor to the first end A of the storage capacitor C1;
  • the driving transistor T1 is configured to output the second at the voltage output unit VDD When the voltage V2 is turned on, the organic electroluminescent device D1 is driven to emit light.
  • the voltage signal output by the voltage output unit is a pulse signal.
  • the reset unit when the reset control signal Vref input by the reset control signal line is a strobe signal, the reset unit is turned on; therefore, the initialization signal line resets the potential of the first end A of the storage capacitor C1 to the potential through the reset unit to The voltage Vini is initialized, and at the same time, the voltage output from the voltage output unit VDD is the first voltage V1, and the potential of the second terminal B of the storage capacitor C1 is reset to the first voltage V1 by the writing of the reset unit. It can be seen that the potential of the first terminal A of the storage capacitor C1 is initialized at this time. The voltage Vini, the potential of the second terminal B is the first voltage V1.
  • the data write unit connected to the gate line Gate will be turned on, and the reset unit is turned off, so the data voltage Vdata will pass through the data write unit for the storage.
  • Capacitor C1 is charged; at the same time, the equivalent threshold compensation voltage of the driving transistor T1 will also be written to the first end A of the storage capacitor through the data line Data, and the storage capacitor C1 keeps the voltage difference across it constant according to its bootstrap characteristic.
  • the driving transistor T1 When the voltage output unit VDD outputs the second voltage V2, the driving transistor T1 is turned on at this time, and thus the driving transistor T1 drives the organic electroluminescent device D1 to emit light.
  • the first voltage V1 is a low level signal
  • the second voltage V2 is a high level signal
  • the reset unit in this embodiment includes a first transistor M1 and a second transistor M2; a first pole of the first transistor M1 is connected to an initialization signal line, and a second pole is connected to the storage capacitor C1. a first end A and a data writing unit, the control electrode is connected to the reset control signal line; the first electrode of the second transistor M2 is connected to the voltage output unit, and the second electrode is connected to the second end B of the storage capacitor C1 and the driving transistor The control pole of T1, the control pole is connected to the reset control signal line.
  • the first transistor M1 and the second transistor M2 are in an on state, and the initialization voltage Vini input on the initialization signal line passes through.
  • the first transistor M1 is written to the first end A of the storage capacitor C1, and the first voltage V1 outputted by the voltage output unit VDD is written into the second end B of the storage capacitor C1 through the second transistor M2; thus, the storage capacitor C1 is known.
  • the voltage at the first terminal is the initialization voltage Vini
  • the voltage at the second terminal of the storage capacitor C1 is the first voltage V1.
  • the data writing unit includes a third transistor M3 and a fourth transistor M4; a first electrode of the third transistor M3 is connected to a control electrode of the fourth transistor M4, and a second electrode is connected to the first end of the storage capacitor C1.
  • a and a reset unit the control electrode is connected to the gate line Gate; the first electrode of the fourth transistor M4 is connected to the data line Data, and the second electrode is connected to the first end A of the storage capacitor C1 and the reset unit.
  • the third transistor M3 when the gate line Gate inputs the gate scan signal, the third transistor M3 will be gated, so that the voltage of the first pole of the third transistor M3 is equal to the voltage of the second pole thereof, due to the third transistor M3 One pole is connected to the gate of the fourth transistor M4, and the second pole of the third transistor M3 is connected to the second pole of the fourth transistor M4, so the gate voltage of the fourth transistor M4 is equal to the second pole voltage of the fourth transistor M4, It can be seen that at this time, the fourth transistor M4 is equivalent to one diode, and the diode has a unidirectional conduction characteristic.
  • the first end A of the storage capacitor C1 is connected to the second pole of the fourth transistor M4, the first of the storage capacitor C1
  • the potential at the end A is the sum of the data voltage Vdata and the threshold voltage Vth4 of the fourth transistor M4, that is, Vdata+Vth4.
  • the storage capacitor C1 has a bootstrap characteristic.
  • the voltage of the second terminal B of the storage capacitor C1 is the data voltage Vdata plus the threshold voltage Vth4 of the fourth transistor M4 minus the initialization voltage Vini plus the first voltage V1, that is, Vdata+ Vth4-Vini+V1.
  • the organic electroluminescent device D1 is driven to emit light, since the potential of the second terminal B of the storage capacitor C1 is Vdata+Vth4-Vini+V1, the voltage of the first pole of the driving transistor T1 is the voltage output unit at this time.
  • the illumination control line is omitted in the pixel circuit provided in the embodiment, so that it is not necessary to control the timing of the illumination, and the number of signal lines of the pixel is reduced, thereby facilitating the improvement of the resolution of the display device.
  • the figure is a Vth compensation effect diagram because of organic electroluminescence.
  • the optical device is more sensitive to current at low gray levels, so when evaluating the compensation effect of the pixel circuit, it can be judged by the ratio of the current change with Vth at the low gray level. If there is no compensation, the rate of change of current with Vth will reach about 100%, so the compensation effect of the pixel circuit is better.
  • the embodiment further provides a display device, which comprises the above display panel, so that it has a higher resolution and a better display effect.
  • the embodiment provides a driving method of a pixel circuit, which can be used to drive the pixel circuit described in Embodiment 1.
  • Reset phase the reset control signal input to the reset control signal line is a strobe signal.
  • the reset unit is gated, and the first end A of the storage capacitor C1 is reset to the initialization voltage Vini, and the storage capacitor C1 is The second end B is reset to the first voltage V1 output by the voltage output unit VDD;
  • Data line Data writing phase the reset unit is turned off, the gate scan signal input to the gate line Gate is a strobe signal, and the data voltage Vdata and the equivalent threshold compensation voltage of the driving transistor T1 are written into the first of the storage capacitor C1. End A;
  • the voltage output unit VDD outputs a second voltage V2, and the driving transistor T1 is turned on to drive the organic electroluminescent device D1 to emit light.
  • the driving method of the pixel circuit of the present embodiment will be specifically described below in conjunction with the pixel circuit shown in FIG. 3 and the operation timing chart of the pixel circuit of FIG.
  • the reset circuit includes a first transistor M1 and a second transistor M2, and the data write module includes a third transistor M3 and a fourth transistor M4, due to the characteristics of the fourth transistor M4 and the driving transistor T1.
  • the characteristics are substantially the same, so the threshold voltage of the fourth transistor M4 is the equivalent threshold voltage of the driving transistor T1.
  • Reset phase reset control signal input for reset control signal line is selected communication No. (low level signal), the first transistor M1 and the second transistor M2 are turned on. At this time, since the voltage of the first pole of the first transistor M1 is the initialization voltage Vini, the potential of the first terminal A of the storage capacitor C1 will be Is reset to the initialization voltage Vini; at the same time, the voltage output unit VDD outputs the first voltage V1 (low level signal) and is transmitted to the first pole of the second transistor M2, thus the second end B of the storage capacitor C1 The potential is the first voltage V1.
  • the driving transistor T1 since the first voltage V1 outputted by the voltage output unit VDD is also transmitted to the first pole of the driving transistor T1, it can be seen that the voltage of the first pole of the driving transistor T1 is the same as the voltage of its gate, so the driving transistor T1 is The phase is in the off state, so no current will flow into the organic electroluminescent device D1, that is, all of the electroluminescent device D1 does not emit light.
  • the reset control signal input to the reset control signal line is a high level signal, the first transistor M1 and the second transistor M2 are turned off; the gate line Gate passes the input gate scan signal (ie, a low level) The signal) is gated such that the third transistor M3 is turned on such that the second electrode of the fourth transistor M4 is connected to the control electrode.
  • the fourth transistor M4 is equivalent to one diode, and at this time, the first end A of the storage capacitor C1 is charged to the sum of the data voltage Vdata and the threshold voltage Vth4 of the fourth transistor M4, that is, Vdata+Vth4, due to The diode has a one-way pass characteristic, so make sure Vdata+Vth4>Vini.
  • the potential of the second terminal B of the storage capacitor C1 is the voltage of the second terminal B of the storage capacitor C1, the data voltage Vdata plus the fourth transistor.
  • the threshold voltage Vth4 of M4 is subtracted from the initialization voltage Vini plus the first voltage V1, that is, Vdata+Vth4-Vini+V1.
  • the voltage of the first pole of the driving transistor T1 is still the first voltage V1, and at this time, the driving transistor T1 is kept in the off state.
  • Light-emitting phase The voltage output from the voltage output unit VDD is changed from the first voltage V1 to the second voltage V2 (high-level signal). Since the potential of the second terminal B of the storage capacitor C1 is Vdata+Vth4-Vini+V1, and the voltage of the first pole of the driving transistor T1 is the second voltage V2 outputted by the voltage output unit VDD at this time, the driving transistor T1 is guaranteed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种像素电路及其驱动方法、显示装置，属于显示技术领域。所述像素电路包括：驱动晶体管（T1）、存储电容（C1）、有机电致发光器件（D1）、复位单元、数据写入单元，以及电压输出单元（VDD）；所述复位单元连接至复位控制信号线、初始化信号线、数据写入单元、存储电容（C1）的两端（A、B）、电压输出单元（VDD），以及驱动晶体管（T1）的第一极和控制极；所述驱动晶体管（T1）的控制极还连接至所述存储电容（C1）的第二极，所述驱动晶体管（T1）的第一极还连接至电压输出单元（VDD），所述驱动晶体管（T1）的第二极连接至有机电致发光器件（D1）的第一端，所述有机电致发光器件（D1）的第二端连接至低电源电压（VSS）；所述数据写入单元连接至栅极线（Gate）和数据线（Data）、以及存储电容（C1）的第一端（A）。该像素电路应用于显示装置中可以实现高分辨率的设计。

Description

像素电路及其驱动方法、显示装置 技术领域
本发明属于显示技术领域，具体涉及像素电路及其驱动方法、显示装置。
背景技术
有机发光显示二极管(OLED)作为一种电流型发光器件已越来越多地被应用于高性能显示中。传统的无源矩阵有机发光显示(Passive Matrix OLED)随着显示尺寸的增大，需要更短的单个像素的驱动时间，因而需要增大瞬态电流，增加功耗。同时大电流的应用会造成ITO线上压降过大，并使OLED工作电压过高，进而降低其效率。而有源矩阵有机发光显示(Active Matrix OLED)通过开关管逐行扫描输入OLED电流，可以很好地解决这些问题。
在AMOLED背板设计中，需要解决的主要问题是像素和像素之间的亮度非均匀性。
现有技术中提供了一种AMOLED电压式像素单元驱动电路。这种电压式驱动方法与传统AMLCD驱动方法类似，由驱动单元提供一个表示灰阶的电压信号，该电压信号会在像素电路内部被转化为驱动晶体管的电流信号，从而驱动OLED实现亮度灰阶，这种方法具有驱动速度快，实现简单的优点，适合驱动大尺寸面板，被业界广泛采用，但是需要设计额外的TFT和电容器件来补偿TFT的非均匀性、IR Drop和OLED器件的非均匀性。
如图1所示为最传统的采用2个TFT，1个电容组成的电压驱动型像素单元电路结构(2T1C)。其中开关晶体管TK将用于数据线上的用于表示灰阶的电压Vdata传输到驱动晶体管TQ的栅极，驱动晶体管将所述数据电压Vdata转化为相应的电流供给OLED器件，在正常工作时，驱动晶体管TQ应处于饱和区，在一行的扫描时间内提供恒定电流。驱动晶体管TQ的电流，即OLED器件的工作电流可表示为：
Figure PCTCN2016070089-appb-000001
其中μn为载流子迁移率，COX为栅氧化层电容，W/L为晶体管宽长比，Vdata为数据电压，Voled为OLED工作电压，为所有像素单元共享，Vthn为像素单元的阈值电压(即，驱动晶体管TQ的阈值电压)，对于增强型TFT，其Vthn为正值，对于耗尽型TFT，其Vthn为负值。
尽管现有技术中的像素单元驱动电路被广泛使用，但是其仍然必不可免的存在以下问题：如果不同像素单元之间的Vthn不同，则各OLED器件的电流之间必然存在差异。如果像素单元的Vthn随时间发生漂移，则可能造成OLED的工作电流在阈值漂移前后的电流不同，从而导致残影。此外，由于OLED器件的非均匀性引起OLED工作电压不同，也会导致OLED工作电流不同。
发明内容
本发明所要解决的技术问题包括，针对现有的像素电路存在显示非均匀性的问题，提供一种能够有效避免驱动晶体管的阈值电压对显示造成不良影响、以及可以有效提高分辨率的像素驱动电路及其驱动方法、显示装置。
解决本发明技术问题所采用的技术方案是一种像素电路，其包括：驱动晶体管、存储电容、有机电致发光器件、复位单元、数据写入单元，以及电压输出单元；所述复位单元连接至复位控制信号线、初始化信号线、数据写入单元、存储电容的第一端和第二端、电压输出单元，以及驱动晶体管的第一极和控制极；所述驱动晶体管的控制极还连接至所述存储电容的第二极，所述驱动晶体管的第一极还连接至电压输出单元，所述驱动晶体管的第二极连接至有机电致发光器件的第一端，所述有机电致发光器件的第二端连接至低电源电压；所述数据写入单元连接至栅极线和数据线、以及存储电容的第一端；其中，
所述复位单元在所述复位控制信号线所输入的复位控制信号的控制下，将存储电容的第一端复位至初始化信号线输入的初始化电压，将所述存储电容的第二端复位至所述电压输出单元输出的第一电压；
所述数据写入单元在栅极线所输入的栅极扫描信号的控制下，将数据线上所输入的数据电压和驱动晶体管的等效阈值电压写入存储电容的第一端；以及
所述驱动晶体管在所述电压输出单元输出第二电压时，驱动有机电致发光器件发光。
优选的是，所述复位单元包括第一晶体管和第二晶体管；其中
所述第一晶体管的第一极连接至初始化信号线，第二极连接至存储电容的第一端和数据写入单元，控制极连接至复位控制信号线；
所述第二晶体管的第一极连接至所述电压输出单元，第二极连接至存储电容的第二端和驱动晶体管的控制极，控制极连接至复位控制信号线。
优选的是，所述数据写入单元包括第三晶体管和第四晶体管；其中
所述第三晶体管的第一极连接至第四晶体管的控制极，第二极连接至存储电容的第一端和复位单元，控制极连接至栅极线；
所述第四晶体管的第一极连接至数据线，第二极连接至存储电容的第一端和复位单元，所述第四晶体管的阈值电压为所述驱动晶体管的等效阈值电压。
优选的是，所述电压输出单元输出的电压信号为脉冲信号。
进一步优选的是，所述第一电压为低电平信号，第二电压为高电平信号。
优选的是，所述第一至第四晶体管和驱动晶体管为P型晶体管，所述第一极是源极，所述第二极是漏极。
解决本发明技术问题所采用的技术方案是一种像素电路的驱 动方法，其中所述像素电路为上述中任意一种所述的像素电路，所述驱动方法包括：
复位阶段：对复位控制信号线输入的复位控制信号为选通信号，复位单元选通，将所述存储电容的第一端复位至初始化电压，将所述存储电容的第二端复位至所述电压输出单元输出的第一电压；
数据写入阶段：所述复位单元关断，对栅极线输入的栅极扫描信号为选通信号，将数据电压和驱动晶体管的等效阈值电压写入存储电容第一端；以及
发光阶段：所述电压输出单元输出第二电压，所述驱动晶体管驱动有机电致发光器件发光。
优选的是，所述复位单元包括：第一晶体管和第二晶体管；在所述复位阶段，所述复位控制信号线将第一晶体管和第二晶体管选通，所述第一晶体管将所述初始化电压写入所述存储电容的第一端，所述第二晶体管将所述电压输出单元输出的第一电压写入所述存储电容的第二端。
优选的是，所述数据写入单元包括第三晶体管和第四晶体管；在所述数据写入阶段，所述栅极线输入的栅极扫描信号为选通信号，第三晶体管导通，使得第三晶体管将第四晶体管的控制极和第二极连接，第四晶体管的第一极连接的数据线的数据电压以及第四晶体管的阈值电压被写入存储电容的第一端，所述第四晶体管的阈值电压为驱动晶体管的等效阈值电压。
优选的是，在所述发光阶段，所述电压输出单元输出第二电压，所述驱动晶体管在所述第一电压、所述第二电压以及所述初始化电压、所述数据电压的控制下驱动有机电致发光器件发光。
优选的是，所述第一电压为低电平信号，第二电压为高电平信号。
优选的是，所述第一至第四晶体管和驱动晶体管为P型晶体管，所述第一极是源极，所述第二极是漏极。
解决本发明技术问题所采用的技术方案是一种显示装置，其 包括上述的显示面板。
本发明具有如下有益效果：
本发明所提供的像素电路中省略了发光控制线，因此不需要控制发光的时序，减少了像素的信号线的数量，从而有利于提高显示面板的分辨率。
本发明的所提供的像素电路的驱动方法，用于驱动上述像素电路，其时序简单，且在驱动过程中不受驱动晶体管的阈值电压的影响，因此避免了现有技术中出现的显示非均匀性的问题。
本发明所提供的显示装置，其包括上述像素电路，故其分辨率提高，显示效果更好。
附图说明
图1为现有的像素电路的结构图；
图2为本发明的实施例1的像素电路的结构图；
图3为本发明的实施例1的像素电路一种优选的示意图。
图4为图3所示的像素电路的工作时序图；
图5为图3所示的像素电路在低灰阶状态时的补偿效果的仿真图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
本发明实施例中的所采用的晶体管可以为薄膜晶体管或场效应管或其他相同特性的器件，由于采用的晶体管的源极和漏极是对称的，所以其源极、漏极是没有区别的。在本发明实施例中，为区分晶体管的源极和漏极，将其中一极称为第一极，另一极称为第二极，栅极称为控制极。此外按照晶体管的特性可以将晶体管分为N型晶体管和P型晶体管，以下实施例中是以P型晶体管为例进行说明，并且当采用P型晶体管时，第一极为P型晶体管的源极，第二极为P型晶体管的漏极。可以想到的是采用N型晶 体管实现本发明是本领域技术人员在没有付出创造性劳动前提下就能够轻易想到的，因此也是在本发明实施例的保护范围内的。
实施例1：
如图2所示，本实施例提供一种像素电路，其包括：驱动晶体管T1、存储电容C1、有机电致发光器件D1、复位单元、数据写入单元，以及电压输出单元VDD；其中，所述复位单元连接复位控制信号线、初始化信号线、数据写入单元、存储电容C1的第一端A和第二端B、电压输出单元VDD，以及驱动晶体管T1的第一极和控制极；所述驱动晶体管T1的控制极还连接所述存储电容的第二极，所述驱动晶体管的第一极还连接电压输出单元VDD，所述驱动晶体管T1的第二极连接有机电致发光器件D1的第一端，所述有机电致发光器件D1的第二端连接低电源电压VSS；所述数据写入单元连接栅极线Gate和数据线Data。所述复位单元，用于在所述复位控制信号线所输入的复位控制信号Vref的控制下导通，并通过初始化信号线将存储电容C1的第一端A复位至初始化电压Vini，将所述存储电容C1的第二端B复位至所述电压输出单元VDD输出的第一电压V1；所述数据线写入单元，用于在栅极线Gate所输入的栅极扫描信号的控制下导通，将数据线Data上所输入的数据电压Vdata和驱动晶体管的等效阈值补偿电压写入存储电容C1的第一端A；所述驱动晶体管T1，用于在所述电压输出单元VDD输出第二电压V2时导通，从而驱动有机电致发光器件D1发光。其中，优选的，电压输出单元输出的电压信号为脉冲信号。
具体的，当所述复位控制信号线所输入的复位控制信号Vref为选通信号时，复位单元将导通；因此，初始化信号线通过复位单元将存储电容C1的第一端A的电位复位至初始化电压Vini，而在此同时电压输出单元VDD输出的电压为第一电压V1，并通过复位单元写入而将存储电容C1的第二端B的电位复位至第一电压V1。由此可知，此时存储电容C1的第一端A的电位为初始化 电压Vini，第二端B的电位为第一电压V1。
当栅极扫描信号将栅极线Gate选通后，与该栅极线Gate连接的数据写入单元将导通，而复位单元关断，因此数据电压Vdata将通过数据写入单元为所述存储电容C1充电；同时，驱动晶体管T1的等效阈值补偿电压也将通过数据线Data写入存储电容的第一端A，而存储电容C1根据本身的自举特性将其两端的压差保持一定。
当所述电压输出单元VDD输出第二电压V2时，此时驱动晶体管T1导通，因此驱动晶体管T1驱动有机电致发光器件D1发光。
需要说明的是，上述的第一电压V1为低电平信号，第二电压V2则为高电平信号。
结合图3所示，优选地，本实施例中的复位单元包括第一晶体管M1和第二晶体管M2；所述第一晶体管M1的第一极连接初始化信号线，第二极连接存储电容C1的第一端A和数据写入单元，控制极连接复位控制信号线；所述第二晶体管M2的第一极连接所述电压输出单元，第二极连接存储电容C1的第二端B和驱动晶体管T1的控制极，控制极连接复位控制信号线。
具体的，当复位控制信号线输入导通信号时，即低电平信号，此时第一晶体管M1和第二晶体管M2处于导通状态，此时初始化信号线上所输入的初始化电压Vini则通过第一晶体管M1写入存储电容C1的第一端A，电压输出单元VDD输出的第一电压V1则通过第二晶体管M2写入存储电容C1的第二端B；由此可知，存储电容C1的第一端的电压为初始化电压Vini，存储电容C1的第二端的电压为第一电压V1。
优选地，所述数据写入单元包括第三晶体管M3和第四晶体管M4；所述第三晶体管M3的第一极连接第四晶体管M4的控制极，第二极连接存储电容C1的第一端A和复位单元，控制极连接栅极线Gate；所述第四晶体管M4的第一极连接数据线Data，第二极连接存储电容C1的第一端A和复位单元。
具体的，当栅极线Gate输入栅极扫描信号时，第三晶体管M3将被选通，故第三晶体管M3的第一极的电压等于其第二极的电压，由于第三晶体管M3的第一极连接第四晶体管M4的控制极，第三晶体管M3的第二极连接第四晶体管M4的第二极，因此第四晶体管M4的控制极电压等于第四晶体管M4的第二极电压，由于可知，此时第四晶体管M4相当于一个二极管，而二级管具有单向导通特性，由于存储电容C1的第一端A与第四晶体管M4的第二极连接，因此存储电容C1的第一端A此时的电位为数据电压Vdata与第四晶体管M4的阈值电压Vth4之和，即Vdata+Vth4。存储电容C1具有自举特性，此时存储电容C1的第二端B的电压为数据电压Vdata加上第四晶体管M4的阈值电压Vth4减去初始化电压Vini再加上第一电压V1，即Vdata+Vth4-Vini+V1。
之后，在驱动有机电致发光器件D1进行发光时，由于存储电容C1的第二端B的电位为Vdata+Vth4-Vini+V1，而驱动晶体管T1的第一极的电压为此时电压输出单元VDD输出的第二电压V2，以保证驱动晶体管T1开启，即Vgs<0，使得Vdata+Vth4-Vini+V1-V2<0，并工作于饱和区，此时驱动晶体管T1的电流为：Ids＝1/2*K*(Vgs–Vth)^2＝1/2*K*{Vdata+Vth4-Vini+V1-V2-Vth}^2，其中，由于制备工艺的原因，第四晶体管M4与驱动晶体管T1的特性基本相同，因此可以认为Vth4等同于Vth，也就是说第四晶体管M4的阈值电压为驱动晶体管T1的等效阈值电压，因此上式可改写为：Ids＝1/2*K*(Vgs–Vth)^2＝1/2*K*{Vdata-Vini+V1-V2}^2，由此可知驱动晶体管T1的电流与其阈值无关，从而其电流不受其阈值电压Vth的影响，也就是说驱动晶体管T1的阈值电压Vth不会影响有机电致发光器件D1发光的均匀性。
而且，本实施例中所提供的像素电路中省略了发光控制线，因此不需要控制发光的时序，减少了像素的信号线数量，从而有利于提高显示装置的分辨率。
如图5所示，该图是一个Vth补偿效果图，因为有机电致发 光器件在低灰阶时对电流敏感度更大，因此在评价像素电路补偿效果的好坏时，可以通过低灰阶时电流随Vth变化的比率来进行判断。如果没有补偿的，电流随Vth的变化率会达到100％左右，因此该像素电路补偿效果较好。
相应的，本实施例还提供了一种显示装置，其包括上述的显示面板，故其具有较高的分辨率，显示效果更好。
实施例2：
本实施例提供一种像素电路的驱动方法，该驱动方法可用于驱动实施例1中所述的像素电路。
本实施例所提供的像素电路的驱动方法，具体包括如下步骤：
复位阶段：对复位控制信号线输入的复位控制信号为选通信号，此时复位单元选通，将所述存储电容C1的第一端A复位至初始化电压Vini，将所述存储电容C1的第二端B复位至所述电压输出单元VDD输出的第一电压V1；
数据线Data写入阶段：复位单元关断，对栅极线Gate输入的栅极扫描信号为选通信号，将数据电压Vdata和驱动晶体管T1的等效阈值补偿电压写入存储电容C1的第一端A；
发光阶段：所述电压输出单元VDD输出第二电压V2，所述驱动晶体管T1导通，以驱动有机电致发光器件D1发光。
下面结合如图3所示的像素电路，以及图4所示的图3的像素电路的工作时序图，对本实施例的像素电路的驱动方法具体说明。
如图3所示的像素电路，其复位模块包括第一晶体管M1和第二晶体管M2，数据写入模块包括第三晶体管M3和第四晶体管M4，由于第四晶体管M4的特性和驱动晶体管T1的特性大致相同，因此第四晶体管M4的阈值电压为驱动晶体管T1的等效阈值电压。
复位阶段：为复位控制信号线输入的复位控制信号为选通信 号(低电平信号)，第一晶体管M1和第二晶体管M2导通，此时由于第一晶体管M1的第一极的电压为初始化电压Vini，因此存储电容C1的第一端A的电位将被复位至初始化电压Vini；而与此同时，电压输出单元VDD输出第一电压V1(低电平信号)，并传输给第二晶体管M2的第一极，因此存储电容C1的第二端B的电位为第一电压V1。同时由于电压输出单元VDD所输出的第一电压V1还传输给驱动晶体管T1的第一极，由此可知驱动晶体管T1的第一极的电压和其控制极的电压相同，因此驱动晶体管T1在该阶段处于关断状态，故将不会有电流流入有机电致发光器件D1，也就是所有机电致发光器件D1不发光。
数据写入单元：对复位控制信号线输入的复位控制信号为高电平信号，第一晶体管M1和第二晶体管M2关断；栅极线Gate通过所输入的栅极扫描信号(即低电平信号)被选通，从而第三晶体管M3导通，使得第四晶体管M4的第二极和控制极相连。可以理解的是，此时第四晶体管M4相当于一个二极管，此时存储电容C1的第一端A被充电至数据电压Vdata与第四晶体管M4的阈值电压Vth4之和，即Vdata+Vth4，由于二极管具有单向导通的特性，因此要确保Vdata+Vth4>Vini。根据存储电容C1的自举原理，其两端的电压差应保持一致，故此时存储电容C1的第二端B的电位为存储电容C1的第二端B的电压为数据电压Vdata加上第四晶体管M4的阈值电压Vth4减去初始化电压Vini再加上第一电压V1，即Vdata+Vth4-Vini+V1。而与此同时，由于电压输出单元VDD输出的电压仍为第一电压V1，因此驱动晶体管T1的第一极的电压仍为第一电压V1，此时驱动晶体管T1保持关断的状态。
发光阶段：电压输出单元VDD输出的电压由第一电压V1变为第二电压V2(高电平信号)。由于存储电容C1的第二端B的电位为Vdata+Vth4-Vini+V1，而驱动晶体管T1的第一极的电压为此时电压输出单元VDD输出的第二电压V2，为保证驱动晶体管T1导通，即Vgs<0，使得Vdata+Vth4-Vini+V1-V2<0，并工作于饱和区，此时驱动晶体管T1的电流为：Ids＝1/2*K*(Vgs–Vth)^2 ＝1/2*K*{Vdata+Vth4-Vini+V1-V2-Vth}^2，其中，由于制备工艺的原因，第四晶体管M4与驱动晶体管T1的特性基本相同，因此可以认为Vth4等同于Vth，因此上式可改写为：Ids＝1/2*K*(Vgs–Vth)^2＝1/2*K*{Vdata-Vini+V1-V2}^2，由此可知驱动晶体管T1的电流与其阈值无关，从而其电流不受其阈值电压Vth的影响，也就是说驱动晶体管T1的阈值电压Vth不会影响有机电致发光器件D1发光的均匀性。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (13)

  1. 一种像素电路，其包括：驱动晶体管、存储电容、有机电致发光器件，其特征在于，所述像素电路还包括：复位单元、数据写入单元，以及电压输出单元；所述复位单元连接至复位控制信号线、初始化信号线、数据写入单元、存储电容的第一端和第二端、电压输出单元，以及驱动晶体管的第一极和控制极；所述驱动晶体管的控制极还连接至所述存储电容的第二极，所述驱动晶体管的第一极还连接至电压输出单元，所述驱动晶体管的第二极连接至有机电致发光器件的第一端，所述有机电致发光器件的第二端连接至低电源电压；所述数据写入单元连接至栅极线和数据线、以及存储电容的第一端，其中，
    所述复位单元在所述复位控制信号线所输入的复位控制信号的控制下，将存储电容的第一端复位至初始化信号线输入的初始化电压，将所述存储电容的第二端复位至所述电压输出单元输出的第一电压；
    所述数据写入单元在栅极线所输入的栅极扫描信号的控制下，将数据线上所输入的数据电压和驱动晶体管的等效阈值电压写入存储电容的第一端；以及
    所述驱动晶体管在所述电压输出单元输出第二电压时，驱动有机电致发光器件发光。
  2. 根据权利要求1所述的像素电路，其特征在于，所述复位单元包括第一晶体管和第二晶体管，其中
    所述第一晶体管的第一极连接至初始化信号线，所述第一晶体管的第二极连接至存储电容的第一端和数据写入单元，所述第一晶体管的控制极连接至复位控制信号线；以及
    所述第二晶体管的第一极连接至所述电压输出单元，所述第二晶体管的第二极连接至存储电容的第二端和驱动晶体管的控制极，所述第二晶体管的控制极连接至复位控制信号线。
  3. 根据权利要求1所述的像素电路，其特征在于，所述数据写入单元包括第三晶体管和第四晶体管，其中
    所述第三晶体管的第一极连接至第四晶体管的控制极，所述第三晶体管的第二极连接至存储电容的第一端和复位单元，所述第三晶体管的控制极连接至栅极线；以及
    所述第四晶体管的第一极连接至数据线，所述第四晶体管的第二极连接至存储电容的第一端和复位单元，并且所述第四晶体管的阈值电压为所述驱动晶体管的等效阈值电压。
  4. 根据权利要求1所述的像素电路，其特征在于，所述电压输出单元输出的电压信号为脉冲信号。
  5. 根据权利要求4所述的像素电路，其特征在于，所述第一电压为低电平信号，第二电压为高电平信号。
  6. 根据权利要求1-4中任一项所述的像素电路，其特征在于，所述第一至第四晶体管和所述驱动晶体管为P型晶体管，所述第一极是源极，所述第二极是漏极。
  7. 一种像素电路的驱动方法，其特征在于，所述像素电路为权利要求1-6任一项所述的像素电路，所述驱动方法包括：
    复位阶段：对复位控制信号线输入的复位控制信号为选通信号，复位单元选通，将所述存储电容的第一端复位至初始化电压，将所述存储电容的第二端复位至所述电压输出单元输出的第一电压；
    数据写入阶段：所述复位单元关断，对栅极线输入的栅极扫描信号为选通信号，将数据电压和驱动晶体管的等效阈值电压写入存储电容的第一端；以及
    发光阶段：所述电压输出单元输出第二电压，所述驱动晶体 管驱动有机电致发光器件发光。
  8. 根据权利要求7所述的像素电路的驱动方法，其特征在于，所述复位单元包括：第一晶体管和第二晶体管；在所述复位阶段，所述复位控制信号线将第一晶体管和第二晶体管选通，所述第一晶体管将所述初始化电压写入所述存储电容的第一端，所述第二晶体管将所述电压输出单元输出的第一电压写入所述存储电容的第二端。
  9. 根据权利要求8所述的像素电路的驱动方法，其特征在于，所述数据写入单元包括第三晶体管和第四晶体管；在所述数据写入阶段，所述栅极线输入的栅极扫描信号为选通信号，第三晶体管导通，使得第四晶体管的控制极和第二极连接，第四晶体管的第一极连接的数据线的数据电压以及第四晶体管的阈值电压被写入存储电容的第一端，所述第四晶体管的阈值电压为驱动晶体管的等效阈值电压。
  10. 根据权利要求9所述的像素电路的驱动方法，其特征在于，在所述发光阶段，所述电压输出单元输出第二电压，所述驱动晶体管在所述第一电压、所述第二电压以及所述初始化电压、所述数据电压的控制下驱动有机电致发光器件发光。
  11. 根据权利要求10所述的像素电路的驱动方法，其特征在于，所述第一电压为低电平信号，第二电压为高电平信号。
  12. 根据权利要求7-11中任一项所述的像素电路的驱动方法，其特征在于，所述第一至第四晶体管和所述驱动晶体管为P型晶体管，所述第一极是源极，所述第二极是漏极。
  13. 一种显示装置，其特征在于，所述显示装置包括权利要 求1-6任一项所述的像素电路。
PCT/CN2016/070089 2015-03-25 2016-01-05 像素电路及其驱动方法、显示装置 WO2016150232A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/104,333 US10032415B2 (en) 2015-03-25 2016-01-05 Pixel circuit and driving method thereof, display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510133658.4A CN104680980B (zh) 2015-03-25 2015-03-25 像素驱动电路及其驱动方法、显示装置
CN201510133658.4 2015-03-25

Publications (1)

Publication Number Publication Date
WO2016150232A1 true WO2016150232A1 (zh) 2016-09-29

Family

ID=53315942

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/070089 WO2016150232A1 (zh) 2015-03-25 2016-01-05 像素电路及其驱动方法、显示装置

Country Status (3)

Country Link
US (1) US10032415B2 (zh)
CN (1) CN104680980B (zh)
WO (1) WO2016150232A1 (zh)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104680980B (zh) * 2015-03-25 2017-02-15 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置
JP6733361B2 (ja) 2016-06-28 2020-07-29 セイコーエプソン株式会社 表示装置及び電子機器
CN106128366B (zh) * 2016-09-19 2018-10-30 成都京东方光电科技有限公司 像素驱动电路及其驱动方法和显示装置
US10789891B2 (en) 2016-09-19 2020-09-29 Boe Technology Group Co., Ltd. Pixel circuit, driving method thereof, display substrate and display apparatus
CN108630141B (zh) * 2017-03-17 2019-11-22 京东方科技集团股份有限公司 像素电路、显示面板及其驱动方法
TWI635477B (zh) 2017-11-28 2018-09-11 友達光電股份有限公司 像素電路
CN107945740B (zh) * 2018-01-05 2020-08-18 信利（惠州）智能显示有限公司 像素电路的驱动方法
CN108053792B (zh) * 2018-01-19 2019-09-20 昆山国显光电有限公司 一种像素电路及其驱动方法、显示装置
CN110021259B (zh) 2018-03-23 2020-12-22 京东方科技集团股份有限公司 电源电压提供电路、方法、显示基板和显示装置
CN111063304B (zh) * 2020-01-02 2023-02-03 京东方科技集团股份有限公司 一种像素驱动电路及其驱动方法、阵列基板、显示装置
KR102748791B1 (ko) * 2020-04-16 2025-01-02 삼성전자주식회사 디스플레이 모듈 및 디스플레이 모듈의 구동 방법
CN111754938B (zh) * 2020-07-24 2023-11-28 武汉华星光电半导体显示技术有限公司 像素电路及其驱动方法、显示装置
CN111883064B (zh) * 2020-08-12 2022-04-22 合肥京东方显示技术有限公司 像素驱动电路及其驱动方法、显示面板与显示装置
TWI777447B (zh) * 2021-03-10 2022-09-11 友達光電股份有限公司 驅動電路
CN112951164A (zh) * 2021-03-31 2021-06-11 深圳市华星光电半导体显示技术有限公司 像素驱动电路、显示面板及显示装置
CN112908261A (zh) * 2021-03-31 2021-06-04 深圳市华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板
CN113284462B (zh) * 2021-05-31 2022-06-10 深圳市华星光电半导体显示技术有限公司 像素补偿电路、方法及显示面板
CN113505645B (zh) * 2021-06-09 2022-07-19 上海闻泰信息技术有限公司 一种选通电路和光学传感器电路
CN113971930A (zh) * 2021-11-19 2022-01-25 京东方科技集团股份有限公司 像素电路、驱动方法、显示基板、制作方法和显示装置

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090225011A1 (en) * 2008-03-10 2009-09-10 Sang-Moo Choi Pixel and organic light emitting display using the same
JP2011081408A (ja) * 2010-12-03 2011-04-21 Sony Corp 画素回路及び表示装置とこれらの駆動方法
US20110156611A1 (en) * 2009-12-31 2011-06-30 Au Optronics Corporation Driving device of light emitting unit
JP2012058748A (ja) * 2011-11-04 2012-03-22 Sony Corp 画素回路および表示装置
JP2012108192A (ja) * 2010-11-15 2012-06-07 Toshiba Mobile Display Co Ltd 表示装置および表示装置の駆動方法
CN103198788A (zh) * 2013-03-06 2013-07-10 京东方科技集团股份有限公司 一种像素电路、有机电致发光显示面板及显示装置
CN103927984A (zh) * 2014-04-01 2014-07-16 深圳市华星光电技术有限公司 一种oled显示器的像素驱动电路及其驱动方法
CN103985352A (zh) * 2014-05-08 2014-08-13 京东方科技集团股份有限公司 补偿像素电路及显示装置
CN104050917A (zh) * 2014-06-09 2014-09-17 上海天马有机发光显示技术有限公司 一种像素电路、有机电致发光显示面板及显示装置
CN203882587U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置
CN203882588U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置
CN104157240A (zh) * 2014-07-22 2014-11-19 京东方科技集团股份有限公司 像素驱动电路、驱动方法、阵列基板及显示装置
CN104680980A (zh) * 2015-03-25 2015-06-03 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030038522A (ko) * 2001-11-09 2003-05-16 산요 덴키 가부시키가이샤 광학 소자의 휘도 데이터를 초기화하는 기능을 갖는 표시장치
JP4655800B2 (ja) * 2005-07-21 2011-03-23 セイコーエプソン株式会社 電気光学装置および電子機器
TWI272570B (en) * 2005-12-08 2007-02-01 Chi Mei El Corp Organic light emitting display and pixel with voltage compensation technique thereof
JP2009123272A (ja) * 2007-11-14 2009-06-04 Nec Electronics Corp 半導体記憶装置及び制御方法
KR101056281B1 (ko) * 2009-08-03 2011-08-11 삼성모바일디스플레이주식회사 유기 전계발광 표시장치 및 그의 구동방법
KR101127582B1 (ko) * 2010-01-04 2012-03-27 삼성모바일디스플레이주식회사 화소 회로, 유기 전계 발광 표시 장치 및 그 구동 방법
KR101223488B1 (ko) * 2010-05-11 2013-01-17 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동방법
TWI424412B (zh) * 2010-10-28 2014-01-21 Au Optronics Corp 有機發光二極體之像素驅動電路
KR101859474B1 (ko) * 2011-09-05 2018-05-23 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치의 화소 회로
TW201314660A (zh) * 2011-09-19 2013-04-01 Wintek Corp 發光元件驅動電路及其相關的畫素電路與應用
TWI488348B (zh) * 2012-05-24 2015-06-11 Au Optronics Corp 發光二極體顯示器之畫素電路及其驅動方法與發光二極體顯示器
CN102930824B (zh) * 2012-11-13 2015-04-15 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置
JP2014109707A (ja) * 2012-12-03 2014-06-12 Samsung Display Co Ltd 電気光学装置の駆動方法および電気光学装置
CN103077680B (zh) * 2013-01-10 2016-04-20 上海和辉光电有限公司 一种oled像素驱动电路
KR101702429B1 (ko) * 2013-12-13 2017-02-03 엘지디스플레이 주식회사 보상 화소 구조를 갖는 유기발광표시장치
US20160351120A1 (en) * 2014-02-10 2016-12-01 Joled Inc. Display device and method for driving display device
CN103886838B (zh) * 2014-03-24 2016-04-06 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
US20150279277A1 (en) * 2014-04-01 2015-10-01 Shenzhen China Star Optoelectronics Technology Co., Ltd. Pixel Driving Circuit of OLED Display and the Driving Method Thereof
CN203825988U (zh) * 2014-05-14 2014-09-10 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090225011A1 (en) * 2008-03-10 2009-09-10 Sang-Moo Choi Pixel and organic light emitting display using the same
US20110156611A1 (en) * 2009-12-31 2011-06-30 Au Optronics Corporation Driving device of light emitting unit
JP2012108192A (ja) * 2010-11-15 2012-06-07 Toshiba Mobile Display Co Ltd 表示装置および表示装置の駆動方法
JP2011081408A (ja) * 2010-12-03 2011-04-21 Sony Corp 画素回路及び表示装置とこれらの駆動方法
JP2012058748A (ja) * 2011-11-04 2012-03-22 Sony Corp 画素回路および表示装置
CN103198788A (zh) * 2013-03-06 2013-07-10 京东方科技集团股份有限公司 一种像素电路、有机电致发光显示面板及显示装置
CN103927984A (zh) * 2014-04-01 2014-07-16 深圳市华星光电技术有限公司 一种oled显示器的像素驱动电路及其驱动方法
CN103985352A (zh) * 2014-05-08 2014-08-13 京东方科技集团股份有限公司 补偿像素电路及显示装置
CN104050917A (zh) * 2014-06-09 2014-09-17 上海天马有机发光显示技术有限公司 一种像素电路、有机电致发光显示面板及显示装置
CN203882587U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置
CN203882588U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置
CN104157240A (zh) * 2014-07-22 2014-11-19 京东方科技集团股份有限公司 像素驱动电路、驱动方法、阵列基板及显示装置
CN104680980A (zh) * 2015-03-25 2015-06-03 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置

Also Published As

Publication number Publication date
US20170116919A1 (en) 2017-04-27
US10032415B2 (en) 2018-07-24
CN104680980A (zh) 2015-06-03
CN104680980B (zh) 2017-02-15

Similar Documents

Publication Publication Date Title
WO2016150232A1 (zh) 像素电路及其驱动方法、显示装置
KR102176454B1 (ko) Amoled 픽셀 구동 회로 및 구동 방법
CN106297662B (zh) Amoled像素驱动电路及驱动方法
US10249238B2 (en) Pixel driving circuit, array substrate, display panel and display apparatus having the same, and driving method thereof
US9747839B2 (en) Pixel driving circuit, driving method, array substrate and display apparatus
CN204680360U (zh) 一种像素电路及显示装置
US9634070B2 (en) Organic light emitting display device
WO2019037499A1 (zh) 像素电路及其驱动方法、显示装置
WO2015180354A1 (zh) 像素电路、像素电路的驱动方法和显示装置
CN105427809B (zh) 像素补偿电路及amoled显示装置
WO2017117932A1 (zh) 像素补偿电路及主动式有机发光二极管显示装置
CN103198794B (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
TW202125483A (zh) 電致發光顯示裝置
WO2016011711A1 (zh) 像素电路、像素电路的驱动方法和显示装置
US20190189054A1 (en) Pixel circuit and driving method for the same, display substrate and display device
EP3220380A1 (en) Pixel circuit, organic electroluminescence display panel, and display device and driving method therefor
WO2015188533A1 (zh) 像素驱动电路、驱动方法、阵列基板及显示装置
WO2016155471A1 (zh) 像素电路及其驱动方法、显示装置
WO2017117939A1 (zh) 像素补偿电路及amoled显示装置
CN105185300A (zh) Amoled像素驱动电路及像素驱动方法
CN108777131B (zh) Amoled像素驱动电路及驱动方法
CN106067291A (zh) 一种像素驱动电路及其驱动方法、显示装置
US20150269885A1 (en) Pixel Driving Circuit and Driving Method Thereof, Display Apparatus
WO2015180278A1 (zh) 像素电路及其驱动方法、显示装置
CN109256092B (zh) 基于otft的实现阈值电压补偿的像素驱动电路及驱动方法

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15104333

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16767609

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16767609

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205N DATED 28/02/2018)

122 Ep: pct application non-entry in european phase

Ref document number: 16767609

Country of ref document: EP

Kind code of ref document: A1