TWI863561B - 一種高結晶鈦酸鋇薄膜、製備方法及應用 - Google Patents
一種高結晶鈦酸鋇薄膜、製備方法及應用 Download PDFInfo
- Publication number
- TWI863561B TWI863561B TW112134961A TW112134961A TWI863561B TW I863561 B TWI863561 B TW I863561B TW 112134961 A TW112134961 A TW 112134961A TW 112134961 A TW112134961 A TW 112134961A TW I863561 B TWI863561 B TW I863561B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- barium titanate
- substrate
- orientation
- electrode layer
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/409—Oxides of the type ABO3 with A representing alkali, alkaline earth metal or lead and B representing a refractory metal, nickel, scandium or a lanthanide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02609—Crystal orientation
-
- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01G—COMPOUNDS CONTAINING METALS NOT COVERED BY SUBCLASSES C01D OR C01F
- C01G23/00—Compounds of titanium
- C01G23/003—Titanates
- C01G23/006—Alkaline earth titanates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45531—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations specially adapted for making ternary or higher compositions
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/10—Heating of the reaction chamber or the substrate
- C30B25/105—Heating of the reaction chamber or the substrate by irradiation or electric discharge
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/16—Oxides
- C30B29/22—Complex oxides
- C30B29/32—Titanates; Germanates; Molybdates; Tungstates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/33—Thin- or thick-film capacitors (thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G7/00—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture
- H01G7/06—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
- H10D1/694—Electrodes comprising noble metals or noble metal oxides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
- H10D1/696—Electrodes comprising multiple layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/023—Formation of switching materials, e.g. deposition of layers by chemical vapor deposition, e.g. MOCVD, ALD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Metallurgy (AREA)
- General Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mechanical Engineering (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Environmental & Geological Engineering (AREA)
- General Life Sciences & Earth Sciences (AREA)
- Geology (AREA)
- Life Sciences & Earth Sciences (AREA)
- Optics & Photonics (AREA)
- Semiconductor Memories (AREA)
- Physical Vapour Deposition (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Formation Of Insulating Films (AREA)
Abstract
本發明提供了一種高結晶鈦酸鋇薄膜、製備方法及應用,涉及材料與裝置領域,包括基材、鈦酸鋇層以及頂部電極層;所述鈦酸鋇層置於所述基材上,所述頂部電極層位於所述鈦酸鋇層遠離基材一側;所述基材設置為矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽;所述鈦酸鋇層具有(001)或(111)取向,通過原子層沉積在450℃以下低溫下生長;所述鈦酸鋇層在真空下進行等離子退火;所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5;所述頂部電極層設置為Pt、Ta、TaN、TiN、Au或Ag形成的導電層;解決現有結晶BTO薄膜的方法不適用於生產線後端(BEOL)集成工藝的問題。
Description
本發明涉及材料與裝置領域,尤其涉及一種高結晶鈦酸鋇薄膜、製備方法及應用。
近年來,非揮發性記憶體裝置已被廣泛研究。擁有可嵌入CMOS電路的低功耗記憶體裝置是工業和學術領域上很有興趣的方向。
非揮發性記憶體裝置包括快閃記憶體、磁阻式隨機存取記憶體(MRAM)、電阻式RAM、鐵電RAM(FeRAM)、相變RAM(PCRAM)等。它們都有優點和缺點,但最有前途的非揮發性記憶體技術與低功耗操作依賴於鐵電層。在此類裝置中,二進位"0"和"1"由鐵電層中的兩個不同的穩定電極化表示。在嵌入式環境中使用此類裝置的主要限制是依靠高溫(>600℃)退火來獲得高品質的鐵電層。
鈦酸鋇(BaTiO3,BTO)是一種眾所周知的鐵電材料。由於其介電常數大,矯頑力(coercivity)適中,鐵電相變溫度高於室溫,因此已在許多電子應用中得到了廣泛的研究。因此,BTO是一種非常重要且合適的材料,用作從動態隨機存取記憶體(DRAM)到FeRAM和FE-FET的各種儲存裝置中的介電層。
結晶BTO薄膜比非晶薄膜具有更好的性能。獲得結晶BTO薄膜的方法之一是通過物理氣相沉積生長,例如分子束磊晶(MBE)/脈衝雷射沉積(PLD)/磁控濺射,在600℃~700℃或更高的高溫下生長。生長後在較高溫度下進行熱退火也是一種有效的方法,但不適用於生產線後端(BEOL)集成工藝。
近年來,原子層沉積(ALD)方法因其生長溫度低,均勻性好,精確的化學計量控制,均勻的台階和3D覆蓋率而出現,適用於高縱橫比應用。通常,由ALD沉積生長的BTO薄膜仍然是非晶的。因此需要一種在低溫下獲得高結晶度BTO薄膜的方法,以適用於生產線後端(BEOL)集成工藝。
為了克服上述技術缺陷,本發明的目的在於提供一種高結晶鈦酸鋇薄膜、製備方法及應用,用於解決現有結晶BTO薄膜的方法不適用於生產線後端(BEOL)集成工藝的問題。
本發明公開了一種高結晶鈦酸鋇薄膜,包括基材、鈦酸鋇層以及頂部電極層;所述鈦酸鋇層置於所述基材上,所述頂部電極層位於所述鈦酸鋇層遠離基材一側;所述基材設置為矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽;所述鈦酸鋇層具有(001)或(111)取向,通過原子層沉積在450℃以下低溫下生長;所述鈦酸鋇層在真空下進行等離子退火;所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5,該等離子退火的氣體為氬氣與氧氣的混合氣體,氬氣與氧氣的比例為1:19~4:1;所述頂部電極層設置為Pt、Ta、TaN、TiN、Au或Ag形成的導電層。
優選地,在所述基材與所述鈦酸鋇層之間設置底部電極層;所述底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層。
優選地,在所述鈦酸鋇層以及頂部電極層之間設置金屬氮化物層或金屬合金層。
所述金屬氮化物層設置為Mn3AN或Cu3PdN,其中,A包括Ni,Sn,Ga,Cu或Pt;所述金屬合金層設置為Cu3Pd、Cu3PdN、Pt3Ni、Pt3Fe或Pt3Al。
本發明還提供一種高結晶鈦酸鋇薄膜製備方法,用於製備上述任一項所述的鈦酸鋇薄膜,包括:步驟一:採用矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽作為基材;步驟二:基於原子層沉積系統在等離子體腔室的高真空環境中,採用等離子體在晶體生長方向上低溫退火處理,形成具有(001)或(111)取向的鈦酸鋇層,其中,所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5,該低溫退火處理的氣體為氬氣與氧氣的混合氣體,氬氣與氧氣的比例為1:19~4:1,;步驟三:在所述鈦酸鋇層上真空磁控濺射頂部電極層。
優選地,在步驟二之前還包括:在所述基材上超高真空磁控濺射底部電極層,所述底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層。
優選地,在步驟二中的等離子體腔室的真空度低於10-7Torr。
優選地,在步驟二中等離子體退火設置溫度300℃~450℃,功率為200W~400W,退火的時間為1~6小時。
優選地,所述底部電極層厚度為10nm~50nm,且粗糙度小於1nm;所述鈦酸鋇層厚度為1nm~10nm。
優選地,在步驟三中濺射頂部電極層前,在所述鈦酸鋇層上真空磁控濺射金屬氮化物層或金屬合金層;所述金屬氮化物層或金屬合金層厚度為10nm~50nm。
本發明還提供上述所述製備方法獲得的鈦酸鋇薄膜在鐵電元件、鐵電隧道結、儲能元件、磁隧道結、記憶元件或超級電容器中的應用。
採用了上述技術方案後,與現有技術相比,具有以下有益效果:本發明提供的高結晶鈦酸鋇薄膜製備方法及應用,包括基材、可選的底部電極層、鈦酸鋇層、可選的金屬氮化物層或金屬合金層以及頂部電極層,鈦酸鋇結晶膜通過原子層沉積,在低溫下通過直接等離子體退火結晶,形成低溫下高結晶度的鈦酸鋇層,製備過程都是在高真空下進行,解決現有結晶BTO薄膜的方法不適用於生產線後端集成工藝的問題。
圖1為本發明實施例一的結構示意圖;圖2為本發明實施例二的流程圖;圖3為本發明實施例二中等離子體腔室的結構示意圖;圖4為本發明實施例二的製備方法獲得的具有圖1(c)結構的鈦酸鋇薄膜的XRD圖;圖5為本發明實施例二的製備方法獲得鈦酸鋇薄膜的XPS譜圖;圖6為本發明實施例二的製備方法製備的不同厚度的鈦酸鋇薄膜的TEM圖。
以下結合附圖與具體實施例進一步闡述本發明的優點。
這裡將詳細地對示例性實施例進行說明,其示例表示在附圖中。下面的描述涉及附圖時,除非另有表示,不同附圖中的相同數字表示相同或相似的要素。以下示例性實施例中所描述的實施方式並不代表與本公開相一致的所有實施方式。相反,它們僅是與如所附書中所詳述的、本公開的一些方面相一致的裝置和方法的例子。
在本公開使用的術語是僅僅出於描述特定實施例的目的,而非旨在限制本公開。在本公開和所附申請專利範圍中所使用的單數形式的"一種"、"所述"和"該"也旨在包括多數形式,除非上下文清楚地表示其他含義。還應當理解,本文中使用的術語"和/或"是指並包含一個或多個相關聯的列出專案的任何或所有可能組合。
應當理解,儘管在本公開可能採用術語第一、第二、第三等來描述各種資訊,但這些資訊不應限於這些術語。這些術語僅用來將同一類型的資訊彼此區分開。例如,在不脫離本公開範圍的情況下,第一資訊也可以被稱為第二資訊,類似地,第二資訊也可以被稱為第一資訊。取決於語境,如在此所使用的詞語"如果"可以被解釋成為"在……時"或"當……時"或"回應於確定"。
在本發明的描述中,需要理解的是,術語"縱向"、"橫向"、"上"、"下"、"前"、"後"、"左"、"右"、"豎直"、"水準"、"頂"、"底""內"、"外"等指示的方位或位置關係為基於附圖所示的方位或位置關係,僅是為了便於描述本發明和簡化描述,而不是指示或暗示所指的裝置或元件必須具有特定的方位、以特定的方位構造和操作,因此不能理解為對本發明的限制。
在本發明的描述中,除非另有規定和限定,需要說明的是,術語"安裝"、"相連"、"連接"應做廣義理解,例如,可以是機械連接或電連接,也可以是兩個元件內部的連通,可以是直接相連,也可以通過中間媒介間接相連,對於本領域的普通技術人員而言,可以根據具體情況理解上述術語的具體含義。
在後續的描述中,使用用於表示元件的諸如"模組"、"部件"或"單元"的尾碼僅為了有利於本發明的說明,其本身並沒有特定的意義。因此,"模組"與"部件"可以混合地使用。
實施例一:本實施例公開一種高結晶鈦酸鋇薄膜,參閱圖1,圖1中(a)未設置金屬氮化物層或金屬合金層,包括基材(襯底)、底部電極層、鈦酸鋇層(鈦酸鋇結晶膜、BTO)、以及頂部電極層;圖1中(b)未設置底部電極層,也未設置金屬氮化物層或金屬合金層,包括基材、鈦酸鋇層(鈦酸鋇結晶膜、BTO)以及頂部電極層;圖1中(c)包括基材、底部電極層、鈦酸鋇層(鈦酸鋇結晶膜、BTO)、金屬氮化物層或金屬合金層以及頂部電極層;圖1中(d)未設置底部電極層但設置金屬氮化物層和/或金屬合金層,包括基材、鈦酸鋇層、金屬氮化物層和/或金屬合金層以及頂部電極層。
具體的,以圖1(b)為基礎的,所述鈦酸鋇層置於所述基材(即襯底)上,所述頂部電極層位於所述鈦酸鋇層遠離基材一側;所述基材是由矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽所構成;所述鈦酸鋇層具有(001)或(111)取向,通過原子層沉積在低溫(<450℃)以下生長;所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5;所述頂部電極層包括Pt(鉑)、Ta(鉭)、TaN(氮化鉭)、TiN(氮化鈦)、Au(金)、Ag(銀)或其他具有高導電性的導電層。
作為補充說明的是,上述鈦酸鋇層通過原子層沉積在低溫(<450℃)下生長,在BTO晶體生長後在真空室中進行直接等離子體退火。所有製造過程都是在高真空下進行的。除基板和頂部電極外,下述其他材料(如下述底部電極層或金屬氮化物、金屬合金等)均具有相似的晶格常數,層中的Ba/Ti比率具體值可以通過X射線光電子能譜(X-ray photoelectron spectroscopy,XPS)測量。
在本實施方式中,鈦酸鋇(BTO)通過原子層沉積(Atomic layer deposition,ALD)沉積。它在低溫下通過直接等離子體退火結晶。該方法可在450℃下得到高結晶度鐵電BTO層,可廣泛應用於超級電容器、記憶體件、場效應電晶體、MEMS等應用。由於其相對較低的工作溫度,該方法與CMOS技術相容。
具體的,參閱圖1(a)或(c),在所述基材與所述鈦酸鋇層之間設有底部電極層;所述底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層;具體的,參閱圖1(c)或(d),在所述鈦酸鋇層以及頂部電極層之間設置有金屬氮化物層或金屬合金層。所述金屬氮化物層設置為Mn3AN和/或Cu3PdN,其中,A包括Ni,Sn,Ga,Cu或Pt;所述金屬合金層設置為Cu3Pd、Pt3Ni、Pt3Fe或Pt3Al。在層的頂部,在鈦酸鋇層以及頂部電極層之間設置一金屬氮化物層和/或一金屬合金層,且僅只有一金屬電極堆疊層或金屬電極(即上述頂層電極)。然後完整的結構將形成一個隧道結單元或電容器單元,即可應用於超級電容器、場效應電晶體、記憶體件、隧道結、磁電耦合裝置、可切換光伏和鐵電裝置等領域中。
實施例二:本發明還提供一種高結晶鈦酸鋇薄膜製備方法,用於製備上述實施例一中提供的鈦酸鋇薄膜,參閱圖2,包括:
步驟一:採用矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽作為基材(或襯底);步驟二:基於原子層沉積系統在等離子體腔室的高真空環境中,採用等離子體在晶體生長方向上低溫退火處理,形成具有(001)或(111)取向的鈦酸鋇層,其中,所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5;在上述步驟中,(001)或(111)取向的BTO薄膜通過等離子體增強ALD系統在等離子體腔室(參閱圖3,即退火室)沉積,其中0.9x1.5(x代表BTO薄膜中的Ba/Ti比值)。對於普通的BTO,比率x等於1。如圖5的X射線光電子能譜(XPS)圖顯示了三種BTO薄膜的不同Ba/Ti比值。在上述步驟三的BTO晶體生長過程中通過調整Ba-O和Ti-O迴圈比來改變比值。BTO層在生長後在正常方向上直接等離子體退火處理而不破壞真空,由此獲得在低溫下高結晶度的鈦酸鋇層。
具體的,在步驟二中的等離子體腔室的真空度低於10-7Torr,該等離子體腔室內空氣來源分為等離子氣體和載氣兩部分,等離子氣體是惰性氣體和氧氣的混合氣體,優選氬氣。載氣為氬氣(Ar)。因此,等離子體腔室內的氣體可為氬氣與氧氣的混合氣體,氬氣與氧氣的比例為1:19~4:1。
作為解釋的是,結晶面積百分比隨退火功率的增加而增大。很明顯,功率為氬和氧離子提供能量,並有助於局部退火溫度。但另一方面,功率過高可能會損壞BTO薄膜。對於給定的退火溫度、退火時間、Ba/Ti比和BTO厚度,功率應該有限制,而退火溫度也是一個重要因素。因此,在步驟二中等離子體退火設置溫度300℃~450℃,功率為200W~400W,退火的時間為1~6小時(H)。值得注意的是,退火功率與退火溫度成反比。而不同型號的設備可能具有不同的功率範圍,本發明中的功率範圍只是為了更好的應用本實施方式。BTO層的結晶度隨著退火時間的延長而提高。
在上述步驟二沉積獲得鈦酸鋇層前,還可包括步驟A:在所述基材上超高真空磁控濺射底部電極層,底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層。在上述高真空磁控濺射底部電極層前,還可包括:採用丙酮、異丙醇和去離子水利用超聲波浴清潔基材;或在此之前,採用HF強酸或反應離子蝕刻先清潔基材。即,在濺射形成底部電極層前對基材進行清潔,從而減少基材上的灰塵導致底部電極層上形成氣泡或不平整,影響後續在半導體元件中應用的問題。
在本實施方式中,上述底部電極層厚度為10nm~50nm,且粗糙度小於1nm;所述鈦酸鋇層厚度為1nm~10nm。作為說明的是,BTO厚度對於退火形成的結晶區域具有一定的影響。如圖6所示,圖6中為不同厚度BTO退火後形成BTO薄膜的TEM(穿透式電子顯微鏡)結果,其中,圖6(a)BTO厚度為3.2nm,6(b)BTO厚度為8nm~9nm,可看出通過上述製備方法可以獲得結晶的BTO層。
步驟三:在所述鈦酸鋇層上真空磁控濺射頂部電極層。
具體的,在步驟三中濺射頂部電極層前,還可包括步驟B:在所述鈦酸鋇層上真空磁控濺射金屬氮化物層或金屬合金層;所述金屬氮化物層或金屬合金層厚度為10nm~50nm。
在本實施方式中,濺射系統的真空度低於10-7Torr。
作為進一步說明的,在Bruker X-射線繞射儀上測量設備樣品的X-射線繞射(XRD)θ-2θ掃描。XRD結果如圖4所示,其中採用的樣品(薄膜)具有如圖1(c)所示的結構,具體的顯示強(002)和(004)峰值,沒有其他峰值,由此確定形成高結晶的鈦酸鋇層,X射線光電子能譜法用於測量BTO薄膜中的組成。
實施例三:
本發明還提供上述製備方法得到的鈦酸鋇薄膜在鐵電元件、鐵電隧道結、儲能元件、磁隧道結、記憶元件或超級電容器中的應用。具體的,可以採用包含該薄膜的元件作為鐵電元件、鐵電隧道結、儲能元件、磁隧道結、記憶元件或超級電容器的一部分,由此該薄膜形成的元件可廣泛用於超級電容器、場效應電晶體、記憶體件、隧道結、磁電耦合裝置、可切換光伏和鐵電裝置等領域。
應當注意的是,本發明的實施例有較佳的實施性,且並非對本發明作任何形式的限制,任何熟悉該領域的技術人員可能利用上述揭示的技術內容變更或修飾為等同的有效實施例,但凡未脫離本發明技術方案的內容,依據本發明的技術實質對以上實施例所作的任何修改或等同變化及修飾,均仍屬於本發明技術方案的範圍內。
Claims (10)
- 一種高結晶鈦酸鋇薄膜,其特徵在於:包括一基材、一鈦酸鋇層以及一頂部電極層;所述鈦酸鋇層置於所述基材上,所述頂部電極層位於所述鈦酸鋇層遠離基材一側;所述基材為矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽;所述鈦酸鋇層具有(001)或(111)取向,通過原子層沉積在450℃以下低溫下生長;所述鈦酸鋇層在真空下進行等離子退火;所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5,該等離子退火的氣體為氬氣與氧氣的混合氣體,氬氣與氧氣的比例為1:19~4:1;以及所述頂部電極層設置為Pt、Ta、TaN、TiN、Au或Ag形成的導電層。
- 如請求項1所述的鈦酸鋇薄膜,其中:在所述基材與所述鈦酸鋇層之間設置一底部電極層;所述底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層。
- 如請求項1所述的鈦酸鋇薄膜,其中:在所述鈦酸鋇層以及所述頂部電極層之間設置一金屬氮化物層或一金屬合金層;所述金屬氮化物層設置為Mn3AN或Cu3PdN,其中,A包括Ni,Sn,Ga,Cu或Pt;所述金屬合金層設置為Cu3Pd、Pt3Ni、Pt3Fe或Pt3Al。
- 一種高結晶鈦酸鋇薄膜製備方法,用於製備請求項1~3中任一項所述的鈦酸鋇薄膜,其特徵在於,包括:步驟一:採用矽板、藍寶石、具有(001)或(110)取向的氧化鎂或具有(0001)取向的碳化矽作為一基材;步驟二:基於原子層沉積系統在等離子體腔室的高真空環境中,採用等離子體在晶體生長方向上低溫退火處理,形成具有(001)或(111)取向的一鈦酸鋇層,其中,該低溫退火處理的氣體為氬氣與氧氣的混合氣體,氬氣與氧氣的比例為1:19~4:1,所述鈦酸鋇層中的Ba/Ti比值為0.9~1.5;步驟三:在所述鈦酸鋇層上真空磁控濺射一頂部電極層。
- 如請求項4所述的製備方法,其中,在步驟二之前還包括:在所述基材上超高真空磁控濺射一底部電極層,所述底部電極層設置為具有(001)、(111)或混合取向的Pt層、Au層、Ag層、導電氧化物層、金屬氮化物層或金屬合金層。
- 如請求項4所述的製備方法,其中:在步驟二中的等離子體腔室的真空度低於10-7Torr。
- 如請求項4所述的製備方法,其中:在步驟二中等離子體退火設置溫度300℃~450℃,功率為200W~400W,退火的時間為1~6小時。
- 如請求項4所述的製備方法,其中:在步驟三中濺射所述頂部電極層前,在所述鈦酸鋇層上真空磁控濺射一金屬氮化物層或一金屬合金層;所述金屬氮化物層或所述金屬合金層厚度為10nm~50nm。
- 如請求項5所述的製備方法,其中:所述底部電極層厚度為10nm~50nm,且粗糙度小於1nm; 所述鈦酸鋇層厚度為1nm~10nm。
- 如請求項4~9中任一項所述製備方法,其中所獲得的鈦酸鋇薄膜在鐵電元件、鐵電隧道結、儲能元件、磁隧道結、記憶元件或超級電容器中的應用。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2022111641441 | 2022-09-23 | ||
CN202211164144.1A CN115424920A (zh) | 2022-09-23 | 2022-09-23 | 一种高结晶钛酸钡薄膜、制备方法及应用 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202414518A TW202414518A (zh) | 2024-04-01 |
TWI863561B true TWI863561B (zh) | 2024-11-21 |
Family
ID=84204374
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW112134961A TWI863561B (zh) | 2022-09-23 | 2023-09-13 | 一種高結晶鈦酸鋇薄膜、製備方法及應用 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20240102170A1 (zh) |
EP (1) | EP4353864A3 (zh) |
JP (1) | JP2024046741A (zh) |
KR (1) | KR20240041820A (zh) |
CN (1) | CN115424920A (zh) |
TW (1) | TWI863561B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116313525A (zh) * | 2023-04-23 | 2023-06-23 | 东南大学 | 具有高电容可调性的金属铁电半导体可调电容的制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW324845B (en) * | 1996-02-13 | 1998-01-11 | Mitsubishi Electric Corp | High-conductivity thin film structure, forming method and device thereof |
TWI485532B (zh) * | 2006-09-27 | 2015-05-21 | Asml Netherlands Bv | 輻射系統及包含該輻射系統之微影裝置 |
TW202234663A (zh) * | 2021-02-17 | 2022-09-01 | 美商應用材料股份有限公司 | 用於較短電容器高度之電容器介電質以及量子記憶動態隨機存取記憶體 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5675546A (en) * | 1996-06-07 | 1997-10-07 | Texas Instruments Incorporated | On-chip automatic procedures for memory testing |
KR20080038713A (ko) * | 2006-10-31 | 2008-05-07 | 삼성전자주식회사 | 원자층 증착을 이용하는 커패시터 제조 방법 |
JP5307986B2 (ja) * | 2007-05-07 | 2013-10-02 | 富士フイルム株式会社 | 圧電素子とその製造方法、及び液体吐出装置 |
JP5754702B2 (ja) * | 2011-02-16 | 2015-07-29 | 国立大学法人茨城大学 | 半導体集積回路装置用バリア材の探索方法及び当該探索方法によって探索される半導体集積回路装置用バリア材 |
GB2557923B (en) * | 2016-12-16 | 2020-10-14 | Ip2Ipo Innovations Ltd | Non-volatile memory |
US11773480B2 (en) * | 2017-10-16 | 2023-10-03 | Drexel University | MXene layers as substrates for growth of highly oriented perovskite thin films |
GB2576174B (en) * | 2018-08-07 | 2021-06-16 | Ip2Ipo Innovations Ltd | Memory |
CN112921288B (zh) * | 2021-01-25 | 2023-04-07 | 齐鲁工业大学 | 一种制备高储能密度BaTiO3铁电薄膜的方法及其产品与应用 |
-
2022
- 2022-09-23 CN CN202211164144.1A patent/CN115424920A/zh active Pending
-
2023
- 2023-08-29 JP JP2023138869A patent/JP2024046741A/ja active Pending
- 2023-09-08 KR KR1020230119344A patent/KR20240041820A/ko active Pending
- 2023-09-13 TW TW112134961A patent/TWI863561B/zh active
- 2023-09-20 US US18/370,752 patent/US20240102170A1/en active Pending
- 2023-09-20 EP EP23198553.2A patent/EP4353864A3/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW324845B (en) * | 1996-02-13 | 1998-01-11 | Mitsubishi Electric Corp | High-conductivity thin film structure, forming method and device thereof |
TWI485532B (zh) * | 2006-09-27 | 2015-05-21 | Asml Netherlands Bv | 輻射系統及包含該輻射系統之微影裝置 |
TW202234663A (zh) * | 2021-02-17 | 2022-09-01 | 美商應用材料股份有限公司 | 用於較短電容器高度之電容器介電質以及量子記憶動態隨機存取記憶體 |
Also Published As
Publication number | Publication date |
---|---|
CN115424920A (zh) | 2022-12-02 |
EP4353864A2 (en) | 2024-04-17 |
JP2024046741A (ja) | 2024-04-04 |
KR20240041820A (ko) | 2024-04-01 |
EP4353864A3 (en) | 2024-07-10 |
TW202414518A (zh) | 2024-04-01 |
US20240102170A1 (en) | 2024-03-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6312819B1 (en) | Oriented conductive oxide electrodes on SiO2/Si and glass | |
JP2974006B2 (ja) | 酸素を使用して優先配向された白金薄膜を形成する方法と、その形成方法により製造された素子 | |
JP3832617B2 (ja) | 多層状電極の鉛ゲルマネート強誘電体構造およびその堆積方法 | |
JP4772188B2 (ja) | 強誘電コンデンサの作成方法および基板上にpzt層を成長させる方法 | |
CN106058039B (zh) | 一种锆钛酸铅/钌酸锶铁电超晶格材料及其制备方法 | |
US7071007B2 (en) | Method of forming a low voltage drive ferroelectric capacitor | |
KR20060048987A (ko) | 강유전체 캐패시터, 그 제조 방법 및 강유전체 메모리 소자 | |
TW408470B (en) | Thin film capacitor and the manufacture method thereof | |
TWI863561B (zh) | 一種高結晶鈦酸鋇薄膜、製備方法及應用 | |
JP2005311356A (ja) | 不揮発性抵抗切替メモリのための堆積方法 | |
TW200923987A (en) | High-capacitance density thin-film dielectrics having columnar grains formed on base-metal foils | |
WO2024001426A1 (zh) | 一种相变薄膜、薄膜制备方法及相变存储器 | |
CN109935688B (zh) | 相变薄膜结构、相变存储单元及其制备方法及相变存储器 | |
JP4586956B2 (ja) | 電極膜の製造方法 | |
Wu et al. | Effects of (100)-textured LaNiO3 electrode on the deposition and characteristics of PbTiO3 thin films prepared by rf magnetron sputtering | |
US7163828B2 (en) | Electrode, method of manufacturing the same, ferroelectric memory, and semiconductor device | |
Kim et al. | Structural and electrical properties of excess PbO doped Pb (Zr0. 52Ti0. 48) O3 thin films using rf magnetron sputtering method | |
Lee et al. | Improving dielectric loss and mechanical stress of barium strontium titanate thin films by adding chromium layer | |
JP3286218B2 (ja) | 薄膜誘電体素子 | |
Liu et al. | Influence of crystallinity on the oxidation resistance of Ni–Al film used as diffusion barrier layer | |
JP4670076B2 (ja) | 酸化物薄膜用Pt単結晶電極薄膜の製造方法 | |
JP3400218B2 (ja) | 誘電体キャパシタ | |
KR100490174B1 (ko) | Pzt박막의 강유전 특성이 향상된 반도체 소자와 그 제조방법 | |
CN118660619A (zh) | 一种复合铁电薄膜、铁电电容器及其制备方法 | |
Costa et al. | Influence of temperature on the microstructure and electrical properties of BBT thin films |